0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Copyright (c) 2016 Andreas Färber
0004 *
0005 * Copyright (c) 2016 BayLibre, SAS.
0006 * Author: Neil Armstrong <narmstrong@baylibre.com>
0007 *
0008 * Copyright (c) 2016 Endless Computers, Inc.
0009 * Author: Carlo Caione <carlo@endlessm.com>
0010 */
0011
0012 #include <dt-bindings/gpio/gpio.h>
0013 #include <dt-bindings/interrupt-controller/irq.h>
0014 #include <dt-bindings/interrupt-controller/arm-gic.h>
0015 #include <dt-bindings/power/meson-gxbb-power.h>
0016 #include <dt-bindings/thermal/thermal.h>
0017
0018 / {
0019 interrupt-parent = <&gic>;
0020 #address-cells = <2>;
0021 #size-cells = <2>;
0022
0023 aliases {
0024 mmc0 = &sd_emmc_b; /* SD card */
0025 mmc1 = &sd_emmc_c; /* eMMC */
0026 mmc2 = &sd_emmc_a; /* SDIO */
0027 };
0028
0029 reserved-memory {
0030 #address-cells = <2>;
0031 #size-cells = <2>;
0032 ranges;
0033
0034 /* 16 MiB reserved for Hardware ROM Firmware */
0035 hwrom_reserved: hwrom@0 {
0036 reg = <0x0 0x0 0x0 0x1000000>;
0037 no-map;
0038 };
0039
0040 /* 2 MiB reserved for ARM Trusted Firmware (BL31) */
0041 secmon_reserved: secmon@10000000 {
0042 reg = <0x0 0x10000000 0x0 0x200000>;
0043 no-map;
0044 };
0045
0046 /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
0047 secmon_reserved_alt: secmon@5000000 {
0048 reg = <0x0 0x05000000 0x0 0x300000>;
0049 no-map;
0050 };
0051
0052 /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
0053 secmon_reserved_bl32: secmon@5300000 {
0054 reg = <0x0 0x05300000 0x0 0x2000000>;
0055 no-map;
0056 };
0057
0058 linux,cma {
0059 compatible = "shared-dma-pool";
0060 reusable;
0061 size = <0x0 0x10000000>;
0062 alignment = <0x0 0x400000>;
0063 linux,cma-default;
0064 };
0065 };
0066
0067 chosen {
0068 #address-cells = <2>;
0069 #size-cells = <2>;
0070 ranges;
0071
0072 simplefb_cvbs: framebuffer-cvbs {
0073 compatible = "amlogic,simple-framebuffer",
0074 "simple-framebuffer";
0075 amlogic,pipeline = "vpu-cvbs";
0076 power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
0077 status = "disabled";
0078 };
0079
0080 simplefb_hdmi: framebuffer-hdmi {
0081 compatible = "amlogic,simple-framebuffer",
0082 "simple-framebuffer";
0083 amlogic,pipeline = "vpu-hdmi";
0084 power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
0085 status = "disabled";
0086 };
0087 };
0088
0089 cpus {
0090 #address-cells = <0x2>;
0091 #size-cells = <0x0>;
0092
0093 cpu0: cpu@0 {
0094 device_type = "cpu";
0095 compatible = "arm,cortex-a53";
0096 reg = <0x0 0x0>;
0097 enable-method = "psci";
0098 next-level-cache = <&l2>;
0099 clocks = <&scpi_dvfs 0>;
0100 #cooling-cells = <2>;
0101 };
0102
0103 cpu1: cpu@1 {
0104 device_type = "cpu";
0105 compatible = "arm,cortex-a53";
0106 reg = <0x0 0x1>;
0107 enable-method = "psci";
0108 next-level-cache = <&l2>;
0109 clocks = <&scpi_dvfs 0>;
0110 #cooling-cells = <2>;
0111 };
0112
0113 cpu2: cpu@2 {
0114 device_type = "cpu";
0115 compatible = "arm,cortex-a53";
0116 reg = <0x0 0x2>;
0117 enable-method = "psci";
0118 next-level-cache = <&l2>;
0119 clocks = <&scpi_dvfs 0>;
0120 #cooling-cells = <2>;
0121 };
0122
0123 cpu3: cpu@3 {
0124 device_type = "cpu";
0125 compatible = "arm,cortex-a53";
0126 reg = <0x0 0x3>;
0127 enable-method = "psci";
0128 next-level-cache = <&l2>;
0129 clocks = <&scpi_dvfs 0>;
0130 #cooling-cells = <2>;
0131 };
0132
0133 l2: l2-cache0 {
0134 compatible = "cache";
0135 };
0136 };
0137
0138 thermal-zones {
0139 cpu-thermal {
0140 polling-delay-passive = <250>; /* milliseconds */
0141 polling-delay = <1000>; /* milliseconds */
0142
0143 thermal-sensors = <&scpi_sensors 0>;
0144
0145 trips {
0146 cpu_passive: cpu-passive {
0147 temperature = <80000>; /* millicelsius */
0148 hysteresis = <2000>; /* millicelsius */
0149 type = "passive";
0150 };
0151
0152 cpu_hot: cpu-hot {
0153 temperature = <90000>; /* millicelsius */
0154 hysteresis = <2000>; /* millicelsius */
0155 type = "hot";
0156 };
0157
0158 cpu_critical: cpu-critical {
0159 temperature = <110000>; /* millicelsius */
0160 hysteresis = <2000>; /* millicelsius */
0161 type = "critical";
0162 };
0163 };
0164
0165 cpu_cooling_maps: cooling-maps {
0166 map0 {
0167 trip = <&cpu_passive>;
0168 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
0169 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
0170 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
0171 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
0172 };
0173
0174 map1 {
0175 trip = <&cpu_hot>;
0176 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
0177 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
0178 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
0179 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
0180 };
0181 };
0182 };
0183 };
0184
0185 arm-pmu {
0186 compatible = "arm,cortex-a53-pmu";
0187 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
0188 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
0189 <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
0190 <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
0191 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
0192 };
0193
0194 psci {
0195 compatible = "arm,psci-0.2";
0196 method = "smc";
0197 };
0198
0199 timer {
0200 compatible = "arm,armv8-timer";
0201 interrupts = <GIC_PPI 13
0202 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
0203 <GIC_PPI 14
0204 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
0205 <GIC_PPI 11
0206 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
0207 <GIC_PPI 10
0208 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
0209 };
0210
0211 xtal: xtal-clk {
0212 compatible = "fixed-clock";
0213 clock-frequency = <24000000>;
0214 clock-output-names = "xtal";
0215 #clock-cells = <0>;
0216 };
0217
0218 firmware {
0219 sm: secure-monitor {
0220 compatible = "amlogic,meson-gx-sm", "amlogic,meson-gxbb-sm";
0221 };
0222 };
0223
0224 efuse: efuse {
0225 compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse";
0226 #address-cells = <1>;
0227 #size-cells = <1>;
0228 read-only;
0229 secure-monitor = <&sm>;
0230
0231 sn: sn@14 {
0232 reg = <0x14 0x10>;
0233 };
0234
0235 eth_mac: eth_mac@34 {
0236 reg = <0x34 0x10>;
0237 };
0238
0239 bid: bid@46 {
0240 reg = <0x46 0x30>;
0241 };
0242 };
0243
0244 scpi {
0245 compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
0246 mboxes = <&mailbox 1 &mailbox 2>;
0247 shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
0248
0249 scpi_clocks: clocks {
0250 compatible = "arm,scpi-clocks";
0251
0252 scpi_dvfs: scpi_clocks@0 {
0253 compatible = "arm,scpi-dvfs-clocks";
0254 #clock-cells = <1>;
0255 clock-indices = <0>;
0256 clock-output-names = "vcpu";
0257 };
0258 };
0259
0260 scpi_sensors: sensors {
0261 compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors";
0262 #thermal-sensor-cells = <1>;
0263 };
0264 };
0265
0266 soc {
0267 compatible = "simple-bus";
0268 #address-cells = <2>;
0269 #size-cells = <2>;
0270 ranges;
0271
0272 cbus: bus@c1100000 {
0273 compatible = "simple-bus";
0274 reg = <0x0 0xc1100000 0x0 0x100000>;
0275 #address-cells = <2>;
0276 #size-cells = <2>;
0277 ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
0278
0279 gpio_intc: interrupt-controller@9880 {
0280 compatible = "amlogic,meson-gpio-intc";
0281 reg = <0x0 0x9880 0x0 0x10>;
0282 interrupt-controller;
0283 #interrupt-cells = <2>;
0284 amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
0285 status = "disabled";
0286 };
0287
0288 reset: reset-controller@4404 {
0289 compatible = "amlogic,meson-gxbb-reset";
0290 reg = <0x0 0x04404 0x0 0x9c>;
0291 #reset-cells = <1>;
0292 };
0293
0294 aiu: audio-controller@5400 {
0295 compatible = "amlogic,aiu";
0296 #sound-dai-cells = <2>;
0297 sound-name-prefix = "AIU";
0298 reg = <0x0 0x5400 0x0 0x2ac>;
0299 interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>,
0300 <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
0301 interrupt-names = "i2s", "spdif";
0302 status = "disabled";
0303 };
0304
0305 uart_A: serial@84c0 {
0306 compatible = "amlogic,meson-gx-uart";
0307 reg = <0x0 0x84c0 0x0 0x18>;
0308 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
0309 status = "disabled";
0310 fifo-size = <128>;
0311 };
0312
0313 uart_B: serial@84dc {
0314 compatible = "amlogic,meson-gx-uart";
0315 reg = <0x0 0x84dc 0x0 0x18>;
0316 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
0317 status = "disabled";
0318 };
0319
0320 i2c_A: i2c@8500 {
0321 compatible = "amlogic,meson-gxbb-i2c";
0322 reg = <0x0 0x08500 0x0 0x20>;
0323 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
0324 #address-cells = <1>;
0325 #size-cells = <0>;
0326 status = "disabled";
0327 };
0328
0329 pwm_ab: pwm@8550 {
0330 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
0331 reg = <0x0 0x08550 0x0 0x10>;
0332 #pwm-cells = <3>;
0333 status = "disabled";
0334 };
0335
0336 pwm_cd: pwm@8650 {
0337 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
0338 reg = <0x0 0x08650 0x0 0x10>;
0339 #pwm-cells = <3>;
0340 status = "disabled";
0341 };
0342
0343 saradc: adc@8680 {
0344 compatible = "amlogic,meson-saradc";
0345 reg = <0x0 0x8680 0x0 0x34>;
0346 #io-channel-cells = <1>;
0347 interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
0348 status = "disabled";
0349 };
0350
0351 pwm_ef: pwm@86c0 {
0352 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
0353 reg = <0x0 0x086c0 0x0 0x10>;
0354 #pwm-cells = <3>;
0355 status = "disabled";
0356 };
0357
0358 uart_C: serial@8700 {
0359 compatible = "amlogic,meson-gx-uart";
0360 reg = <0x0 0x8700 0x0 0x18>;
0361 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
0362 status = "disabled";
0363 };
0364
0365 clock-measure@8758 {
0366 compatible = "amlogic,meson-gx-clk-measure";
0367 reg = <0x0 0x8758 0x0 0x10>;
0368 };
0369
0370 i2c_B: i2c@87c0 {
0371 compatible = "amlogic,meson-gxbb-i2c";
0372 reg = <0x0 0x087c0 0x0 0x20>;
0373 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
0374 #address-cells = <1>;
0375 #size-cells = <0>;
0376 status = "disabled";
0377 };
0378
0379 i2c_C: i2c@87e0 {
0380 compatible = "amlogic,meson-gxbb-i2c";
0381 reg = <0x0 0x087e0 0x0 0x20>;
0382 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
0383 #address-cells = <1>;
0384 #size-cells = <0>;
0385 status = "disabled";
0386 };
0387
0388 spicc: spi@8d80 {
0389 compatible = "amlogic,meson-gx-spicc";
0390 reg = <0x0 0x08d80 0x0 0x80>;
0391 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
0392 #address-cells = <1>;
0393 #size-cells = <0>;
0394 status = "disabled";
0395 };
0396
0397 spifc: spi@8c80 {
0398 compatible = "amlogic,meson-gxbb-spifc";
0399 reg = <0x0 0x08c80 0x0 0x80>;
0400 #address-cells = <1>;
0401 #size-cells = <0>;
0402 status = "disabled";
0403 };
0404
0405 watchdog@98d0 {
0406 compatible = "amlogic,meson-gxbb-wdt";
0407 reg = <0x0 0x098d0 0x0 0x10>;
0408 clocks = <&xtal>;
0409 };
0410 };
0411
0412 gic: interrupt-controller@c4301000 {
0413 compatible = "arm,gic-400";
0414 reg = <0x0 0xc4301000 0 0x1000>,
0415 <0x0 0xc4302000 0 0x2000>,
0416 <0x0 0xc4304000 0 0x2000>,
0417 <0x0 0xc4306000 0 0x2000>;
0418 interrupt-controller;
0419 interrupts = <GIC_PPI 9
0420 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
0421 #interrupt-cells = <3>;
0422 #address-cells = <0>;
0423 };
0424
0425 sram: sram@c8000000 {
0426 compatible = "mmio-sram";
0427 reg = <0x0 0xc8000000 0x0 0x14000>;
0428
0429 #address-cells = <1>;
0430 #size-cells = <1>;
0431 ranges = <0 0x0 0xc8000000 0x14000>;
0432
0433 cpu_scp_lpri: scp-sram@0 {
0434 compatible = "amlogic,meson-gxbb-scp-shmem";
0435 reg = <0x13000 0x400>;
0436 };
0437
0438 cpu_scp_hpri: scp-sram@200 {
0439 compatible = "amlogic,meson-gxbb-scp-shmem";
0440 reg = <0x13400 0x400>;
0441 };
0442 };
0443
0444 aobus: bus@c8100000 {
0445 compatible = "simple-bus";
0446 reg = <0x0 0xc8100000 0x0 0x100000>;
0447 #address-cells = <2>;
0448 #size-cells = <2>;
0449 ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
0450
0451 sysctrl_AO: sys-ctrl@0 {
0452 compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon";
0453 reg = <0x0 0x0 0x0 0x100>;
0454
0455 clkc_AO: clock-controller {
0456 compatible = "amlogic,meson-gx-aoclkc";
0457 #clock-cells = <1>;
0458 #reset-cells = <1>;
0459 };
0460 };
0461
0462 cec_AO: cec@100 {
0463 compatible = "amlogic,meson-gx-ao-cec";
0464 reg = <0x0 0x00100 0x0 0x14>;
0465 interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
0466 status = "disabled";
0467 };
0468
0469 sec_AO: ao-secure@140 {
0470 compatible = "amlogic,meson-gx-ao-secure", "syscon";
0471 reg = <0x0 0x140 0x0 0x140>;
0472 amlogic,has-chip-id;
0473 };
0474
0475 uart_AO: serial@4c0 {
0476 compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
0477 reg = <0x0 0x004c0 0x0 0x18>;
0478 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
0479 status = "disabled";
0480 };
0481
0482 uart_AO_B: serial@4e0 {
0483 compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
0484 reg = <0x0 0x004e0 0x0 0x18>;
0485 interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
0486 status = "disabled";
0487 };
0488
0489 i2c_AO: i2c@500 {
0490 compatible = "amlogic,meson-gxbb-i2c";
0491 reg = <0x0 0x500 0x0 0x20>;
0492 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
0493 #address-cells = <1>;
0494 #size-cells = <0>;
0495 status = "disabled";
0496 };
0497
0498 pwm_AO_ab: pwm@550 {
0499 compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
0500 reg = <0x0 0x00550 0x0 0x10>;
0501 #pwm-cells = <3>;
0502 status = "disabled";
0503 };
0504
0505 ir: ir@580 {
0506 compatible = "amlogic,meson-gx-ir", "amlogic,meson-gxbb-ir";
0507 reg = <0x0 0x00580 0x0 0x40>;
0508 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
0509 status = "disabled";
0510 };
0511 };
0512
0513 vdec: video-codec@c8820000 {
0514 compatible = "amlogic,gx-vdec";
0515 reg = <0x0 0xc8820000 0x0 0x10000>,
0516 <0x0 0xc110a580 0x0 0xe4>;
0517 reg-names = "dos", "esparser";
0518
0519 interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
0520 <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
0521 interrupt-names = "vdec", "esparser";
0522
0523 amlogic,ao-sysctrl = <&sysctrl_AO>;
0524 amlogic,canvas = <&canvas>;
0525 };
0526
0527 periphs: bus@c8834000 {
0528 compatible = "simple-bus";
0529 reg = <0x0 0xc8834000 0x0 0x2000>;
0530 #address-cells = <2>;
0531 #size-cells = <2>;
0532 ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
0533
0534 hwrng: rng {
0535 compatible = "amlogic,meson-rng";
0536 reg = <0x0 0x0 0x0 0x4>;
0537 };
0538 };
0539
0540 dmcbus: bus@c8838000 {
0541 compatible = "simple-bus";
0542 reg = <0x0 0xc8838000 0x0 0x400>;
0543 #address-cells = <2>;
0544 #size-cells = <2>;
0545 ranges = <0x0 0x0 0x0 0xc8838000 0x0 0x400>;
0546
0547 canvas: video-lut@48 {
0548 compatible = "amlogic,canvas";
0549 reg = <0x0 0x48 0x0 0x14>;
0550 };
0551 };
0552
0553 hiubus: bus@c883c000 {
0554 compatible = "simple-bus";
0555 reg = <0x0 0xc883c000 0x0 0x2000>;
0556 #address-cells = <2>;
0557 #size-cells = <2>;
0558 ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
0559
0560 sysctrl: system-controller@0 {
0561 compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon";
0562 reg = <0 0 0 0x400>;
0563
0564 pwrc: power-controller {
0565 compatible = "amlogic,meson-gxbb-pwrc";
0566 #power-domain-cells = <1>;
0567 amlogic,ao-sysctrl = <&sysctrl_AO>;
0568 };
0569 };
0570
0571 mailbox: mailbox@404 {
0572 compatible = "amlogic,meson-gxbb-mhu";
0573 reg = <0 0x404 0 0x4c>;
0574 interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
0575 <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
0576 <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
0577 #mbox-cells = <1>;
0578 };
0579 };
0580
0581 ethmac: ethernet@c9410000 {
0582 compatible = "amlogic,meson-gxbb-dwmac",
0583 "snps,dwmac-3.70a",
0584 "snps,dwmac";
0585 reg = <0x0 0xc9410000 0x0 0x10000>,
0586 <0x0 0xc8834540 0x0 0x4>;
0587 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
0588 interrupt-names = "macirq";
0589 rx-fifo-depth = <4096>;
0590 tx-fifo-depth = <2048>;
0591 power-domains = <&pwrc PWRC_GXBB_ETHERNET_MEM_ID>;
0592 status = "disabled";
0593 };
0594
0595 apb: apb@d0000000 {
0596 compatible = "simple-bus";
0597 reg = <0x0 0xd0000000 0x0 0x200000>;
0598 #address-cells = <2>;
0599 #size-cells = <2>;
0600 ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
0601
0602 sd_emmc_a: mmc@70000 {
0603 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
0604 reg = <0x0 0x70000 0x0 0x800>;
0605 interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
0606 status = "disabled";
0607 };
0608
0609 sd_emmc_b: mmc@72000 {
0610 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
0611 reg = <0x0 0x72000 0x0 0x800>;
0612 interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
0613 status = "disabled";
0614 };
0615
0616 sd_emmc_c: mmc@74000 {
0617 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
0618 reg = <0x0 0x74000 0x0 0x800>;
0619 interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
0620 status = "disabled";
0621 };
0622 };
0623
0624 vpu: vpu@d0100000 {
0625 compatible = "amlogic,meson-gx-vpu";
0626 reg = <0x0 0xd0100000 0x0 0x100000>,
0627 <0x0 0xc883c000 0x0 0x1000>;
0628 reg-names = "vpu", "hhi";
0629 interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
0630 #address-cells = <1>;
0631 #size-cells = <0>;
0632 amlogic,canvas = <&canvas>;
0633
0634 /* CVBS VDAC output port */
0635 cvbs_vdac_port: port@0 {
0636 reg = <0>;
0637 };
0638
0639 /* HDMI-TX output port */
0640 hdmi_tx_port: port@1 {
0641 reg = <1>;
0642
0643 hdmi_tx_out: endpoint {
0644 remote-endpoint = <&hdmi_tx_in>;
0645 };
0646 };
0647 };
0648
0649 hdmi_tx: hdmi-tx@c883a000 {
0650 compatible = "amlogic,meson-gx-dw-hdmi";
0651 reg = <0x0 0xc883a000 0x0 0x1c>;
0652 interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
0653 #address-cells = <1>;
0654 #size-cells = <0>;
0655 #sound-dai-cells = <0>;
0656 sound-name-prefix = "HDMITX";
0657 status = "disabled";
0658
0659 /* VPU VENC Input */
0660 hdmi_tx_venc_port: port@0 {
0661 reg = <0>;
0662
0663 hdmi_tx_in: endpoint {
0664 remote-endpoint = <&hdmi_tx_out>;
0665 };
0666 };
0667
0668 /* TMDS Output */
0669 hdmi_tx_tmds_port: port@1 {
0670 reg = <1>;
0671 };
0672 };
0673 };
0674 };
