0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Copyright (c) 2019 BayLibre, SAS
0004 * Author: Neil Armstrong <narmstrong@baylibre.com>
0005 */
0006
0007 #include "meson-g12.dtsi"
0008
0009 / {
0010 compatible = "amlogic,g12b";
0011
0012 cpus {
0013 #address-cells = <0x2>;
0014 #size-cells = <0x0>;
0015
0016 cpu-map {
0017 cluster0 {
0018 core0 {
0019 cpu = <&cpu0>;
0020 };
0021
0022 core1 {
0023 cpu = <&cpu1>;
0024 };
0025 };
0026
0027 cluster1 {
0028 core0 {
0029 cpu = <&cpu100>;
0030 };
0031
0032 core1 {
0033 cpu = <&cpu101>;
0034 };
0035
0036 core2 {
0037 cpu = <&cpu102>;
0038 };
0039
0040 core3 {
0041 cpu = <&cpu103>;
0042 };
0043 };
0044 };
0045
0046 cpu0: cpu@0 {
0047 device_type = "cpu";
0048 compatible = "arm,cortex-a53";
0049 reg = <0x0 0x0>;
0050 enable-method = "psci";
0051 capacity-dmips-mhz = <592>;
0052 next-level-cache = <&l2>;
0053 #cooling-cells = <2>;
0054 };
0055
0056 cpu1: cpu@1 {
0057 device_type = "cpu";
0058 compatible = "arm,cortex-a53";
0059 reg = <0x0 0x1>;
0060 enable-method = "psci";
0061 capacity-dmips-mhz = <592>;
0062 next-level-cache = <&l2>;
0063 #cooling-cells = <2>;
0064 };
0065
0066 cpu100: cpu@100 {
0067 device_type = "cpu";
0068 compatible = "arm,cortex-a73";
0069 reg = <0x0 0x100>;
0070 enable-method = "psci";
0071 capacity-dmips-mhz = <1024>;
0072 next-level-cache = <&l2>;
0073 #cooling-cells = <2>;
0074 };
0075
0076 cpu101: cpu@101 {
0077 device_type = "cpu";
0078 compatible = "arm,cortex-a73";
0079 reg = <0x0 0x101>;
0080 enable-method = "psci";
0081 capacity-dmips-mhz = <1024>;
0082 next-level-cache = <&l2>;
0083 #cooling-cells = <2>;
0084 };
0085
0086 cpu102: cpu@102 {
0087 device_type = "cpu";
0088 compatible = "arm,cortex-a73";
0089 reg = <0x0 0x102>;
0090 enable-method = "psci";
0091 capacity-dmips-mhz = <1024>;
0092 next-level-cache = <&l2>;
0093 #cooling-cells = <2>;
0094 };
0095
0096 cpu103: cpu@103 {
0097 device_type = "cpu";
0098 compatible = "arm,cortex-a73";
0099 reg = <0x0 0x103>;
0100 enable-method = "psci";
0101 capacity-dmips-mhz = <1024>;
0102 next-level-cache = <&l2>;
0103 #cooling-cells = <2>;
0104 };
0105
0106 l2: l2-cache0 {
0107 compatible = "cache";
0108 };
0109 };
0110 };
0111
0112 &clkc {
0113 compatible = "amlogic,g12b-clkc";
0114 };
0115
0116 &cpu_thermal {
0117 cooling-maps {
0118 map0 {
0119 trip = <&cpu_passive>;
0120 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
0121 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
0122 <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
0123 <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
0124 <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
0125 <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
0126 };
0127 map1 {
0128 trip = <&cpu_hot>;
0129 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
0130 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
0131 <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
0132 <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
0133 <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
0134 <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
0135 };
0136 };
0137 };
0138
0139 &mali {
0140 dma-coherent;
0141 };
