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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003  * Copyright (c) 2019 BayLibre, SAS
0004  * Author: Neil Armstrong <narmstrong@baylibre.com>
0005  * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
0006  */
0007 
0008 /dts-v1/;
0009 
0010 #include "meson-g12b-a311d.dtsi"
0011 #include "meson-khadas-vim3.dtsi"
0012 #include "meson-g12b-khadas-vim3.dtsi"
0013 
0014 / {
0015         compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b";
0016 };
0017 
0018 /*
0019  * The VIM3 on-board  MCU can mux the PCIe/USB3.0 shared differential
0020  * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
0021  * an USB3.0 Type A connector and a M.2 Key M slot.
0022  * The PHY driving these differential lines is shared between
0023  * the USB3.0 controller and the PCIe Controller, thus only
0024  * a single controller can use it.
0025  * If the MCU is configured to mux the PCIe/USB3.0 differential lines
0026  * to the M.2 Key M slot, uncomment the following block to disable
0027  * USB3.0 from the USB Complex and enable the PCIe controller.
0028  * The End User is not expected to uncomment the following except for
0029  * testing purposes, but instead rely on the firmware/bootloader to
0030  * update these nodes accordingly if PCIe mode is selected by the MCU.
0031  */
0032 /*
0033 &pcie {
0034         status = "okay";
0035 };
0036 
0037 &usb {
0038         phys = <&usb2_phy0>, <&usb2_phy1>;
0039         phy-names = "usb2-phy0", "usb2-phy1";
0040 };
0041  */