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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 // Copyright (C) 2020 Chen-Yu Tsai <wens@csie.org>
0003 
0004 / {
0005         cpu_opp_table: opp-table-cpu {
0006                 compatible = "operating-points-v2";
0007                 opp-shared;
0008 
0009                 opp-408000000 {
0010                         opp-hz = /bits/ 64 <408000000>;
0011                         opp-microvolt = <1000000 1000000 1310000>;
0012                         clock-latency-ns = <244144>; /* 8 32k periods */
0013                 };
0014 
0015                 opp-648000000 {
0016                         opp-hz = /bits/ 64 <648000000>;
0017                         opp-microvolt = <1040000 1040000 1310000>;
0018                         clock-latency-ns = <244144>; /* 8 32k periods */
0019                 };
0020 
0021                 opp-816000000 {
0022                         opp-hz = /bits/ 64 <816000000>;
0023                         opp-microvolt = <1080000 1080000 1310000>;
0024                         clock-latency-ns = <244144>; /* 8 32k periods */
0025                 };
0026 
0027                 opp-912000000 {
0028                         opp-hz = /bits/ 64 <912000000>;
0029                         opp-microvolt = <1120000 1120000 1310000>;
0030                         clock-latency-ns = <244144>; /* 8 32k periods */
0031                 };
0032 
0033                 opp-960000000 {
0034                         opp-hz = /bits/ 64 <960000000>;
0035                         opp-microvolt = <1160000 1160000 1310000>;
0036                         clock-latency-ns = <244144>; /* 8 32k periods */
0037                 };
0038 
0039                 opp-1008000000 {
0040                         opp-hz = /bits/ 64 <1008000000>;
0041                         opp-microvolt = <1200000 1200000 1310000>;
0042                         clock-latency-ns = <244144>; /* 8 32k periods */
0043                 };
0044 
0045                 opp-1056000000 {
0046                         opp-hz = /bits/ 64 <1056000000>;
0047                         opp-microvolt = <1240000 1240000 1310000>;
0048                         clock-latency-ns = <244144>; /* 8 32k periods */
0049                 };
0050 
0051                 opp-1104000000 {
0052                         opp-hz = /bits/ 64 <1104000000>;
0053                         opp-microvolt = <1260000 1260000 1310000>;
0054                         clock-latency-ns = <244144>; /* 8 32k periods */
0055                 };
0056 
0057                 opp-1152000000 {
0058                         opp-hz = /bits/ 64 <1152000000>;
0059                         opp-microvolt = <1300000 1300000 1310000>;
0060                         clock-latency-ns = <244144>; /* 8 32k periods */
0061                 };
0062         };
0063 };
0064 
0065 &cpu0 {
0066         operating-points-v2 = <&cpu_opp_table>;
0067 };
0068 
0069 &cpu1 {
0070         operating-points-v2 = <&cpu_opp_table>;
0071 };
0072 
0073 &cpu2 {
0074         operating-points-v2 = <&cpu_opp_table>;
0075 };
0076 
0077 &cpu3 {
0078         operating-points-v2 = <&cpu_opp_table>;
0079 };