0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
0004 */
0005
0006 #include <dt-bindings/gpio/gpio.h>
0007
0008 / {
0009 #address-cells = <1>;
0010 #size-cells = <1>;
0011
0012 memory {
0013 device_type = "memory";
0014 reg = <0x00000000 0x04000000>,
0015 <0x08000000 0x04000000>;
0016 };
0017
0018 L2: cache-controller {
0019 compatible = "arm,l210-cache";
0020 reg = <0x10210000 0x1000>;
0021 interrupt-parent = <&vica>;
0022 interrupts = <30>;
0023 cache-unified;
0024 cache-level = <2>;
0025 cache-size = <131072>;
0026 cache-sets = <512>;
0027 cache-line-size = <32>;
0028 /* At full speed latency must be >=2 */
0029 arm,tag-latency = <8>;
0030 arm,data-latency = <8 8>;
0031 arm,dirty-latency = <8>;
0032 };
0033
0034 mtu0: mtu@101e2000 {
0035 /* Nomadik system timer */
0036 compatible = "st,nomadik-mtu";
0037 reg = <0x101e2000 0x1000>;
0038 interrupt-parent = <&vica>;
0039 interrupts = <4>;
0040 clocks = <&timclk>, <&pclk>;
0041 clock-names = "timclk", "apb_pclk";
0042 };
0043
0044 mtu1: mtu@101e3000 {
0045 /* Secondary timer */
0046 reg = <0x101e3000 0x1000>;
0047 interrupt-parent = <&vica>;
0048 interrupts = <5>;
0049 clocks = <&timclk>, <&pclk>;
0050 clock-names = "timclk", "apb_pclk";
0051 };
0052
0053 gpio0: gpio@101e4000 {
0054 compatible = "st,nomadik-gpio";
0055 reg = <0x101e4000 0x80>;
0056 interrupt-parent = <&vica>;
0057 interrupts = <6>;
0058 interrupt-controller;
0059 #interrupt-cells = <2>;
0060 gpio-controller;
0061 #gpio-cells = <2>;
0062 gpio-bank = <0>;
0063 gpio-ranges = <&pinctrl 0 0 32>;
0064 clocks = <&pclk>;
0065 };
0066
0067 gpio1: gpio@101e5000 {
0068 compatible = "st,nomadik-gpio";
0069 reg = <0x101e5000 0x80>;
0070 interrupt-parent = <&vica>;
0071 interrupts = <7>;
0072 interrupt-controller;
0073 #interrupt-cells = <2>;
0074 gpio-controller;
0075 #gpio-cells = <2>;
0076 gpio-bank = <1>;
0077 gpio-ranges = <&pinctrl 0 32 32>;
0078 clocks = <&pclk>;
0079 };
0080
0081 gpio2: gpio@101e6000 {
0082 compatible = "st,nomadik-gpio";
0083 reg = <0x101e6000 0x80>;
0084 interrupt-parent = <&vica>;
0085 interrupts = <8>;
0086 interrupt-controller;
0087 #interrupt-cells = <2>;
0088 gpio-controller;
0089 #gpio-cells = <2>;
0090 gpio-bank = <2>;
0091 gpio-ranges = <&pinctrl 0 64 32>;
0092 clocks = <&pclk>;
0093 };
0094
0095 gpio3: gpio@101e7000 {
0096 compatible = "st,nomadik-gpio";
0097 reg = <0x101e7000 0x80>;
0098 ngpio = <28>;
0099 interrupt-parent = <&vica>;
0100 interrupts = <9>;
0101 interrupt-controller;
0102 #interrupt-cells = <2>;
0103 gpio-controller;
0104 #gpio-cells = <2>;
0105 gpio-bank = <3>;
0106 gpio-ranges = <&pinctrl 0 96 28>;
0107 clocks = <&pclk>;
0108 };
0109
0110 pinctrl: pinctrl {
0111 compatible = "stericsson,stn8815-pinctrl";
0112 nomadik-gpio-chips = <&gpio0>, <&gpio1>, <&gpio2>, <&gpio3>;
0113 /* Pin configurations */
0114 uart1 {
0115 uart1_default_mux: uart1_mux {
0116 u1_default_mux {
0117 function = "u1";
0118 groups = "u1_a_1";
0119 };
0120 };
0121 };
0122 mmcsd {
0123 mmcsd_default_mux: mmcsd_mux {
0124 mmcsd_default_mux {
0125 function = "mmcsd";
0126 groups = "mmcsd_a_1", "mmcsd_b_1";
0127 };
0128 };
0129 mmcsd_default_mode: mmcsd_default {
0130 mmcsd_default_cfg1 {
0131 /*
0132 * MCCLK, MCCMDDIR, MCDAT0DIR, MCDAT31DIR, MCDATDIR2
0133 * MCCMD, MCDAT3-0, MCMSFBCLK
0134 */
0135 pins = "GPIO8_B10", "GPIO9_A10", "GPIO10_C11", "GPIO11_B11",
0136 "GPIO12_A11", "GPIO13_C12", "GPIO14_B12", "GPIO15_A12",
0137 "GPIO16_C13", "GPIO23_D15", "GPIO24_C15";
0138 ste,output = <2>;
0139 };
0140 };
0141 };
0142 i2c0 {
0143 i2c0_default_mux: i2c0_mux {
0144 i2c0_default_mux {
0145 function = "i2c0";
0146 groups = "i2c0_a_1";
0147 };
0148 };
0149 i2c0_default_mode: i2c0_default {
0150 i2c0_default_cfg {
0151 pins = "GPIO62_D3", "GPIO63_D2";
0152 ste,input = <0>;
0153 };
0154 };
0155 };
0156 i2c1 {
0157 i2c1_default_mux: i2c1_mux {
0158 i2c1_default_mux {
0159 function = "i2c1";
0160 groups = "i2c1_a_1";
0161 };
0162 };
0163 i2c1_default_mode: i2c1_default {
0164 i2c1_default_cfg {
0165 pins = "GPIO53_L4", "GPIO54_L3";
0166 ste,input = <0>;
0167 };
0168 };
0169 };
0170 clcd {
0171 /*
0172 * This should be activated to use the additional
0173 * 8 lines for bits 16 thru 23 from the CLCD block.
0174 */
0175 clcd_24bit_mux: clcd_mux {
0176 clcd_24bit_mux {
0177 function = "clcd";
0178 groups = "clcd_16_23_b_1";
0179 };
0180 };
0181 };
0182 };
0183
0184 /* Power Management Unit */
0185 pmu: pmu@101e9000 {
0186 compatible = "stericsson,nomadik-pmu", "syscon";
0187 reg = <0x101e0000 0x1000>;
0188 };
0189
0190 src: src@101e0000 {
0191 compatible = "stericsson,nomadik-src";
0192 reg = <0x101e0000 0x1000>;
0193
0194 /*
0195 * MXTAL "Main Chrystal" is a chrystal oscillator @19.2 MHz
0196 * that is parent of TIMCLK, PLL1 and PLL2
0197 */
0198 mxtal: mxtal@19.2M {
0199 #clock-cells = <0>;
0200 compatible = "fixed-clock";
0201 clock-frequency = <19200000>;
0202 };
0203
0204 /*
0205 * The 2.4 MHz TIMCLK reference clock is active at
0206 * boot time, this is actually the MXTALCLK @19.2 MHz
0207 * divided by 8. This clock is used by the timers and
0208 * watchdog. See page 105 ff.
0209 */
0210 timclk: timclk@2.4M {
0211 #clock-cells = <0>;
0212 compatible = "fixed-factor-clock";
0213 clock-div = <8>;
0214 clock-mult = <1>;
0215 clocks = <&mxtal>;
0216 };
0217
0218 /* PLL1 is locked to MXTALI and variable from 20.4 to 334 MHz */
0219 pll1: pll1@0 {
0220 #clock-cells = <0>;
0221 compatible = "st,nomadik-pll-clock";
0222 pll-id = <1>;
0223 clocks = <&mxtal>;
0224 };
0225
0226 /* HCLK divides the PLL1 with 1,2,3 or 4 */
0227 hclk: hclk@0 {
0228 #clock-cells = <0>;
0229 compatible = "st,nomadik-hclk-clock";
0230 clocks = <&pll1>;
0231 };
0232 /* The PCLK domain uses HCLK right off */
0233 pclk: pclk@0 {
0234 #clock-cells = <0>;
0235 compatible = "fixed-factor-clock";
0236 clock-div = <1>;
0237 clock-mult = <1>;
0238 clocks = <&hclk>;
0239 };
0240
0241 /* PLL2 is usually 864 MHz and divided into a few fixed rates */
0242 pll2: pll2@0 {
0243 #clock-cells = <0>;
0244 compatible = "st,nomadik-pll-clock";
0245 pll-id = <2>;
0246 clocks = <&mxtal>;
0247 };
0248 clk216: clk216@216M {
0249 #clock-cells = <0>;
0250 compatible = "fixed-factor-clock";
0251 clock-div = <4>;
0252 clock-mult = <1>;
0253 clocks = <&pll2>;
0254 };
0255 clk108: clk108@108M {
0256 #clock-cells = <0>;
0257 compatible = "fixed-factor-clock";
0258 clock-div = <2>;
0259 clock-mult = <1>;
0260 clocks = <&clk216>;
0261 };
0262 clk72: clk72@72M {
0263 #clock-cells = <0>;
0264 compatible = "fixed-factor-clock";
0265 /* The data sheet does not say how this is derived */
0266 clock-div = <12>;
0267 clock-mult = <1>;
0268 clocks = <&pll2>;
0269 };
0270 clk48: clk48@48M {
0271 #clock-cells = <0>;
0272 compatible = "fixed-factor-clock";
0273 /* The data sheet does not say how this is derived */
0274 clock-div = <18>;
0275 clock-mult = <1>;
0276 clocks = <&pll2>;
0277 };
0278 clk27: clk27@27M {
0279 #clock-cells = <0>;
0280 compatible = "fixed-factor-clock";
0281 clock-div = <4>;
0282 clock-mult = <1>;
0283 clocks = <&clk108>;
0284 };
0285
0286 /* This apparently exists as well */
0287 ulpiclk: ulpiclk@60M {
0288 #clock-cells = <0>;
0289 compatible = "fixed-clock";
0290 clock-frequency = <60000000>;
0291 };
0292
0293 /*
0294 * IP AMBA bus clocks, driving the bus side of the
0295 * peripheral clocking, clock gates.
0296 */
0297
0298 hclkdma0: hclkdma0@48M {
0299 #clock-cells = <0>;
0300 compatible = "st,nomadik-src-clock";
0301 clock-id = <0>;
0302 clocks = <&hclk>;
0303 };
0304 hclksmc: hclksmc@48M {
0305 #clock-cells = <0>;
0306 compatible = "st,nomadik-src-clock";
0307 clock-id = <1>;
0308 clocks = <&hclk>;
0309 };
0310 hclksdram: hclksdram@48M {
0311 #clock-cells = <0>;
0312 compatible = "st,nomadik-src-clock";
0313 clock-id = <2>;
0314 clocks = <&hclk>;
0315 };
0316 hclkdma1: hclkdma1@48M {
0317 #clock-cells = <0>;
0318 compatible = "st,nomadik-src-clock";
0319 clock-id = <3>;
0320 clocks = <&hclk>;
0321 };
0322 hclkclcd: hclkclcd@48M {
0323 #clock-cells = <0>;
0324 compatible = "st,nomadik-src-clock";
0325 clock-id = <4>;
0326 clocks = <&hclk>;
0327 };
0328 pclkirda: pclkirda@48M {
0329 #clock-cells = <0>;
0330 compatible = "st,nomadik-src-clock";
0331 clock-id = <5>;
0332 clocks = <&pclk>;
0333 };
0334 pclkssp: pclkssp@48M {
0335 #clock-cells = <0>;
0336 compatible = "st,nomadik-src-clock";
0337 clock-id = <6>;
0338 clocks = <&pclk>;
0339 };
0340 pclkuart0: pclkuart0@48M {
0341 #clock-cells = <0>;
0342 compatible = "st,nomadik-src-clock";
0343 clock-id = <7>;
0344 clocks = <&pclk>;
0345 };
0346 pclksdi: pclksdi@48M {
0347 #clock-cells = <0>;
0348 compatible = "st,nomadik-src-clock";
0349 clock-id = <8>;
0350 clocks = <&pclk>;
0351 };
0352 pclki2c0: pclki2c0@48M {
0353 #clock-cells = <0>;
0354 compatible = "st,nomadik-src-clock";
0355 clock-id = <9>;
0356 clocks = <&pclk>;
0357 };
0358 pclki2c1: pclki2c1@48M {
0359 #clock-cells = <0>;
0360 compatible = "st,nomadik-src-clock";
0361 clock-id = <10>;
0362 clocks = <&pclk>;
0363 };
0364 pclkuart1: pclkuart1@48M {
0365 #clock-cells = <0>;
0366 compatible = "st,nomadik-src-clock";
0367 clock-id = <11>;
0368 clocks = <&pclk>;
0369 };
0370 pclkmsp0: pclkmsp0@48M {
0371 #clock-cells = <0>;
0372 compatible = "st,nomadik-src-clock";
0373 clock-id = <12>;
0374 clocks = <&pclk>;
0375 };
0376 hclkusb: hclkusb@48M {
0377 #clock-cells = <0>;
0378 compatible = "st,nomadik-src-clock";
0379 clock-id = <13>;
0380 clocks = <&hclk>;
0381 };
0382 hclkdif: hclkdif@48M {
0383 #clock-cells = <0>;
0384 compatible = "st,nomadik-src-clock";
0385 clock-id = <14>;
0386 clocks = <&hclk>;
0387 };
0388 hclksaa: hclksaa@48M {
0389 #clock-cells = <0>;
0390 compatible = "st,nomadik-src-clock";
0391 clock-id = <15>;
0392 clocks = <&hclk>;
0393 };
0394 hclksva: hclksva@48M {
0395 #clock-cells = <0>;
0396 compatible = "st,nomadik-src-clock";
0397 clock-id = <16>;
0398 clocks = <&hclk>;
0399 };
0400 pclkhsi: pclkhsi@48M {
0401 #clock-cells = <0>;
0402 compatible = "st,nomadik-src-clock";
0403 clock-id = <17>;
0404 clocks = <&pclk>;
0405 };
0406 pclkxti: pclkxti@48M {
0407 #clock-cells = <0>;
0408 compatible = "st,nomadik-src-clock";
0409 clock-id = <18>;
0410 clocks = <&pclk>;
0411 };
0412 pclkuart2: pclkuart2@48M {
0413 #clock-cells = <0>;
0414 compatible = "st,nomadik-src-clock";
0415 clock-id = <19>;
0416 clocks = <&pclk>;
0417 };
0418 pclkmsp1: pclkmsp1@48M {
0419 #clock-cells = <0>;
0420 compatible = "st,nomadik-src-clock";
0421 clock-id = <20>;
0422 clocks = <&pclk>;
0423 };
0424 pclkmsp2: pclkmsp2@48M {
0425 #clock-cells = <0>;
0426 compatible = "st,nomadik-src-clock";
0427 clock-id = <21>;
0428 clocks = <&pclk>;
0429 };
0430 pclkowm: pclkowm@48M {
0431 #clock-cells = <0>;
0432 compatible = "st,nomadik-src-clock";
0433 clock-id = <22>;
0434 clocks = <&pclk>;
0435 };
0436 hclkhpi: hclkhpi@48M {
0437 #clock-cells = <0>;
0438 compatible = "st,nomadik-src-clock";
0439 clock-id = <23>;
0440 clocks = <&hclk>;
0441 };
0442 pclkske: pclkske@48M {
0443 #clock-cells = <0>;
0444 compatible = "st,nomadik-src-clock";
0445 clock-id = <24>;
0446 clocks = <&pclk>;
0447 };
0448 pclkhsem: pclkhsem@48M {
0449 #clock-cells = <0>;
0450 compatible = "st,nomadik-src-clock";
0451 clock-id = <25>;
0452 clocks = <&pclk>;
0453 };
0454 hclk3d: hclk3d@48M {
0455 #clock-cells = <0>;
0456 compatible = "st,nomadik-src-clock";
0457 clock-id = <26>;
0458 clocks = <&hclk>;
0459 };
0460 hclkhash: hclkhash@48M {
0461 #clock-cells = <0>;
0462 compatible = "st,nomadik-src-clock";
0463 clock-id = <27>;
0464 clocks = <&hclk>;
0465 };
0466 hclkcryp: hclkcryp@48M {
0467 #clock-cells = <0>;
0468 compatible = "st,nomadik-src-clock";
0469 clock-id = <28>;
0470 clocks = <&hclk>;
0471 };
0472 pclkmshc: pclkmshc@48M {
0473 #clock-cells = <0>;
0474 compatible = "st,nomadik-src-clock";
0475 clock-id = <29>;
0476 clocks = <&pclk>;
0477 };
0478 hclkusbm: hclkusbm@48M {
0479 #clock-cells = <0>;
0480 compatible = "st,nomadik-src-clock";
0481 clock-id = <30>;
0482 clocks = <&hclk>;
0483 };
0484 hclkrng: hclkrng@48M {
0485 #clock-cells = <0>;
0486 compatible = "st,nomadik-src-clock";
0487 clock-id = <31>;
0488 clocks = <&hclk>;
0489 };
0490
0491 /* IP kernel clocks */
0492 clcdclk: clcdclk@0 {
0493 #clock-cells = <0>;
0494 compatible = "st,nomadik-src-clock";
0495 clock-id = <36>;
0496 clocks = <&clk72 &clk48>;
0497 };
0498 irdaclk: irdaclk@48M {
0499 #clock-cells = <0>;
0500 compatible = "st,nomadik-src-clock";
0501 clock-id = <37>;
0502 clocks = <&clk48>;
0503 };
0504 sspiclk: sspiclk@48M {
0505 #clock-cells = <0>;
0506 compatible = "st,nomadik-src-clock";
0507 clock-id = <38>;
0508 clocks = <&clk48>;
0509 };
0510 uart0clk: uart0clk@48M {
0511 #clock-cells = <0>;
0512 compatible = "st,nomadik-src-clock";
0513 clock-id = <39>;
0514 clocks = <&clk48>;
0515 };
0516 sdiclk: sdiclk@48M {
0517 /* Also called MCCLK in some documents */
0518 #clock-cells = <0>;
0519 compatible = "st,nomadik-src-clock";
0520 clock-id = <40>;
0521 clocks = <&clk48>;
0522 };
0523 i2c0clk: i2c0clk@48M {
0524 #clock-cells = <0>;
0525 compatible = "st,nomadik-src-clock";
0526 clock-id = <41>;
0527 clocks = <&clk48>;
0528 };
0529 i2c1clk: i2c1clk@48M {
0530 #clock-cells = <0>;
0531 compatible = "st,nomadik-src-clock";
0532 clock-id = <42>;
0533 clocks = <&clk48>;
0534 };
0535 uart1clk: uart1clk@48M {
0536 #clock-cells = <0>;
0537 compatible = "st,nomadik-src-clock";
0538 clock-id = <43>;
0539 clocks = <&clk48>;
0540 };
0541 mspclk0: mspclk0@48M {
0542 #clock-cells = <0>;
0543 compatible = "st,nomadik-src-clock";
0544 clock-id = <44>;
0545 clocks = <&clk48>;
0546 };
0547 usbclk: usbclk@48M {
0548 #clock-cells = <0>;
0549 compatible = "st,nomadik-src-clock";
0550 clock-id = <45>;
0551 clocks = <&clk48>; /* 48 MHz not ULPI */
0552 };
0553 difclk: difclk@72M {
0554 #clock-cells = <0>;
0555 compatible = "st,nomadik-src-clock";
0556 clock-id = <46>;
0557 clocks = <&clk72>;
0558 };
0559 ipi2cclk: ipi2cclk@48M {
0560 #clock-cells = <0>;
0561 compatible = "st,nomadik-src-clock";
0562 clock-id = <47>;
0563 clocks = <&clk48>; /* Guess */
0564 };
0565 ipbmcclk: ipbmcclk@48M {
0566 #clock-cells = <0>;
0567 compatible = "st,nomadik-src-clock";
0568 clock-id = <48>;
0569 clocks = <&clk48>; /* Guess */
0570 };
0571 hsiclkrx: hsiclkrx@216M {
0572 #clock-cells = <0>;
0573 compatible = "st,nomadik-src-clock";
0574 clock-id = <49>;
0575 clocks = <&clk216>;
0576 };
0577 hsiclktx: hsiclktx@108M {
0578 #clock-cells = <0>;
0579 compatible = "st,nomadik-src-clock";
0580 clock-id = <50>;
0581 clocks = <&clk108>;
0582 };
0583 uart2clk: uart2clk@48M {
0584 #clock-cells = <0>;
0585 compatible = "st,nomadik-src-clock";
0586 clock-id = <51>;
0587 clocks = <&clk48>;
0588 };
0589 mspclk1: mspclk1@48M {
0590 #clock-cells = <0>;
0591 compatible = "st,nomadik-src-clock";
0592 clock-id = <52>;
0593 clocks = <&clk48>;
0594 };
0595 mspclk2: mspclk2@48M {
0596 #clock-cells = <0>;
0597 compatible = "st,nomadik-src-clock";
0598 clock-id = <53>;
0599 clocks = <&clk48>;
0600 };
0601 owmclk: owmclk@48M {
0602 #clock-cells = <0>;
0603 compatible = "st,nomadik-src-clock";
0604 clock-id = <54>;
0605 clocks = <&clk48>; /* Guess */
0606 };
0607 skeclk: skeclk@48M {
0608 #clock-cells = <0>;
0609 compatible = "st,nomadik-src-clock";
0610 clock-id = <56>;
0611 clocks = <&clk48>; /* Guess */
0612 };
0613 x3dclk: x3dclk@48M {
0614 #clock-cells = <0>;
0615 compatible = "st,nomadik-src-clock";
0616 clock-id = <58>;
0617 clocks = <&clk48>; /* Guess */
0618 };
0619 pclkmsp3: pclkmsp3@48M {
0620 #clock-cells = <0>;
0621 compatible = "st,nomadik-src-clock";
0622 clock-id = <59>;
0623 clocks = <&pclk>;
0624 };
0625 mspclk3: mspclk3@48M {
0626 #clock-cells = <0>;
0627 compatible = "st,nomadik-src-clock";
0628 clock-id = <60>;
0629 clocks = <&clk48>;
0630 };
0631 mshcclk: mshcclk@48M {
0632 #clock-cells = <0>;
0633 compatible = "st,nomadik-src-clock";
0634 clock-id = <61>;
0635 clocks = <&clk48>; /* Guess */
0636 };
0637 usbmclk: usbmclk@48M {
0638 #clock-cells = <0>;
0639 compatible = "st,nomadik-src-clock";
0640 clock-id = <62>;
0641 /* Stated as "48 MHz not ULPI clock" */
0642 clocks = <&clk48>;
0643 };
0644 rngcclk: rngcclk@48M {
0645 #clock-cells = <0>;
0646 compatible = "st,nomadik-src-clock";
0647 clock-id = <63>;
0648 clocks = <&clk48>; /* Guess */
0649 };
0650 };
0651
0652 /* A NAND flash of 128 MiB */
0653 fsmc: flash@40000000 {
0654 compatible = "stericsson,fsmc-nand";
0655 #address-cells = <1>;
0656 #size-cells = <1>;
0657 reg = <0x10100000 0x1000>, /* FSMC Register*/
0658 <0x40000000 0x2000>, /* NAND Base DATA */
0659 <0x41000000 0x2000>, /* NAND Base ADDR */
0660 <0x40800000 0x2000>; /* NAND Base CMD */
0661 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
0662 clocks = <&hclksmc>;
0663 status = "okay";
0664
0665 partition@0 {
0666 label = "X-Loader(NAND)";
0667 reg = <0x0 0x40000>;
0668 };
0669 partition@40000 {
0670 label = "MemInit(NAND)";
0671 reg = <0x40000 0x40000>;
0672 };
0673 partition@80000 {
0674 label = "BootLoader(NAND)";
0675 reg = <0x80000 0x200000>;
0676 };
0677 partition@280000 {
0678 label = "Kernel zImage(NAND)";
0679 reg = <0x280000 0x300000>;
0680 };
0681 partition@580000 {
0682 label = "Root Filesystem(NAND)";
0683 reg = <0x580000 0x1600000>;
0684 };
0685 partition@1b80000 {
0686 label = "User Filesystem(NAND)";
0687 reg = <0x1b80000 0x6480000>;
0688 };
0689 };
0690
0691 /* I2C0 connected to the STw4811 power management chip */
0692 i2c0 {
0693 compatible = "st,nomadik-i2c", "arm,primecell";
0694 reg = <0x101f8000 0x1000>;
0695 interrupt-parent = <&vica>;
0696 interrupts = <20>;
0697 clock-frequency = <100000>;
0698 #address-cells = <1>;
0699 #size-cells = <0>;
0700 clocks = <&i2c0clk>, <&pclki2c0>;
0701 clock-names = "mclk", "apb_pclk";
0702 pinctrl-names = "default";
0703 pinctrl-0 = <&i2c0_default_mux>, <&i2c0_default_mode>;
0704
0705 stw4811@2d {
0706 compatible = "st,stw4811";
0707 reg = <0x2d>;
0708 vmmc_regulator: vmmc {
0709 compatible = "st,stw481x-vmmc";
0710 regulator-name = "VMMC";
0711 regulator-min-microvolt = <1800000>;
0712 regulator-max-microvolt = <3300000>;
0713 };
0714 };
0715 };
0716
0717 /* I2C1 connected to various sensors */
0718 i2c1 {
0719 compatible = "st,nomadik-i2c", "arm,primecell";
0720 reg = <0x101f7000 0x1000>;
0721 interrupt-parent = <&vica>;
0722 interrupts = <21>;
0723 clock-frequency = <100000>;
0724 #address-cells = <1>;
0725 #size-cells = <0>;
0726 clocks = <&i2c1clk>, <&pclki2c1>;
0727 clock-names = "mclk", "apb_pclk";
0728 pinctrl-names = "default";
0729 pinctrl-0 = <&i2c1_default_mux>, <&i2c1_default_mode>;
0730
0731 camera@2d {
0732 compatible = "st,camera";
0733 reg = <0x10>;
0734 };
0735 stw5095@1a {
0736 compatible = "st,stw5095";
0737 reg = <0x1a>;
0738 };
0739 };
0740
0741 amba {
0742 compatible = "simple-bus";
0743 #address-cells = <1>;
0744 #size-cells = <1>;
0745 ranges;
0746
0747 clcd@10120000 {
0748 compatible = "arm,pl110", "arm,primecell";
0749 reg = <0x10120000 0x1000>;
0750 interrupt-names = "combined";
0751 interrupts = <14>;
0752 interrupt-parent = <&vica>;
0753 clocks = <&clcdclk>, <&hclkclcd>;
0754 clock-names = "clcdclk", "apb_pclk";
0755 status = "disabled";
0756 };
0757
0758 vica: interrupt-controller@10140000 {
0759 compatible = "arm,versatile-vic";
0760 interrupt-controller;
0761 #interrupt-cells = <1>;
0762 reg = <0x10140000 0x20>;
0763 };
0764
0765 vicb: interrupt-controller@10140020 {
0766 compatible = "arm,versatile-vic";
0767 interrupt-controller;
0768 #interrupt-cells = <1>;
0769 reg = <0x10140020 0x20>;
0770 };
0771
0772 uart0: uart@101fd000 {
0773 compatible = "arm,pl011", "arm,primecell";
0774 reg = <0x101fd000 0x1000>;
0775 interrupt-parent = <&vica>;
0776 interrupts = <12>;
0777 clocks = <&uart0clk>, <&pclkuart0>;
0778 clock-names = "uartclk", "apb_pclk";
0779 status = "disabled";
0780 dmas = <&dmac0 14 1>,
0781 <&dmac0 15 1>;
0782 dma-names = "rx", "tx";
0783 };
0784
0785 uart1: uart@101fb000 {
0786 compatible = "arm,pl011", "arm,primecell";
0787 reg = <0x101fb000 0x1000>;
0788 interrupt-parent = <&vica>;
0789 interrupts = <17>;
0790 clocks = <&uart1clk>, <&pclkuart1>;
0791 clock-names = "uartclk", "apb_pclk";
0792 pinctrl-names = "default";
0793 pinctrl-0 = <&uart1_default_mux>;
0794 dmas = <&dmac1 22 1>,
0795 <&dmac1 23 1>;
0796 dma-names = "rx", "tx";
0797 };
0798
0799 uart2: uart@101f2000 {
0800 compatible = "arm,pl011", "arm,primecell";
0801 reg = <0x101f2000 0x1000>;
0802 interrupt-parent = <&vica>;
0803 interrupts = <28>;
0804 clocks = <&uart2clk>, <&pclkuart2>;
0805 clock-names = "uartclk", "apb_pclk";
0806 status = "disabled";
0807 dmas = <&dmac1 30 1>,
0808 <&dmac1 31 1>;
0809 dma-names = "rx", "tx";
0810 };
0811
0812 rng: rng@101b0000 {
0813 compatible = "arm,primecell";
0814 reg = <0x101b0000 0x1000>;
0815 clocks = <&rngcclk>, <&hclkrng>;
0816 clock-names = "rng", "apb_pclk";
0817 };
0818
0819 rtc: rtc@101e8000 {
0820 compatible = "arm,pl031", "arm,primecell";
0821 reg = <0x101e8000 0x1000>;
0822 clocks = <&pclk>;
0823 clock-names = "apb_pclk";
0824 interrupt-parent = <&vica>;
0825 interrupts = <10>;
0826 };
0827
0828 mmcsd: mmc@101f6000 {
0829 compatible = "arm,pl18x", "arm,primecell";
0830 reg = <0x101f6000 0x1000>;
0831 clocks = <&sdiclk>, <&pclksdi>;
0832 clock-names = "mclk", "apb_pclk";
0833 interrupt-parent = <&vica>;
0834 interrupts = <22>;
0835 max-frequency = <400000>;
0836 bus-width = <4>;
0837 cap-mmc-highspeed;
0838 cap-sd-highspeed;
0839 full-pwr-cycle;
0840 /*
0841 * The STw4811 circuit used with the Nomadik strictly
0842 * requires that all of these signal direction pins be
0843 * routed and used for its 4-bit levelshifter.
0844 */
0845 st,sig-dir-dat0;
0846 st,sig-dir-dat2;
0847 st,sig-dir-dat31;
0848 st,sig-dir-cmd;
0849 st,sig-pin-fbclk;
0850 pinctrl-names = "default";
0851 pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;
0852 vmmc-supply = <&vmmc_regulator>;
0853 };
0854
0855 dmac0: dma-controller@10130000 {
0856 compatible = "arm,pl080", "arm,primecell";
0857 reg = <0x10130000 0x1000>;
0858 interrupt-parent = <&vica>;
0859 interrupts = <15>;
0860 clocks = <&hclkdma0>;
0861 clock-names = "apb_pclk";
0862 lli-bus-interface-ahb1;
0863 lli-bus-interface-ahb2;
0864 mem-bus-interface-ahb2;
0865 memcpy-burst-size = <256>;
0866 memcpy-bus-width = <32>;
0867 #dma-cells = <2>;
0868 };
0869 dmac1: dma-controller@10150000 {
0870 compatible = "arm,pl080", "arm,primecell";
0871 reg = <0x10150000 0x1000>;
0872 interrupt-parent = <&vica>;
0873 interrupts = <13>;
0874 clocks = <&hclkdma1>;
0875 clock-names = "apb_pclk";
0876 lli-bus-interface-ahb1;
0877 lli-bus-interface-ahb2;
0878 mem-bus-interface-ahb2;
0879 memcpy-burst-size = <256>;
0880 memcpy-bus-width = <32>;
0881 #dma-cells = <2>;
0882 };
0883 };
0884 };
