include-prefixes/arm/lpc3250-phy3250.dts

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * PHYTEC phyCORE-LPC3250 board
0004  *
0005  * Copyright (C) 2015-2019 Vladimir Zapolskiy <vz@mleia.com>
0006  * Copyright 2012 Roland Stigge <stigge@antcom.de>
0007  */
0008
0009 /dts-v1/;
0010 #include "lpc32xx.dtsi"
0011
0012 / {
0013         model = "PHYTEC phyCORE-LPC3250 board based on NXP LPC3250";
0014         compatible = "phytec,phy3250", "nxp,lpc3250";
0015
0016         memory@80000000 {
0017                 device_type = "memory";
0018                 reg = <0x80000000 0x4000000>;
0019         };
0020
0021         leds {
0022                 compatible = "gpio-leds";
0023
0024                 led0 { /* red */
0025                         gpios = <&gpio 5 1 0>; /* GPO_P3 1, GPIO 80, active high */
0026                         default-state = "off";
0027                 };
0028
0029                 led1 { /* green */
0030                         gpios = <&gpio 5 14 0>; /* GPO_P3 14, GPIO 93, active high */
0031                         linux,default-trigger = "heartbeat";
0032                 };
0033         };
0034
0035         panel: panel {
0036                 compatible = "sharp,lq035q7db03";
0037                 power-supply = <&reg_lcd>;
0038
0039                 port {
0040                         panel_input: endpoint {
0041                                 remote-endpoint = <&cldc_output>;
0042                         };
0043                 };
0044         };
0045
0046         reg_backlight: regulator-backlight {
0047                 compatible = "regulator-fixed";
0048                 regulator-name = "backlight";
0049                 regulator-min-microvolt = <1800000>;
0050                 regulator-max-microvolt = <1800000>;
0051                 gpio = <&gpio 5 4 0>;
0052                 enable-active-high;
0053                 regulator-boot-on;
0054         };
0055
0056         reg_lcd: regulator-lcd {
0057                 compatible = "regulator-fixed";
0058                 regulator-name = "lcd";
0059                 regulator-min-microvolt = <1800000>;
0060                 regulator-max-microvolt = <1800000>;
0061                 gpio = <&gpio 5 0 0>;
0062                 enable-active-high;
0063                 regulator-boot-on;
0064         };
0065
0066         reg_sd: regulator-sd {
0067                 compatible = "regulator-fixed";
0068                 regulator-name = "sd";
0069                 regulator-min-microvolt = <3300000>;
0070                 regulator-max-microvolt = <3300000>;
0071                 gpio = <&gpio 5 5 0>;
0072                 enable-active-high;
0073                 regulator-boot-on;
0074         };
0075 };
0076
0077 &clcd {
0078         max-memory-bandwidth = <18710000>;
0079         status = "okay";
0080
0081         port {
0082                 cldc_output: endpoint {
0083                         remote-endpoint = <&panel_input>;
0084                         arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
0085                 };
0086         };
0087 };
0088
0089 &i2c1 {
0090         clock-frequency = <100000>;
0091
0092         uda1380: uda1380@18 {
0093                 compatible = "nxp,uda1380";
0094                 reg = <0x18>;
0095                 power-gpio = <&gpio 3 10 0>;
0096                 reset-gpio = <&gpio 3 2 0>;
0097                 dac-clk = "wspll";
0098         };
0099
0100         pcf8563: rtc@51 {
0101                 compatible = "nxp,pcf8563";
0102                 reg = <0x51>;
0103         };
0104 };
0105
0106 &i2c2 {
0107         clock-frequency = <100000>;
0108 };
0109
0110 &i2cusb {
0111         clock-frequency = <100000>;
0112
0113         isp1301: usb-transceiver@2c {
0114                 compatible = "nxp,isp1301";
0115                 reg = <0x2c>;
0116         };
0117 };
0118
0119 &key {
0120         keypad,num-rows = <1>;
0121         keypad,num-columns = <1>;
0122         nxp,debounce-delay-ms = <3>;
0123         nxp,scan-delay-ms = <34>;
0124         linux,keymap = <0x00000002>;
0125         status = "okay";
0126 };
0127
0128 &mac {
0129         phy-mode = "rmii";
0130         use-iram;
0131         status = "okay";
0132 };
0133
0134 /* Here, choose exactly one from: ohci, usbd */
0135 &ohci /* &usbd */ {
0136         transceiver = <&isp1301>;
0137         status = "okay";
0138 };
0139
0140 &sd {
0141         wp-gpios = <&gpio 3 0 0>;
0142         cd-gpios = <&gpio 3 1 0>;
0143         cd-inverted;
0144         bus-width = <4>;
0145         vmmc-supply = <&reg_sd>;
0146         status = "okay";
0147 };
0148
0149 /* 64MB Flash via SLC NAND controller */
0150 &slc {
0151         status = "okay";
0152
0153         nxp,wdr-clks = <14>;
0154         nxp,wwidth = <40000000>;
0155         nxp,whold = <100000000>;
0156         nxp,wsetup = <100000000>;
0157         nxp,rdr-clks = <14>;
0158         nxp,rwidth = <40000000>;
0159         nxp,rhold = <66666666>;
0160         nxp,rsetup = <100000000>;
0161         nand-on-flash-bbt;
0162         gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */
0163
0164         partitions {
0165                 compatible = "fixed-partitions";
0166                 #address-cells = <1>;
0167                 #size-cells = <1>;
0168
0169                 mtd0@0 {
0170                         label = "phy3250-boot";
0171                         reg = <0x00000000 0x00064000>;
0172                         read-only;
0173                 };
0174
0175                 mtd1@64000 {
0176                         label = "phy3250-uboot";
0177                         reg = <0x00064000 0x00190000>;
0178                         read-only;
0179                 };
0180
0181                 mtd2@1f4000 {
0182                         label = "phy3250-ubt-prms";
0183                         reg = <0x001f4000 0x00010000>;
0184                 };
0185
0186                 mtd3@204000 {
0187                         label = "phy3250-kernel";
0188                         reg = <0x00204000 0x00400000>;
0189                 };
0190
0191                 mtd4@604000 {
0192                         label = "phy3250-rootfs";
0193                         reg = <0x00604000 0x039fc000>;
0194                 };
0195         };
0196 };
0197
0198 &ssp0 {
0199         num-cs = <1>;
0200         cs-gpios = <&gpio 3 5 0>;
0201         status = "okay";
0202
0203         eeprom: at25@0 {
0204                 compatible = "atmel,at25";
0205                 reg = <0>;
0206                 spi-max-frequency = <5000000>;
0207
0208                 pl022,interface = <0>;
0209                 pl022,com-mode = <0>;
0210                 pl022,rx-level-trig = <1>;
0211                 pl022,tx-level-trig = <1>;
0212                 pl022,ctrl-len = <11>;
0213                 pl022,wait-state = <0>;
0214                 pl022,duplex = <0>;
0215
0216                 at25,byte-len = <0x8000>;
0217                 at25,addr-mode = <2>;
0218                 at25,page-size = <64>;
0219         };
0220 };
0221
0222 &tsc {
0223         status = "okay";
0224 };
0225
0226 &uart2 {
0227         status = "okay";
0228 };
0229
0230 &uart3 {
0231         status = "okay";
0232 };
0233
0234 &uart5 {
0235         status = "okay";
0236 };