0001 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
0002 /*
0003 * Copyright (c) 2014 Protonic Holland
0004 */
0005
0006 /dts-v1/;
0007 #include "imx6q.dtsi"
0008 #include "imx6qdl-prti6q.dtsi"
0009 #include <dt-bindings/leds/common.h>
0010 #include <dt-bindings/sound/fsl-imx-audmux.h>
0011
0012 / {
0013 model = "Protonic PRTI6Q board";
0014 compatible = "prt,prti6q", "fsl,imx6q";
0015
0016 memory@10000000 {
0017 device_type = "memory";
0018 reg = <0x10000000 0xf0000000>;
0019 };
0020
0021 backlight_lcd: backlight-lcd {
0022 compatible = "pwm-backlight";
0023 pinctrl-names = "default";
0024 pinctrl-0 = <&pinctrl_backlight>;
0025 pwms = <&pwm1 0 5000000>;
0026 brightness-levels = <0 16 64 255>;
0027 num-interpolated-steps = <16>;
0028 default-brightness-level = <1>;
0029 power-supply = <®_3v3>;
0030 enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
0031 };
0032
0033 can_osc: can-osc {
0034 compatible = "fixed-clock";
0035 #clock-cells = <0>;
0036 clock-frequency = <25000000>;
0037 };
0038
0039 leds {
0040 compatible = "gpio-leds";
0041 pinctrl-names = "default";
0042 pinctrl-0 = <&pinctrl_leds>;
0043
0044 led-debug0 {
0045 function = LED_FUNCTION_STATUS;
0046 gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
0047 linux,default-trigger = "heartbeat";
0048 };
0049
0050 led-debug1 {
0051 function = LED_FUNCTION_SD;
0052 gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
0053 linux,default-trigger = "disk-activity";
0054 };
0055 };
0056
0057 panel {
0058 compatible = "kyo,tcg121xglp";
0059 backlight = <&backlight_lcd>;
0060
0061 port {
0062 panel_in: endpoint {
0063 remote-endpoint = <&lvds0_out>;
0064 };
0065 };
0066 };
0067
0068 reg_1v8: regulator-1v8 {
0069 compatible = "regulator-fixed";
0070 regulator-name = "1v8";
0071 regulator-min-microvolt = <1800000>;
0072 regulator-max-microvolt = <1800000>;
0073 };
0074
0075 reg_wifi: regulator-wifi {
0076 compatible = "regulator-fixed";
0077 pinctrl-names = "default";
0078 pinctrl-0 = <&pinctrl_wifi_npd>;
0079 enable-active-high;
0080 gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
0081 regulator-max-microvolt = <1800000>;
0082 regulator-min-microvolt = <1800000>;
0083 regulator-name = "regulator-WL12xx";
0084 startup-delay-us = <70000>;
0085 };
0086
0087 sound {
0088 compatible = "simple-audio-card";
0089 simple-audio-card,name = "prti6q-sgtl5000";
0090 simple-audio-card,format = "i2s";
0091 simple-audio-card,widgets =
0092 "Microphone", "Microphone Jack",
0093 "Line", "Line In Jack",
0094 "Headphone", "Headphone Jack",
0095 "Speaker", "External Speaker";
0096 simple-audio-card,routing =
0097 "MIC_IN", "Microphone Jack",
0098 "LINE_IN", "Line In Jack",
0099 "Headphone Jack", "HP_OUT",
0100 "External Speaker", "LINE_OUT";
0101
0102 simple-audio-card,cpu {
0103 sound-dai = <&ssi1>;
0104 system-clock-frequency = <0>;
0105 };
0106
0107 simple-audio-card,codec {
0108 sound-dai = <&sgtl5000>;
0109 bitclock-master;
0110 frame-master;
0111 };
0112 };
0113
0114 sound-spdif {
0115 compatible = "fsl,imx-audio-spdif";
0116 model = "imx-spdif";
0117 spdif-controller = <&spdif>;
0118 spdif-in;
0119 spdif-out;
0120 };
0121 };
0122
0123 &audmux {
0124 pinctrl-names = "default";
0125 pinctrl-0 = <&pinctrl_audmux>;
0126 status = "okay";
0127
0128 mux-ssi1 {
0129 fsl,audmux-port = <0>;
0130 fsl,port-config = <
0131 IMX_AUDMUX_V2_PTCR_SYN 0
0132 IMX_AUDMUX_V2_PTCR_TFSEL(2) 0
0133 IMX_AUDMUX_V2_PTCR_TCSEL(2) 0
0134 IMX_AUDMUX_V2_PTCR_TFSDIR 0
0135 IMX_AUDMUX_V2_PTCR_TCLKDIR IMX_AUDMUX_V2_PDCR_RXDSEL(2)
0136 >;
0137 };
0138
0139 mux-pins3 {
0140 fsl,audmux-port = <2>;
0141 fsl,port-config = <
0142 IMX_AUDMUX_V2_PTCR_SYN IMX_AUDMUX_V2_PDCR_RXDSEL(0)
0143 0 IMX_AUDMUX_V2_PDCR_TXRXEN
0144 >;
0145 };
0146 };
0147
0148 &can1 {
0149 pinctrl-names = "default";
0150 pinctrl-0 = <&pinctrl_can1>;
0151 status = "okay";
0152 };
0153
0154 &can2 {
0155 pinctrl-names = "default";
0156 pinctrl-0 = <&pinctrl_can2>;
0157 status = "okay";
0158 };
0159
0160 &ecspi1 {
0161 cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
0162 pinctrl-names = "default";
0163 pinctrl-0 = <&pinctrl_ecspi1>;
0164 status = "okay";
0165
0166 flash@0 {
0167 compatible = "jedec,spi-nor";
0168 reg = <0>;
0169 spi-max-frequency = <20000000>;
0170 };
0171 };
0172
0173 &ecspi2 {
0174 cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>, <&gpio4 25 GPIO_ACTIVE_LOW>;
0175 pinctrl-names = "default";
0176 pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs>;
0177 status = "okay";
0178
0179 can@0 {
0180 compatible = "microchip,mcp2515";
0181 reg = <0>;
0182 pinctrl-names = "default";
0183 pinctrl-0 = <&pinctrl_can3>;
0184 clocks = <&can_osc>;
0185 interrupts-extended = <&gpio3 20 IRQ_TYPE_LEVEL_LOW>;
0186 spi-max-frequency = <5000000>;
0187 };
0188
0189 adc@1 {
0190 compatible = "ti,adc128s052";
0191 reg = <1>;
0192 spi-max-frequency = <2000000>;
0193 vref-supply = <®_3v3>;
0194 };
0195 };
0196
0197 &ecspi3 {
0198 cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
0199 pinctrl-names = "default";
0200 pinctrl-0 = <&pinctrl_ecspi3>;
0201 status = "okay";
0202 };
0203
0204 &fec {
0205 pinctrl-names = "default";
0206 pinctrl-0 = <&pinctrl_enet>;
0207 phy-mode = "rgmii-id";
0208 phy-handle = <&rgmii_phy>;
0209 status = "okay";
0210
0211 mdio {
0212 #address-cells = <1>;
0213 #size-cells = <0>;
0214
0215 /* Microchip KSZ9031RNX PHY */
0216 rgmii_phy: ethernet-phy@0 {
0217 reg = <0>;
0218 interrupts-extended = <&gpio1 28 IRQ_TYPE_LEVEL_LOW>;
0219 reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
0220 reset-assert-us = <10000>;
0221 reset-deassert-us = <300>;
0222 };
0223 };
0224 };
0225
0226 &hdmi {
0227 pinctrl-names = "default";
0228 pinctrl-0 = <&pinctrl_hdmi>;
0229 ddc-i2c-bus = <&i2c2>;
0230 status = "okay";
0231 };
0232
0233 &i2c1 {
0234 sgtl5000: audio-codec@a {
0235 compatible = "fsl,sgtl5000";
0236 reg = <0xa>;
0237 #sound-dai-cells = <0>;
0238 clocks = <&clks 201>;
0239 VDDA-supply = <®_3v3>;
0240 VDDIO-supply = <®_3v3>;
0241 VDDD-supply = <®_1v8>;
0242 };
0243 };
0244
0245 /* DDC */
0246 &i2c2 {
0247 clock-frequency = <100000>;
0248 pinctrl-names = "default";
0249 pinctrl-0 = <&pinctrl_i2c2>;
0250 status = "okay";
0251 };
0252
0253 &i2c3 {
0254 adc@49 {
0255 compatible = "ti,ads1015";
0256 reg = <0x49>;
0257 #address-cells = <1>;
0258 #size-cells = <0>;
0259
0260 /* can2_l */
0261 channel@4 {
0262 reg = <4>;
0263 ti,gain = <3>;
0264 ti,datarate = <3>;
0265 };
0266
0267 /* can2_h */
0268 channel@5 {
0269 reg = <5>;
0270 ti,gain = <3>;
0271 ti,datarate = <3>;
0272 };
0273
0274 /* can1_l */
0275 channel@6 {
0276 reg = <6>;
0277 ti,gain = <3>;
0278 ti,datarate = <3>;
0279 };
0280
0281 /* can1_h */
0282 channel@7 {
0283 reg = <7>;
0284 ti,gain = <3>;
0285 ti,datarate = <3>;
0286 };
0287 };
0288 };
0289
0290 &pcie {
0291 status = "okay";
0292 };
0293
0294 &pwm1 {
0295 #pwm-cells = <2>;
0296 pinctrl-names = "default";
0297 pinctrl-0 = <&pinctrl_pwm1>;
0298 status = "okay";
0299 };
0300
0301 &ldb {
0302 status = "okay";
0303
0304 lvds-channel@0 {
0305 status = "okay";
0306
0307 port@4 {
0308 reg = <4>;
0309
0310 lvds0_out: endpoint {
0311 remote-endpoint = <&panel_in>;
0312 };
0313 };
0314 };
0315 };
0316
0317 &sata {
0318 status = "okay";
0319 };
0320
0321 &snvs_poweroff {
0322 status = "okay";
0323 };
0324
0325 &spdif {
0326 pinctrl-names = "default";
0327 pinctrl-0 = <&pinctrl_spdif>;
0328 status = "okay";
0329 };
0330
0331 &ssi1 {
0332 #sound-dai-cells = <0>;
0333 fsl,mode = "ac97-slave";
0334 status = "okay";
0335 };
0336
0337 &uart2 {
0338 pinctrl-names = "default";
0339 pinctrl-0 = <&pinctrl_uart2>;
0340 status = "okay";
0341 };
0342
0343 &uart5 {
0344 pinctrl-names = "default";
0345 pinctrl-0 = <&pinctrl_uart5>;
0346 status = "okay";
0347 };
0348
0349 &usbotg {
0350 pinctrl-0 = <&pinctrl_usbotg &pinctrl_usbotg_id>;
0351 };
0352
0353 &usdhc2 {
0354 pinctrl-names = "default";
0355 pinctrl-0 = <&pinctrl_usdhc2>;
0356 non-removable;
0357 vmmc-supply = <®_wifi>;
0358 cap-power-off-card;
0359 keep-power-in-suspend;
0360 status = "okay";
0361
0362 wifi {
0363 compatible = "ti,wl1271";
0364 pinctrl-names = "default";
0365 pinctrl-0 = <&pinctrl_wifi>;
0366 interrupts-extended = <&gpio1 30 IRQ_TYPE_LEVEL_HIGH>;
0367 ref-clock-frequency = "38400000";
0368 tcxo-clock-frequency = "19200000";
0369 };
0370 };
0371
0372 &iomuxc {
0373 pinctrl_audmux: audmuxgrp {
0374 fsl,pins = <
0375 MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x030b0
0376 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
0377 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
0378 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
0379 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
0380 >;
0381 };
0382
0383 pinctrl_backlight: backlightgrp {
0384 fsl,pins = <
0385 MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28 0x1b0b0
0386 >;
0387 };
0388
0389 pinctrl_can2: can2grp {
0390 fsl,pins = <
0391 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b008
0392 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b008
0393 >;
0394 };
0395
0396 pinctrl_can3: can3grp {
0397 fsl,pins = <
0398 MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b1
0399 >;
0400 };
0401
0402 pinctrl_ecspi1: ecspi1grp {
0403 fsl,pins = <
0404 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
0405 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
0406 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
0407 /* CS */
0408 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1
0409 >;
0410 };
0411
0412 pinctrl_ecspi2: ecspi2grp {
0413 fsl,pins = <
0414 MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
0415 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
0416 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
0417 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000b1
0418 >;
0419 };
0420
0421 pinctrl_ecspi2_cs: ecspi2csgrp {
0422 fsl,pins = <
0423 /* ADC128S022 CS */
0424 MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 0x1b0b1
0425 >;
0426 };
0427
0428 pinctrl_ecspi3: ecspi3grp {
0429 fsl,pins = <
0430 MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
0431 MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
0432 MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
0433 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x000b1
0434 >;
0435 };
0436
0437 pinctrl_enet: enetgrp {
0438 fsl,pins = <
0439 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
0440 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
0441 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
0442 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
0443 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
0444 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
0445 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
0446 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
0447 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
0448 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
0449 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
0450 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
0451 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x10030
0452 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x10030
0453 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x10030
0454
0455 /* Phy reset */
0456 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
0457 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b1
0458 >;
0459 };
0460
0461 pinctrl_hdmi: hdmigrp {
0462 fsl,pins = <
0463 /* NOTE: DDC is done via I2C2, so DON'T
0464 * configure DDC pins for HDMI!
0465 */
0466 MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0
0467 >;
0468 };
0469
0470 /* DDC */
0471 pinctrl_i2c2: i2c2grp {
0472 fsl,pins = <
0473 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
0474 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
0475 >;
0476 };
0477
0478 pinctrl_leds: ledsgrp {
0479 fsl,pins = <
0480 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
0481 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
0482 >;
0483 };
0484
0485 pinctrl_pwm1: pwm1grp {
0486 fsl,pins = <
0487 MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0
0488 >;
0489 };
0490
0491 pinctrl_spdif: spdifgrp {
0492 fsl,pins = <
0493 MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0
0494 MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
0495 >;
0496 };
0497
0498 pinctrl_uart2: uart2grp {
0499 fsl,pins = <
0500 MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1
0501 MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1
0502 MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B 0x1b0b1
0503 MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1
0504 >;
0505 };
0506
0507 pinctrl_uart5: uart5grp {
0508 fsl,pins = <
0509 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
0510 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
0511 >;
0512 };
0513
0514 pinctrl_usbotg_id: usbotgidgrp {
0515 fsl,pins = <
0516 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x1f058
0517 >;
0518 };
0519
0520 pinctrl_usdhc2: usdhc2grp {
0521 fsl,pins = <
0522 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9
0523 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9
0524 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
0525 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
0526 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
0527 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
0528 >;
0529 };
0530
0531 pinctrl_wifi: wifigrp {
0532 fsl,pins = <
0533 /* WL12xx IRQ */
0534 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x10880
0535 >;
0536 };
0537
0538 pinctrl_wifi_npd: wifinpd {
0539 fsl,pins = <
0540 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b8b0
0541 >;
0542 };
0543 };
