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0001 /*
0002  * Copyright (C) 2017 NutsBoard.Org
0003  *
0004  * Author: Wig Cheng <onlywig@gmail.com>
0005  *
0006  * This file is dual-licensed: you can use it either under the terms
0007  * of the GPL or the X11 license, at your option. Note that this dual
0008  * licensing only applies to this file, and not this project as a
0009  * whole.
0010  *
0011  *  a) This file is free software; you can redistribute it and/or
0012  *     modify it under the terms of the GNU General Public License as
0013  *     published by the Free Software Foundation; either version 2 of the
0014  *     License, or (at your option) any later version.
0015  *
0016  *     This file is distributed in the hope that it will be useful,
0017  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
0018  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
0019  *     GNU General Public License for more details.
0020  *
0021  * Or, alternatively,
0022  *
0023  *  b) Permission is hereby granted, free of charge, to any person
0024  *     obtaining a copy of this software and associated documentation
0025  *     files (the "Software"), to deal in the Software without
0026  *     restriction, including without limitation the rights to use,
0027  *     copy, modify, merge, publish, distribute, sublicense, and/or
0028  *     sell copies of the Software, and to permit persons to whom the
0029  *     Software is furnished to do so, subject to the following
0030  *     conditions:
0031  *
0032  *     The above copyright notice and this permission notice shall be
0033  *     included in all copies or substantial portions of the Software.
0034  *
0035  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0036  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
0037  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0038  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
0039  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
0040  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
0041  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0042  *     OTHER DEALINGS IN THE SOFTWARE.
0043  */
0044 
0045 /dts-v1/;
0046 
0047 #include <dt-bindings/gpio/gpio.h>
0048 #include <dt-bindings/input/input.h>
0049 #include "imx6q.dtsi"
0050 
0051 / {
0052         model = "NutsBoard i.MX6 Quad Pistachio board";
0053         compatible = "nutsboard,imx6q-pistachio", "fsl,imx6q";
0054 
0055         chosen {
0056                 stdout-path = &uart4;
0057         };
0058 
0059         memory@10000000 {
0060                 device_type = "memory";
0061                 reg = <0x10000000 0x80000000>;
0062         };
0063 
0064         reg_3p3v: regulator-3p3v {
0065                 compatible = "regulator-fixed";
0066                 regulator-name = "3P3V";
0067                 regulator-min-microvolt = <3300000>;
0068                 regulator-max-microvolt = <3300000>;
0069         };
0070 
0071         reg_1p8v: regulator-1p8v {
0072                 compatible = "regulator-fixed";
0073                 regulator-name = "1P8V";
0074                 regulator-min-microvolt = <1800000>;
0075                 regulator-max-microvolt = <1800000>;
0076         };
0077 
0078         wlan_en_reg: regulator-wlan_en {
0079                 compatible = "regulator-fixed";
0080                 regulator-name = "wlan-en-regulator";
0081                 regulator-min-microvolt = <1800000>;
0082                 regulator-max-microvolt = <1800000>;
0083                 gpio = <&gpio2 24 GPIO_ACTIVE_HIGH>;
0084                 startup-delay-us = <70000>;
0085                 enable-active-high;
0086         };
0087 
0088         reg_usb_otg_vbus: regulator-usb_vbus {
0089                 compatible = "regulator-fixed";
0090                 regulator-name = "usb_otg_vbus";
0091                 regulator-min-microvolt = <5000000>;
0092                 regulator-max-microvolt = <5000000>;
0093                 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
0094                 enable-active-high;
0095                 vin-supply = <&swbst_reg>;
0096         };
0097 
0098         gpio-keys {
0099                 compatible = "gpio-keys";
0100                 pinctrl-names = "default";
0101                 pinctrl-0 = <&pinctrl_gpio_keys>;
0102 
0103                 power {
0104                         label = "Power Button";
0105                         gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
0106                         wakeup-source;
0107                         linux,code = <KEY_POWER>;
0108                 };
0109         };
0110 
0111         sound {
0112                 compatible = "fsl,imx-sgtl5000",
0113                            "fsl,imx-audio-sgtl5000";
0114                 model = "audio-sgtl5000";
0115                 ssi-controller = <&ssi1>;
0116                 audio-codec = <&codec>;
0117                 audio-routing =
0118                         "MIC_IN", "Mic Jack",
0119                         "Mic Jack", "Mic Bias",
0120                         "Headphone Jack", "HP_OUT";
0121                 mux-int-port = <1>;
0122                 mux-ext-port = <3>;
0123         };
0124 
0125         backlight_lvds: backlight-lvds {
0126                 compatible = "pwm-backlight";
0127                 pwms = <&pwm1 0 50000>;
0128                 brightness-levels = <
0129                         0  /*1  2  3  4  5  6*/  7  8  9
0130                         10 11 12 13 14 15 16 17 18 19
0131                         20 21 22 23 24 25 26 27 28 29
0132                         30 31 32 33 34 35 36 37 38 39
0133                         40 41 42 43 44 45 46 47 48 49
0134                         50 51 52 53 54 55 56 57 58 59
0135                         60 61 62 63 64 65 66 67 68 69
0136                         70 71 72 73 74 75 76 77 78 79
0137                         80 81 82 83 84 85 86 87 88 89
0138                         90 91 92 93 94 95 96 97 98 99
0139                         100
0140                 >;
0141                 default-brightness-level = <94>;
0142                 status = "okay";
0143         };
0144 
0145         panel {
0146                 compatible = "hannstar,hsd100pxn1";
0147                 backlight = <&backlight_lvds>;
0148 
0149                 port {
0150                         panel_in: endpoint {
0151                                 remote-endpoint = <&lvds0_out>;
0152                         };
0153                 };
0154         };
0155 };
0156 
0157 &audmux {
0158         pinctrl-names = "default";
0159         pinctrl-0 = <&pinctrl_audmux>;
0160         status = "okay";
0161 };
0162 
0163 &can2 {
0164         pinctrl-names = "default";
0165         pinctrl-0 = <&pinctrl_flexcan2>;
0166         status = "okay";
0167 };
0168 
0169 &clks {
0170         assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
0171                           <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
0172         assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
0173                                  <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
0174 };
0175 
0176 &fec {
0177         pinctrl-names = "default";
0178         pinctrl-0 = <&pinctrl_enet>;
0179         phy-mode = "rgmii";
0180         status = "okay";
0181 };
0182 
0183 &hdmi {
0184         ddc-i2c-bus = <&i2c2>;
0185         status = "okay";
0186 };
0187 
0188 &i2c1 {
0189         clock-frequency = <100000>;
0190         pinctrl-names = "default";
0191         pinctrl-0 = <&pinctrl_i2c1>;
0192         status = "okay";
0193 
0194         codec: sgtl5000@a {
0195                 compatible = "fsl,sgtl5000";
0196                 pinctrl-names = "default";
0197                 pinctrl-0 = <&pinctrl_i2c1_sgtl5000>;
0198                 reg = <0x0a>;
0199                 clocks = <&clks IMX6QDL_CLK_CKO>;
0200                 VDDA-supply = <&reg_1p8v>;
0201                 VDDIO-supply = <&reg_1p8v>;
0202         };
0203 };
0204 
0205 &i2c2 {
0206         clock-frequency = <100000>;
0207         pinctrl-names = "default";
0208         pinctrl-0 = <&pinctrl_i2c2>;
0209         status = "okay";
0210 
0211         pmic: pfuze100@8 {
0212                 compatible = "fsl,pfuze100";
0213                 reg = <0x08>;
0214 
0215                 regulators {
0216                         sw1a_reg: sw1ab {
0217                                 regulator-min-microvolt = <300000>;
0218                                 regulator-max-microvolt = <1875000>;
0219                                 regulator-boot-on;
0220                                 regulator-always-on;
0221                                 regulator-ramp-delay = <6250>;
0222                         };
0223 
0224                         sw1c_reg: sw1c {
0225                                 regulator-min-microvolt = <300000>;
0226                                 regulator-max-microvolt = <1875000>;
0227                                 regulator-boot-on;
0228                                 regulator-always-on;
0229                                 regulator-ramp-delay = <6250>;
0230                         };
0231 
0232                         sw2_reg: sw2 {
0233                                 regulator-min-microvolt = <800000>;
0234                                 regulator-max-microvolt = <3300000>;
0235                                 regulator-boot-on;
0236                                 regulator-always-on;
0237                                 regulator-ramp-delay = <6250>;
0238                         };
0239 
0240                         sw3a_reg: sw3a {
0241                                 regulator-min-microvolt = <400000>;
0242                                 regulator-max-microvolt = <1975000>;
0243                                 regulator-boot-on;
0244                                 regulator-always-on;
0245                         };
0246 
0247                         sw3b_reg: sw3b {
0248                                 regulator-min-microvolt = <400000>;
0249                                 regulator-max-microvolt = <1975000>;
0250                                 regulator-boot-on;
0251                                 regulator-always-on;
0252                         };
0253 
0254                         sw4_reg: sw4 {
0255                                 regulator-min-microvolt = <800000>;
0256                                 regulator-max-microvolt = <3300000>;
0257                         };
0258 
0259                         swbst_reg: swbst {
0260                                 regulator-min-microvolt = <5000000>;
0261                                 regulator-max-microvolt = <5150000>;
0262                         };
0263 
0264                         snvs_reg: vsnvs {
0265                                 regulator-min-microvolt = <1000000>;
0266                                 regulator-max-microvolt = <3000000>;
0267                                 regulator-boot-on;
0268                                 regulator-always-on;
0269                         };
0270 
0271                         vref_reg: vrefddr {
0272                                 regulator-boot-on;
0273                                 regulator-always-on;
0274                         };
0275 
0276                         vgen1_reg: vgen1 {
0277                                 regulator-min-microvolt = <800000>;
0278                                 regulator-max-microvolt = <1550000>;
0279                         };
0280 
0281                         vgen2_reg: vgen2 {
0282                                 regulator-min-microvolt = <800000>;
0283                                 regulator-max-microvolt = <1550000>;
0284                         };
0285 
0286                         vgen3_reg: vgen3 {
0287                                 regulator-min-microvolt = <1800000>;
0288                                 regulator-max-microvolt = <3300000>;
0289                         };
0290 
0291                         vgen4_reg: vgen4 {
0292                                 regulator-min-microvolt = <1800000>;
0293                                 regulator-max-microvolt = <3300000>;
0294                                 regulator-always-on;
0295                         };
0296 
0297                         vgen5_reg: vgen5 {
0298                                 regulator-min-microvolt = <1800000>;
0299                                 regulator-max-microvolt = <3300000>;
0300                                 regulator-always-on;
0301                         };
0302                         vgen6_reg: vgen6 {
0303                                 regulator-min-microvolt = <1800000>;
0304                                 regulator-max-microvolt = <3300000>;
0305                                 regulator-always-on;
0306                         };
0307                 };
0308         };
0309 
0310         ar1021@4d {
0311                 compatible = "microchip,ar1021-i2c";
0312                 reg = <0x4d>;
0313                 interrupt-parent = <&gpio6>;
0314                 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
0315         };
0316 };
0317 
0318 &i2c3 {
0319         clock-frequency = <100000>;
0320         pinctrl-names = "default";
0321         pinctrl-0 = <&pinctrl_i2c3>;
0322         status = "okay";
0323 };
0324 
0325 &iomuxc {
0326         pinctrl-names = "default";
0327 
0328         pinctrl_hog: hoggrp {
0329                 fsl,pins = <
0330                         MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x1b0b0  /*pcie power*/
0331                         MX6QDL_PAD_EIM_A25__GPIO5_IO02  0x1b0b0   /*LCD power*/
0332                         MX6QDL_PAD_EIM_D16__GPIO3_IO16  0x1b0b0   /*backlight power*/
0333                         MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x1b0b1 /*SD3 CD pin*/
0334                         MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 /*codec power*/
0335                         MX6QDL_PAD_EIM_A16__GPIO2_IO22  0x1b0b0 /*touch reset*/
0336                         MX6QDL_PAD_NANDF_ALE__GPIO6_IO08        0x1b0b01 /*touch irq*/
0337                         MX6QDL_PAD_GPIO_7__GPIO1_IO07    0x1b0b0/*backlight pwr*/
0338                         MX6QDL_PAD_GPIO_16__GPIO7_IO11  0x1b0b0 /*gpio 5V_1*/
0339                         MX6QDL_PAD_EIM_A19__GPIO2_IO19  0x1b0b0 /*gpio 5V_2*/
0340                         MX6QDL_PAD_EIM_A24__GPIO5_IO04  0x1b0b0 /*gpio 5V_3*/
0341                         MX6QDL_PAD_GPIO_17__GPIO7_IO12  0x1b0b0 /*gpio 5V_4*/
0342                         MX6QDL_PAD_NANDF_CLE__GPIO6_IO07        0x1b0b0 /*AUX_5V_EN*/
0343                         MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09       0x1b0b0 /*AUX_5VB_EN*/
0344                         MX6QDL_PAD_NANDF_RB0__GPIO6_IO10        0x1b0b0 /*AUX_3V3_EN*/
0345                         MX6QDL_PAD_EIM_D21__GPIO3_IO21  0x1b0b0 /*I2C expander pwr*/
0346                 >;
0347         };
0348 
0349         pinctrl_audmux: audmuxgrp {
0350                 fsl,pins = <
0351                         MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
0352                         MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
0353                         MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
0354                         MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
0355                 >;
0356         };
0357 
0358         pinctrl_ecspi1: ecspi1grp {
0359                 fsl,pins = <
0360                         MX6QDL_PAD_KEY_COL1__ECSPI1_MISO        0x100b1
0361                         MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI        0x100b1
0362                         MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK        0x100b1
0363                         MX6QDL_PAD_KEY_ROW1__GPIO4_IO09         0x1b0b0
0364                 >;
0365         };
0366 
0367         pinctrl_enet: enetgrp {
0368                 fsl,pins = <
0369                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b8b0
0370                         MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
0371                         /* AR8035 reset */
0372                         MX6QDL_PAD_EIM_A20__GPIO2_IO18          0x130b0
0373                         /* AR8035 interrupt */
0374                         MX6QDL_PAD_EIM_CS0__GPIO2_IO23          0x1b0b1
0375                         MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
0376                         MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
0377                         MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
0378                         MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
0379                         MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
0380                         MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
0381                         /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
0382                         MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x0a0b1
0383                         /* AR8035 pin strapping: IO voltage: pull up */
0384                         MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
0385                         /* AR8035 pin strapping: PHYADDR#0: pull down */
0386                         MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x13030
0387                         /* AR8035 pin strapping: PHYADDR#1: pull down */
0388                         MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x13030
0389                         /* AR8035 pin strapping: MODE#1: pull up */
0390                         MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
0391                         /* AR8035 pin strapping: MODE#3: pull up */
0392                         MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
0393                         /* AR8035 pin strapping: MODE#0: pull down */
0394                         MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x13030
0395                 >;
0396         };
0397 
0398         pinctrl_flexcan2: flexcan2grp {
0399                 fsl,pins = <
0400                         MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX        0x1b0b0
0401                         MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX        0x1b0b0
0402                 >;
0403         };
0404 
0405         pinctrl_gpio_keys: gpio_keysgrp {
0406                 fsl,pins = <
0407                         MX6QDL_PAD_SD4_DAT4__GPIO2_IO12 0x1b0b0
0408                 >;
0409         };
0410 
0411         pinctrl_hdmi_cec: hdmicecgrp {
0412                 fsl,pins = <
0413                         MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x108b0
0414                 >;
0415         };
0416 
0417         pinctrl_i2c1: i2c1grp {
0418                 fsl,pins = <
0419                         MX6QDL_PAD_CSI0_DAT8__I2C1_SDA          0x4001b8b1
0420                         MX6QDL_PAD_CSI0_DAT9__I2C1_SCL          0x4001b8b1
0421                 >;
0422         };
0423 
0424         pinctrl_i2c2: i2c2grp {
0425                 fsl,pins = <
0426                         MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
0427                         MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
0428                 >;
0429         };
0430 
0431         pinctrl_i2c3: i2c3grp {
0432                 fsl,pins = <
0433                         MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
0434                         MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
0435                 >;
0436         };
0437 
0438         pinctrl_i2c1_sgtl5000: i2c1-sgtl5000grp {
0439                 fsl,pins = <
0440                         MX6QDL_PAD_GPIO_0__CCM_CLKO1                    0x000b0 /* sys_mclk */
0441                         MX6QDL_PAD_SD3_RST__GPIO7_IO08          0x130b0 /*headphone det*/
0442                         MX6QDL_PAD_GPIO_8__GPIO1_IO08                   0x130b0 /*microphone det*/
0443                 >;
0444         };
0445 
0446         pinctrl_pwm1: pwm1grp {
0447                 fsl,pins = <
0448                         MX6QDL_PAD_GPIO_9__PWM1_OUT         0x1b0b1
0449                 >;
0450         };
0451 
0452         pinctrl_uart1: uart1grp {
0453                 fsl,pins = <
0454                         MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA    0x1b0b1
0455                         MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA    0x1b0b1
0456                         MX6QDL_PAD_EIM_D20__UART1_CTS_B 0x1b0b1
0457                         MX6QDL_PAD_EIM_D19__UART1_RTS_B 0x1b0b1
0458                         MX6QDL_PAD_EIM_D23__UART1_DCD_B 0x1b0b0
0459                         MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x1b0b0
0460                         MX6QDL_PAD_EIM_D25__UART1_DSR_B 0x1b0b0
0461                 >;
0462         };
0463 
0464         pinctrl_uart2: uart2grp {
0465                 fsl,pins = <
0466                         MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
0467                         MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
0468                         MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x1b0b1
0469                         MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x1b0b1
0470                 >;
0471         };
0472 
0473         pinctrl_uart3: uart3grp {
0474                 fsl,pins = <
0475                         MX6QDL_PAD_SD4_CLK__UART3_RX_DATA       0x1b0b1
0476                         MX6QDL_PAD_SD4_CMD__UART3_TX_DATA       0x1b0b1
0477                         MX6QDL_PAD_EIM_D30__UART3_CTS_B         0x1b0b1
0478                         MX6QDL_PAD_EIM_D31__UART3_RTS_B         0x1b0b1
0479                 >;
0480         };
0481 
0482         pinctrl_uart4: uart4grp {
0483                 fsl,pins = <
0484                         MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA    0x1b0b1
0485                         MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA    0x1b0b1
0486                         MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B      0x1b0b1
0487                         MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B      0x1b0b1
0488                 >;
0489         };
0490 
0491         pinctrl_uart5: uart5grp {
0492                 fsl,pins = <
0493                         MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA    0x1b0b1
0494                         MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA    0x1b0b1
0495                         MX6QDL_PAD_CSI0_DAT18__UART5_RTS_B      0x1b0b1
0496                         MX6QDL_PAD_CSI0_DAT19__UART5_CTS_B      0x1b0b1
0497                         MX6QDL_PAD_EIM_A21__GPIO2_IO17           0x15059 /*BT_EN*/
0498                 >;
0499         };
0500 
0501         pinctrl_usbotg: usbotggrp {
0502                 fsl,pins = <
0503                         MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID       0x17059
0504                 >;
0505         };
0506 
0507         pinctrl_usdhc1: usdhc1grp {
0508                 fsl,pins = <
0509                         MX6QDL_PAD_SD1_CMD__SD1_CMD             0x17059
0510                         MX6QDL_PAD_SD1_CLK__SD1_CLK             0x10059
0511                         MX6QDL_PAD_SD1_DAT0__SD1_DATA0          0x17059
0512                         MX6QDL_PAD_SD1_DAT1__SD1_DATA1          0x17059
0513                         MX6QDL_PAD_SD1_DAT2__SD1_DATA2          0x17059
0514                         MX6QDL_PAD_SD1_DAT3__SD1_DATA3          0x17059
0515                         MX6QDL_PAD_NANDF_D0__SD1_DATA4          0x17059
0516                         MX6QDL_PAD_NANDF_D1__SD1_DATA5          0x17059
0517                         MX6QDL_PAD_NANDF_D2__SD1_DATA6          0x17059
0518                         MX6QDL_PAD_NANDF_D3__SD1_DATA7          0x17059
0519                 >;
0520         };
0521 
0522         pinctrl_usdhc2: usdhc2grp {
0523                 fsl,pins = <
0524                         MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
0525                         MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
0526                         MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
0527                         MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
0528                         MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
0529                         MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
0530                         MX6QDL_PAD_EIM_RW__GPIO2_IO26                   0x15059 /*WL_EN_LDO*/
0531                         MX6QDL_PAD_EIM_CS1__GPIO2_IO24          0x15059 /*WL_EN*/
0532                         MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18      0x15059 /*WL_IRQ*/
0533                 >;
0534         };
0535 
0536         pinctrl_usdhc3: usdhc3grp {
0537                 fsl,pins = <
0538                         MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17071
0539                         MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10071
0540                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17071
0541                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17071
0542                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17071
0543                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17071
0544                 >;
0545         };
0546 
0547         pinctrl_wdog: wdoggrp {
0548                 fsl,pins = <
0549                         MX6QDL_PAD_GPIO_1__WDOG2_B      0x1b0b00
0550                 >;
0551         };
0552 };
0553 
0554 &ldb {
0555         status = "okay";
0556 
0557         lvds-channel@1 {
0558                 fsl,data-mapping = "spwg";
0559                 fsl,data-width = <18>;
0560                 status = "okay";
0561 
0562                 port@4 {
0563                         reg = <4>;
0564 
0565                         lvds0_out: endpoint {
0566                                 remote-endpoint = <&panel_in>;
0567                         };
0568                 };
0569         };
0570 };
0571 
0572 &pwm1 {
0573         #pwm-cells = <2>;
0574         pinctrl-names = "default";
0575         pinctrl-0 = <&pinctrl_pwm1>;
0576         status = "okay";
0577 };
0578 
0579 &snvs_poweroff {
0580         status = "okay";
0581 };
0582 
0583 &ssi1 {
0584         status = "okay";
0585 };
0586 
0587 &uart1 {
0588         pinctrl-names = "default";
0589         pinctrl-0 = <&pinctrl_uart1>;
0590         uart-has-rtscts;
0591         fsl,dte-mode;
0592         status = "okay";
0593 };
0594 
0595 &uart2 {
0596         pinctrl-names = "default";
0597         pinctrl-0 = <&pinctrl_uart2>;
0598         uart-has-rtscts;
0599         status = "okay";
0600 };
0601 
0602 &uart3 {
0603         pinctrl-names = "default";
0604         pinctrl-0 = <&pinctrl_uart3>;
0605         uart-has-rtscts;
0606         status = "okay";
0607 };
0608 
0609 &uart4 {
0610         pinctrl-names = "default";
0611         pinctrl-0 = <&pinctrl_uart4>;
0612         uart-has-rtscts;
0613         status = "okay";
0614 };
0615 
0616 &uart5 {
0617         pinctrl-names = "default";
0618         pinctrl-0 = <&pinctrl_uart5>;
0619         uart-has-rtscts;
0620         status = "okay";
0621 };
0622 
0623 &usbotg {
0624         vbus-supply = <&reg_usb_otg_vbus>;
0625         pinctrl-names = "default";
0626         pinctrl-0 = <&pinctrl_usbotg>;
0627         disable-over-current;
0628         srp-disable;
0629         hnp-disable;
0630         adp-disable;
0631         status = "okay";
0632 };
0633 
0634 &usbh1 {
0635         status = "okay";
0636 };
0637 
0638 &usbphy1 {
0639         fsl,tx-d-cal = <0x5>;
0640 };
0641 
0642 &usbphy2 {
0643         fsl,tx-d-cal = <0x5>;
0644 };
0645 
0646 &usdhc1 {
0647         pinctrl-names = "default";
0648         pinctrl-0 = <&pinctrl_usdhc1>;
0649         bus-width = <8>;
0650         keep-power-in-suspend;
0651         vmmc-supply = <&reg_3p3v>;
0652         status = "okay";
0653 };
0654 
0655 &usdhc2 {
0656         pinctrl-names = "default";
0657         pinctrl-0 = <&pinctrl_usdhc2>;
0658         bus-width = <4>;
0659         vmmc-supply = <&wlan_en_reg>;
0660         no-1-8-v;
0661         keep-power-in-suspend;
0662         non-removable;
0663         cap-power-off-card;
0664         status = "okay";
0665 
0666         #address-cells = <1>;
0667         #size-cells = <0>;
0668         wlcore: wlcore@2 {
0669                 compatible = "ti,wl1835";
0670                 reg = <2>;
0671                 interrupt-parent = <&gpio5>;
0672                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
0673                 ref-clock-frequency = <38400000>;
0674                 tcxo-clock-frequency = <26000000>;
0675         };
0676 };
0677 
0678 &usdhc3 {
0679         pinctrl-names = "default";
0680         pinctrl-0 = <&pinctrl_usdhc3>;
0681         bus-width = <4>;
0682         cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
0683         no-1-8-v;
0684         keep-power-in-suspend;
0685         wakeup-source;
0686         status = "okay";
0687 };
0688 
0689 &sata {
0690         status = "okay";
0691 };
0692 
0693 &wdog1 {
0694         status = "okay";
0695 };