0001 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
0002 /*
0003 * Copyright (c) 2016 Protonic Holland
0004 * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
0005 */
0006
0007 /dts-v1/;
0008 #include <dt-bindings/gpio/gpio.h>
0009 #include <dt-bindings/leds/common.h>
0010 #include <dt-bindings/sound/fsl-imx-audmux.h>
0011 #include "imx6dl.dtsi"
0012
0013 / {
0014 model = "Altesco I6P Board";
0015 compatible = "alt,alti6p", "fsl,imx6dl";
0016
0017 chosen {
0018 stdout-path = &uart4;
0019 };
0020
0021 clock_ksz8081: clock-ksz8081 {
0022 compatible = "fixed-clock";
0023 #clock-cells = <0>;
0024 clock-frequency = <50000000>;
0025 };
0026
0027 i2c2-mux {
0028 compatible = "i2c-mux";
0029 i2c-parent = <&i2c2>;
0030 mux-controls = <&i2c_mux>;
0031 #address-cells = <1>;
0032 #size-cells = <0>;
0033
0034 i2c@1 {
0035 reg = <1>;
0036 #address-cells = <1>;
0037 #size-cells = <0>;
0038 };
0039
0040 i2c@2 {
0041 reg = <2>;
0042 #address-cells = <1>;
0043 #size-cells = <0>;
0044 };
0045 };
0046
0047 i2c4-mux {
0048 compatible = "i2c-mux";
0049 i2c-parent = <&i2c4>;
0050 mux-controls = <&i2c_mux>;
0051 #address-cells = <1>;
0052 #size-cells = <0>;
0053
0054 i2c@1 {
0055 reg = <1>;
0056 #address-cells = <1>;
0057 #size-cells = <0>;
0058 };
0059
0060 i2c@2 {
0061 reg = <2>;
0062 #address-cells = <1>;
0063 #size-cells = <0>;
0064 };
0065 };
0066
0067 leds {
0068 compatible = "gpio-leds";
0069 pinctrl-names = "default";
0070 pinctrl-0 = <&pinctrl_leds>;
0071
0072 led-debug0 {
0073 function = LED_FUNCTION_STATUS;
0074 gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
0075 linux,default-trigger = "heartbeat";
0076 };
0077
0078 led-debug1 {
0079 function = LED_FUNCTION_SD;
0080 gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
0081 linux,default-trigger = "disk-activity";
0082 };
0083 };
0084
0085 i2c_mux: mux-controller {
0086 compatible = "gpio-mux";
0087 #mux-control-cells = <0>;
0088 pinctrl-names = "default";
0089 pinctrl-0 = <&pinctrl_i2cmux>;
0090
0091 mux-gpios = <&gpio5 10 GPIO_ACTIVE_HIGH>,
0092 <&gpio5 11 GPIO_ACTIVE_HIGH>;
0093 };
0094
0095 reg_1v8: regulator-1v8 {
0096 compatible = "regulator-fixed";
0097 regulator-name = "1v8";
0098 regulator-min-microvolt = <1800000>;
0099 regulator-max-microvolt = <1800000>;
0100 };
0101
0102 reg_3v3: regulator-3v3 {
0103 compatible = "regulator-fixed";
0104 regulator-name = "3v3";
0105 regulator-min-microvolt = <3300000>;
0106 regulator-max-microvolt = <3300000>;
0107 };
0108
0109 reg_5v0: regulator-5v0 {
0110 compatible = "regulator-fixed";
0111 regulator-name = "5v0";
0112 regulator-min-microvolt = <5000000>;
0113 regulator-max-microvolt = <5000000>;
0114 };
0115
0116 reg_h1_vbus: regulator-h1-vbus {
0117 compatible = "regulator-fixed";
0118 regulator-name = "h1-vbus";
0119 regulator-min-microvolt = <5000000>;
0120 regulator-max-microvolt = <5000000>;
0121 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
0122 enable-active-high;
0123 };
0124
0125 reg_otg_vbus: regulator-otg-vbus {
0126 compatible = "regulator-fixed";
0127 regulator-name = "otg-vbus";
0128 regulator-min-microvolt = <5000000>;
0129 regulator-max-microvolt = <5000000>;
0130 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
0131 enable-active-high;
0132 };
0133
0134 sound {
0135 compatible = "simple-audio-card";
0136 simple-audio-card,name = "prti6q-sgtl5000";
0137 simple-audio-card,format = "i2s";
0138 simple-audio-card,widgets =
0139 "Microphone", "Microphone Jack",
0140 "Line", "Line In Jack",
0141 "Headphone", "Headphone Jack",
0142 "Speaker", "External Speaker";
0143 simple-audio-card,routing =
0144 "MIC_IN", "Microphone Jack",
0145 "LINE_IN", "Line In Jack",
0146 "Headphone Jack", "HP_OUT",
0147 "External Speaker", "LINE_OUT";
0148
0149 simple-audio-card,cpu {
0150 sound-dai = <&ssi1>;
0151 system-clock-frequency = <0>;
0152 };
0153
0154 simple-audio-card,codec {
0155 sound-dai = <&sgtl5000>;
0156 bitclock-master;
0157 frame-master;
0158 };
0159 };
0160 };
0161
0162 &audmux {
0163 pinctrl-names = "default";
0164 pinctrl-0 = <&pinctrl_audmux>;
0165 status = "okay";
0166
0167 mux-ssi1 {
0168 fsl,audmux-port = <0>;
0169 fsl,port-config = <
0170 IMX_AUDMUX_V2_PTCR_SYN 0
0171 IMX_AUDMUX_V2_PTCR_TFSEL(2) 0
0172 IMX_AUDMUX_V2_PTCR_TCSEL(2) 0
0173 IMX_AUDMUX_V2_PTCR_TFSDIR 0
0174 IMX_AUDMUX_V2_PTCR_TCLKDIR IMX_AUDMUX_V2_PDCR_RXDSEL(2)
0175 >;
0176 };
0177
0178 mux-pins3 {
0179 fsl,audmux-port = <2>;
0180 fsl,port-config = <
0181 IMX_AUDMUX_V2_PTCR_SYN IMX_AUDMUX_V2_PDCR_RXDSEL(0)
0182 0 IMX_AUDMUX_V2_PDCR_TXRXEN
0183 >;
0184 };
0185 };
0186
0187 &can1 {
0188 pinctrl-names = "default";
0189 pinctrl-0 = <&pinctrl_can1>;
0190 xceiver-supply = <®_5v0>;
0191 status = "okay";
0192 };
0193
0194 &ecspi1 {
0195 cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
0196 pinctrl-names = "default";
0197 pinctrl-0 = <&pinctrl_ecspi1>;
0198 status = "okay";
0199
0200 flash@0 {
0201 compatible = "jedec,spi-nor";
0202 reg = <0>;
0203 spi-max-frequency = <20000000>;
0204 };
0205 };
0206
0207 &fec {
0208 pinctrl-names = "default";
0209 pinctrl-0 = <&pinctrl_enet>;
0210 phy-mode = "rmii";
0211 clocks = <&clks IMX6QDL_CLK_ENET>,
0212 <&clks IMX6QDL_CLK_ENET>,
0213 <&clock_ksz8081>;
0214 clock-names = "ipg", "ahb", "ptp";
0215 status = "okay";
0216
0217 mdio {
0218 #address-cells = <1>;
0219 #size-cells = <0>;
0220
0221 /* Microchip KSZ8081RNA PHY */
0222 rgmii_phy: ethernet-phy@0 {
0223 reg = <0>;
0224 interrupts-extended = <&gpio4 30 IRQ_TYPE_LEVEL_LOW>;
0225 reset-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
0226 reset-assert-us = <10000>;
0227 reset-deassert-us = <300>;
0228 };
0229 };
0230 };
0231
0232 &gpio1 {
0233 gpio-line-names =
0234 "", "SD1_CD", "", "USB_H1_OC", "", "", "", "",
0235 "DEBUG_0", "DEBUG_1", "", "", "", "", "", "",
0236 "", "", "", "", "", "", "", "",
0237 "", "", "", "", "", "", "", "";
0238 };
0239
0240 &gpio3 {
0241 gpio-line-names =
0242 "", "", "", "", "", "", "", "",
0243 "", "", "", "", "", "", "", "",
0244 "", "", "", "ECSPI1_SS1", "", "USB_EXT1_OC", "USB_EXT1_PWR", "",
0245 "", "", "", "", "", "", "", "";
0246 };
0247
0248 &gpio4 {
0249 gpio-line-names =
0250 "", "", "", "", "", "", "", "",
0251 "", "", "", "", "", "", "", "",
0252 "", "", "", "", "", "", "", "",
0253 "", "", "ETH_RESET", "", "", "BUZZER", "ETH_INTRP", "";
0254 };
0255
0256 &gpio5 {
0257 gpio-line-names =
0258 "", "", "", "", "", "", "", "",
0259 "", "", "I2C_EN13", "I2C_EN24", "", "", "", "",
0260 "", "", "", "", "", "AUDIO_RESET", "", "",
0261 "", "", "", "", "", "", "", "";
0262 };
0263
0264 &hdmi {
0265 pinctrl-names = "default";
0266 pinctrl-0 = <&pinctrl_hdmi>;
0267 ddc-i2c-bus = <&i2c1>;
0268 status = "okay";
0269 };
0270
0271 /* DDC */
0272 &i2c1 {
0273 clock-frequency = <100000>;
0274 pinctrl-names = "default";
0275 pinctrl-0 = <&pinctrl_i2c1>;
0276 status = "okay";
0277
0278 sgtl5000: audio-codec@a {
0279 compatible = "fsl,sgtl5000";
0280 reg = <0xa>;
0281 #sound-dai-cells = <0>;
0282 clocks = <&clks 201>;
0283 VDDA-supply = <®_3v3>;
0284 VDDIO-supply = <®_3v3>;
0285 VDDD-supply = <®_1v8>;
0286 };
0287
0288 /* additional i2c devices are added automatically by the boot loader */
0289 };
0290
0291 &i2c2 {
0292 clock-frequency = <50000>;
0293 pinctrl-names = "default";
0294 pinctrl-0 = <&pinctrl_i2c2>;
0295 status = "okay";
0296
0297 /* external interface, device are configured from user space */
0298 };
0299
0300 &i2c3 {
0301 clock-frequency = <100000>;
0302 pinctrl-names = "default";
0303 pinctrl-0 = <&pinctrl_i2c3>;
0304 status = "okay";
0305
0306 rtc@51 {
0307 compatible = "nxp,pcf8563";
0308 reg = <0x51>;
0309 };
0310
0311 temperature-sensor@70 {
0312 compatible = "ti,tmp103";
0313 reg = <0x70>;
0314 };
0315 };
0316
0317 &i2c4 {
0318 clock-frequency = <50000>;
0319 pinctrl-names = "default";
0320 pinctrl-0 = <&pinctrl_i2c4>;
0321 status = "okay";
0322 };
0323
0324 &pwm1 {
0325 pinctrl-names = "default";
0326 pinctrl-0 = <&pinctrl_pwm1>;
0327 status = "okay";
0328 };
0329
0330 &ssi1 {
0331 #sound-dai-cells = <0>;
0332 fsl,mode = "ac97-slave";
0333 status = "okay";
0334 };
0335
0336 &uart2 {
0337 pinctrl-names = "default";
0338 pinctrl-0 = <&pinctrl_uart2>;
0339 status = "okay";
0340 };
0341
0342 &uart4 {
0343 pinctrl-names = "default";
0344 pinctrl-0 = <&pinctrl_uart4>;
0345 status = "okay";
0346 };
0347
0348 &uart5 {
0349 pinctrl-names = "default";
0350 pinctrl-0 = <&pinctrl_uart5>;
0351 status = "okay";
0352 };
0353
0354 &usbh1 {
0355 vbus-supply = <®_h1_vbus>;
0356 pinctrl-names = "default";
0357 pinctrl-0 = <&pinctrl_usbh1>;
0358 phy_type = "utmi";
0359 dr_mode = "host";
0360 status = "okay";
0361 };
0362
0363 &usbotg {
0364 vbus-supply = <®_otg_vbus>;
0365 pinctrl-names = "default";
0366 pinctrl-0 = <&pinctrl_usbotg>;
0367 phy_type = "utmi";
0368 dr_mode = "host";
0369 status = "okay";
0370 };
0371
0372 &usdhc1 {
0373 pinctrl-names = "default";
0374 pinctrl-0 = <&pinctrl_usdhc1>;
0375 cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
0376 no-1-8-v;
0377 disable-wp;
0378 cap-sd-highspeed;
0379 no-mmc;
0380 no-sdio;
0381 status = "okay";
0382 };
0383
0384 &usdhc3 {
0385 pinctrl-names = "default";
0386 pinctrl-0 = <&pinctrl_usdhc3>;
0387 bus-width = <8>;
0388 no-1-8-v;
0389 non-removable;
0390 no-sd;
0391 no-sdio;
0392 status = "okay";
0393 };
0394
0395 &iomuxc {
0396 pinctrl_audmux: audmuxgrp {
0397 fsl,pins = <
0398 MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x030b0
0399 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
0400 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
0401 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
0402 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
0403 >;
0404 };
0405
0406 pinctrl_can1: can1grp {
0407 fsl,pins = <
0408 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000
0409 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008
0410 >;
0411 };
0412
0413 pinctrl_ecspi1: ecspi1grp {
0414 fsl,pins = <
0415 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x1b000
0416 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x3008
0417 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x3008
0418 /* CS */
0419 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x3008
0420 >;
0421 };
0422
0423 pinctrl_enet: enetgrp {
0424 fsl,pins = <
0425 /* MX6QDL_ENET_PINGRP4 */
0426 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
0427 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
0428 MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
0429 MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
0430 MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
0431 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
0432 MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
0433 MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
0434 MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
0435
0436 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b0
0437 /* Phy reset */
0438 MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 0x1b0b0
0439 /* nINTRP */
0440 MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0
0441 >;
0442 };
0443
0444 pinctrl_hdmi: hdmigrp {
0445 fsl,pins = <
0446 /* NOTE: DDC is done via I2C2, so DON'T configure DDC
0447 * pins for HDMI!
0448 */
0449 MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0
0450 >;
0451 };
0452
0453 pinctrl_i2c1: i2c1grp {
0454 fsl,pins = <
0455 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1
0456 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1
0457 >;
0458 };
0459
0460 pinctrl_i2c2: i2c2grp {
0461 fsl,pins = <
0462 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
0463 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
0464 >;
0465 };
0466
0467 pinctrl_i2c3: i2c3grp {
0468 fsl,pins = <
0469 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
0470 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
0471 >;
0472 };
0473
0474 pinctrl_i2c4: i2c4grp {
0475 fsl,pins = <
0476 MX6QDL_PAD_NANDF_CS3__I2C4_SDA 0x4001f8b1
0477 MX6QDL_PAD_NANDF_WP_B__I2C4_SCL 0x4001f8b1
0478 >;
0479 };
0480
0481 pinctrl_i2cmux: i2cmuxgrp {
0482 fsl,pins = <
0483 MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10 0x1b0b0
0484 MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x1b0b0
0485 >;
0486 };
0487
0488 pinctrl_leds: ledsgrp {
0489 fsl,pins = <
0490 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
0491 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
0492 >;
0493 };
0494
0495 pinctrl_pwm1: pwm1grp {
0496 fsl,pins = <
0497 MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x8
0498 >;
0499 };
0500
0501 pinctrl_uart2: uart2grp {
0502 fsl,pins = <
0503 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
0504 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
0505 >;
0506 };
0507
0508 pinctrl_uart4: uart4grp {
0509 fsl,pins = <
0510 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
0511 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
0512 >;
0513 };
0514
0515 pinctrl_uart5: uart5grp {
0516 fsl,pins = <
0517 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
0518 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
0519 >;
0520 };
0521
0522 pinctrl_usbh1: usbh1grp {
0523 fsl,pins = <
0524 MX6QDL_PAD_GPIO_3__USB_H1_OC 0x1B058
0525 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1B058
0526
0527 >;
0528 };
0529
0530 pinctrl_usbotg: usbotggrp {
0531 fsl,pins = <
0532 MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
0533 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
0534 >;
0535 };
0536
0537 pinctrl_usdhc1: usdhc1grp {
0538 fsl,pins = <
0539 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9
0540 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
0541 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
0542 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
0543 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
0544 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
0545 MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0
0546 >;
0547 };
0548
0549 pinctrl_usdhc3: usdhc3grp {
0550 fsl,pins = <
0551 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099
0552 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099
0553 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099
0554 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099
0555 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099
0556 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099
0557 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099
0558 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099
0559 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099
0560 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099
0561 MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1
0562 >;
0563 };
0564 };
