0001 // SPDX-License-Identifier: GPL-2.0
0002 //
0003 // Copyright (C) 2019 Logic PD, Inc.
0004
0005 #include <dt-bindings/gpio/gpio.h>
0006 #include <dt-bindings/input/input.h>
0007
0008 / {
0009 chosen {
0010 stdout-path = &uart1;
0011 };
0012
0013 memory@10000000 {
0014 device_type = "memory";
0015 reg = <0x10000000 0x80000000>;
0016 };
0017
0018 reg_wl18xx_vmmc: regulator-wl18xx {
0019 compatible = "regulator-fixed";
0020 regulator-name = "vwl1837";
0021 regulator-min-microvolt = <3300000>;
0022 regulator-max-microvolt = <3300000>;
0023 gpio = <&gpio7 0 GPIO_ACTIVE_HIGH>;
0024 startup-delay-us = <70000>;
0025 enable-active-high;
0026 };
0027 };
0028
0029 &clks {
0030 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
0031 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
0032 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
0033 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
0034 };
0035
0036 &gpmi {
0037 pinctrl-names = "default";
0038 pinctrl-0 = <&pinctrl_gpmi_nand>;
0039 nand-on-flash-bbt;
0040 status = "okay";
0041 };
0042
0043 &i2c3 {
0044 clock-frequency = <100000>;
0045 pinctrl-names = "default";
0046 pinctrl-0 = <&pinctrl_i2c3>;
0047 status = "okay";
0048
0049 pfuze100: pmic@8 {
0050 compatible = "fsl,pfuze100";
0051 reg = <0x08>;
0052
0053 regulators {
0054 sw1a_reg: sw1ab {
0055 regulator-min-microvolt = <725000>;
0056 regulator-max-microvolt = <1450000>;
0057 regulator-name = "vddcore";
0058 regulator-boot-on;
0059 regulator-always-on;
0060 regulator-ramp-delay = <6250>;
0061 };
0062
0063 sw1c_reg: sw1c {
0064 regulator-min-microvolt = <725000>;
0065 regulator-max-microvolt = <1450000>;
0066 regulator-name = "vddsoc";
0067 regulator-boot-on;
0068 regulator-always-on;
0069 regulator-ramp-delay = <6250>;
0070 };
0071
0072 sw2_reg: sw2 {
0073 regulator-min-microvolt = <3300000>;
0074 regulator-max-microvolt = <3300000>;
0075 regulator-name = "gen_3v3";
0076 regulator-boot-on;
0077 };
0078
0079 sw3a_reg: sw3a {
0080 regulator-min-microvolt = <1350000>;
0081 regulator-max-microvolt = <1350000>;
0082 regulator-name = "sw3a_vddr";
0083 regulator-boot-on;
0084 regulator-always-on;
0085 };
0086
0087 sw3b_reg: sw3b {
0088 regulator-min-microvolt = <1350000>;
0089 regulator-max-microvolt = <1350000>;
0090 regulator-name = "sw3b_vddr";
0091 regulator-boot-on;
0092 regulator-always-on;
0093 };
0094
0095 sw4_reg: sw4 {
0096 regulator-min-microvolt = <1800000>;
0097 regulator-max-microvolt = <3300000>;
0098 regulator-name = "gen_rgmii";
0099 };
0100
0101 swbst_reg: swbst {
0102 regulator-min-microvolt = <5000000>;
0103 regulator-max-microvolt = <5150000>;
0104 regulator-name = "gen_5v0";
0105 };
0106
0107 snvs_reg: vsnvs {
0108 regulator-min-microvolt = <1000000>;
0109 regulator-max-microvolt = <3000000>;
0110 regulator-name = "gen_vsns";
0111 regulator-boot-on;
0112 regulator-always-on;
0113 };
0114
0115 vref_reg: vrefddr {
0116 regulator-boot-on;
0117 regulator-always-on;
0118 };
0119
0120 vgen1_reg: vgen1 {
0121 regulator-min-microvolt = <1500000>;
0122 regulator-max-microvolt = <1500000>;
0123 regulator-name = "gen_1v5";
0124 };
0125
0126 vgen2_reg: vgen2 {
0127 regulator-name = "vgen2";
0128 regulator-min-microvolt = <800000>;
0129 regulator-max-microvolt = <1550000>;
0130 };
0131
0132 vgen3_reg: vgen3 {
0133 regulator-name = "gen_vadj_0";
0134 regulator-min-microvolt = <1800000>;
0135 regulator-max-microvolt = <3300000>;
0136 };
0137
0138 vgen4_reg: vgen4 {
0139 regulator-name = "gen_1v8";
0140 regulator-min-microvolt = <1800000>;
0141 regulator-max-microvolt = <1800000>;
0142 regulator-always-on;
0143 };
0144
0145 vgen5_reg: vgen5 {
0146 regulator-name = "gen_vadj_1";
0147 regulator-min-microvolt = <1800000>;
0148 regulator-max-microvolt = <3300000>;
0149 regulator-always-on;
0150 };
0151
0152 vgen6_reg: vgen6 {
0153 regulator-name = "gen_2v5";
0154 regulator-min-microvolt = <2500000>;
0155 regulator-max-microvolt = <2500000>;
0156 regulator-always-on;
0157 };
0158
0159 coin_reg: coin {
0160 regulator-min-microvolt = <2500000>;
0161 regulator-max-microvolt = <3000000>;
0162 regulator-always-on;
0163 };
0164 };
0165 };
0166
0167 temperature-sensor@49 {
0168 compatible = "ti,tmp102";
0169 reg = <0x49>;
0170 interrupt-parent = <&gpio6>;
0171 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
0172 #thermal-sensor-cells = <1>;
0173 };
0174
0175 temperature-sensor@4a {
0176 compatible = "ti,tmp102";
0177 reg = <0x4a>;
0178 pinctrl-names = "default";
0179 pinctrl-0 = <&pinctrl_tempsense>;
0180 interrupt-parent = <&gpio6>;
0181 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
0182 #thermal-sensor-cells = <1>;
0183 };
0184
0185 eeprom@51 {
0186 compatible = "atmel,24c64";
0187 pagesize = <32>;
0188 read-only; /* Manufacturing EEPROM programmed at factory */
0189 reg = <0x51>;
0190 };
0191
0192 eeprom@52 {
0193 compatible = "atmel,24c64";
0194 pagesize = <32>;
0195 reg = <0x52>;
0196 };
0197 };
0198
0199 /* Reroute power feeding the CPU to come from the external PMIC */
0200 ®_arm
0201 {
0202 vin-supply = <&sw1a_reg>;
0203 };
0204
0205 ®_soc
0206 {
0207 vin-supply = <&sw1c_reg>;
0208 };
0209
0210 &snvs_poweroff {
0211 status = "okay";
0212 };
0213
0214 &iomuxc {
0215 pinctrl-names = "default";
0216 pinctrl-0 = <&pinctrl_hog>;
0217
0218 pinctrl_gpmi_nand: gpmi-nandgrp {
0219 fsl,pins = <
0220 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0x0b0b1
0221 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0x0b0b1
0222 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0x0b0b1
0223 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0x0b000
0224 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0x0b0b1
0225 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0x0b0b1
0226 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0x0b0b1
0227 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0x0b0b1
0228 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0x0b0b1
0229 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0x0b0b1
0230 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0x0b0b1
0231 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0x0b0b1
0232 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0x0b0b1
0233 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0x0b0b1
0234 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0x0b0b1
0235 >;
0236 };
0237
0238 pinctrl_hog: hoggrp {
0239 fsl,pins = < /* Enable ARM Debugger */
0240 MX6QDL_PAD_CSI0_MCLK__ARM_TRACE_CTL 0x1b0b0
0241 MX6QDL_PAD_CSI0_PIXCLK__ARM_EVENTO 0x1b0b0
0242 MX6QDL_PAD_CSI0_VSYNC__ARM_TRACE00 0x1b0b0
0243 MX6QDL_PAD_CSI0_DATA_EN__ARM_TRACE_CLK 0x1b0b0
0244 MX6QDL_PAD_CSI0_DAT4__ARM_TRACE01 0x1b0b0
0245 MX6QDL_PAD_CSI0_DAT5__ARM_TRACE02 0x1b0b0
0246 MX6QDL_PAD_CSI0_DAT6__ARM_TRACE03 0x1b0b0
0247 MX6QDL_PAD_CSI0_DAT7__ARM_TRACE04 0x1b0b0
0248 MX6QDL_PAD_CSI0_DAT8__ARM_TRACE05 0x1b0b0
0249 MX6QDL_PAD_CSI0_DAT9__ARM_TRACE06 0x1b0b0
0250 MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x1b0b0
0251 MX6QDL_PAD_CSI0_DAT11__ARM_TRACE08 0x1b0b0
0252 MX6QDL_PAD_CSI0_DAT12__ARM_TRACE09 0x1b0b0
0253 MX6QDL_PAD_CSI0_DAT13__ARM_TRACE10 0x1b0b0
0254 MX6QDL_PAD_CSI0_DAT14__ARM_TRACE11 0x1b0b0
0255 MX6QDL_PAD_CSI0_DAT15__ARM_TRACE12 0x1b0b0
0256 MX6QDL_PAD_CSI0_DAT16__ARM_TRACE13 0x1b0b0
0257 MX6QDL_PAD_CSI0_DAT17__ARM_TRACE14 0x1b0b0
0258 MX6QDL_PAD_CSI0_DAT18__ARM_TRACE15 0x1b0b0
0259 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
0260 >;
0261 };
0262
0263 pinctrl_i2c3: i2c3grp {
0264 fsl,pins = <
0265 MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
0266 MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
0267 >;
0268 };
0269
0270 pinctrl_tempsense: tempsensegrp {
0271 fsl,pins = <
0272 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0
0273 >;
0274 };
0275
0276 pinctrl_uart1: uart1grp {
0277 fsl,pins = <
0278 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
0279 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
0280 >;
0281 };
0282
0283 pinctrl_uart2: uart2grp {
0284 fsl,pins = <
0285 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x13059 /* BT_EN */
0286 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
0287 MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
0288 MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
0289 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
0290 >;
0291 };
0292
0293 pinctrl_usdhc1: usdhc1grp {
0294 fsl,pins = <
0295 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170B9
0296 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100B9
0297 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170B9
0298 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170B9
0299 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170B9
0300 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170B9
0301 >;
0302 };
0303
0304 pinctrl_usdhc3: usdhc3grp {
0305 fsl,pins = <
0306 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17049
0307 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10049
0308 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17049
0309 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17049
0310 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17049
0311 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17049
0312 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x130b0 /* WL_IRQ */
0313 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* WLAN_EN */
0314 >;
0315 };
0316 };
0317
0318 &snvs_poweroff {
0319 status = "okay";
0320 };
0321
0322 &uart1 {
0323 pinctrl-names = "default";
0324 pinctrl-0 = <&pinctrl_uart1>;
0325 status = "okay";
0326 };
0327
0328 &uart2 {
0329 pinctrl-names = "default";
0330 pinctrl-0 = <&pinctrl_uart2>;
0331 uart-has-rtscts;
0332 status = "okay";
0333
0334 bluetooth {
0335 compatible = "ti,wl1837-st";
0336 enable-gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
0337 };
0338 };
0339
0340 &usdhc1 {
0341 pinctrl-names = "default", "state_100mhz", "state_200mhz";
0342 pinctrl-0 = <&pinctrl_usdhc1>;
0343 non-removable;
0344 keep-power-in-suspend;
0345 wakeup-source;
0346 vmmc-supply = <&sw2_reg>;
0347 status = "okay";
0348 };
0349
0350 &usdhc3 {
0351 pinctrl-names = "default";
0352 pinctrl-0 = <&pinctrl_usdhc3>;
0353 non-removable;
0354 cap-power-off-card;
0355 keep-power-in-suspend;
0356 wakeup-source;
0357 vmmc-supply = <®_wl18xx_vmmc>;
0358 #address-cells = <1>;
0359 #size-cells = <0>;
0360 status = "okay";
0361
0362 wlcore: wlcore@2 {
0363 compatible = "ti,wl1837";
0364 reg = <2>;
0365 interrupt-parent = <&gpio7>;
0366 interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
0367 tcxo-clock-frequency = <26000000>;
0368 };
0369 };
