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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright 2012 Markus Pargmann, Pengutronix
0004  */
0005 
0006 #include "imx27-phytec-phycard-s-som.dtsi"
0007 
0008 / {
0009         model = "Phytec pca100 rapid development kit";
0010         compatible = "phytec,imx27-pca100-rdk", "phytec,imx27-pca100", "fsl,imx27";
0011 
0012         chosen {
0013                 stdout-path = &uart1;
0014         };
0015 
0016         display: display {
0017                 model = "Primeview-PD050VL1";
0018                 bits-per-pixel = <16>;  /* non-standard but required */
0019                 fsl,pcr = <0xf0c88080>; /* non-standard but required */
0020                 display-timings {
0021                         native-mode = <&timing0>;
0022                         timing0: 640x480 {
0023                                 hactive = <640>;
0024                                 vactive = <480>;
0025                                 hback-porch = <112>;
0026                                 hfront-porch = <36>;
0027                                 hsync-len = <32>;
0028                                 vback-porch = <33>;
0029                                 vfront-porch = <33>;
0030                                 vsync-len = <2>;
0031                                 clock-frequency = <25000000>;
0032                         };
0033                 };
0034         };
0035 
0036         regulators {
0037                 compatible = "simple-bus";
0038                 #address-cells = <1>;
0039                 #size-cells = <0>;
0040 
0041                 reg_3v3: regulator@0 {
0042                         compatible = "regulator-fixed";
0043                         reg = <0>;
0044                         regulator-name = "3V3";
0045                         regulator-min-microvolt = <3300000>;
0046                         regulator-max-microvolt = <3300000>;
0047                         regulator-always-on;
0048                 };
0049         };
0050 };
0051 
0052 &fb {
0053         display = <&display>;
0054         status = "okay";
0055 };
0056 
0057 &i2c1 {
0058         pinctrl-names = "default";
0059         pinctrl-0 = <&pinctrl_i2c1>;
0060         status = "okay";
0061 
0062         rtc@51 {
0063                 compatible = "nxp,pcf8563";
0064                 reg = <0x51>;
0065         };
0066 
0067         adc@64 {
0068                 compatible = "maxim,max1037";
0069                 vcc-supply = <&reg_3v3>;
0070                 reg = <0x64>;
0071         };
0072 };
0073 
0074 &iomuxc {
0075         imx27-phycard-s-rdk {
0076                 pinctrl_i2c1: i2c1grp {
0077                         fsl,pins = <
0078                                 MX27_PAD_I2C_DATA__I2C_DATA 0x0
0079                                 MX27_PAD_I2C_CLK__I2C_CLK 0x0
0080                         >;
0081                 };
0082 
0083                 pinctrl_owire1: owire1grp {
0084                         fsl,pins = <
0085                                 MX27_PAD_RTCK__OWIRE 0x0
0086                         >;
0087                 };
0088 
0089                 pinctrl_sdhc2: sdhc2grp {
0090                         fsl,pins = <
0091                                 MX27_PAD_SD2_CLK__SD2_CLK 0x0
0092                                 MX27_PAD_SD2_CMD__SD2_CMD 0x0
0093                                 MX27_PAD_SD2_D0__SD2_D0 0x0
0094                                 MX27_PAD_SD2_D1__SD2_D1 0x0
0095                                 MX27_PAD_SD2_D2__SD2_D2 0x0
0096                                 MX27_PAD_SD2_D3__SD2_D3 0x0
0097                                 MX27_PAD_SSI3_RXDAT__GPIO3_29 0x0 /* CD */
0098                         >;
0099                 };
0100 
0101                 pinctrl_uart1: uart1grp {
0102                         fsl,pins = <
0103                                 MX27_PAD_UART1_TXD__UART1_TXD 0x0
0104                                 MX27_PAD_UART1_RXD__UART1_RXD 0x0
0105                                 MX27_PAD_UART1_CTS__UART1_CTS 0x0
0106                                 MX27_PAD_UART1_RTS__UART1_RTS 0x0
0107                         >;
0108                 };
0109 
0110                 pinctrl_uart2: uart2grp {
0111                         fsl,pins = <
0112                                 MX27_PAD_UART2_TXD__UART2_TXD 0x0
0113                                 MX27_PAD_UART2_RXD__UART2_RXD 0x0
0114                                 MX27_PAD_UART2_CTS__UART2_CTS 0x0
0115                                 MX27_PAD_UART2_RTS__UART2_RTS 0x0
0116                         >;
0117                 };
0118 
0119                 pinctrl_uart3: uart3grp {
0120                         fsl,pins = <
0121                                 MX27_PAD_UART3_TXD__UART3_TXD 0x0
0122                                 MX27_PAD_UART3_RXD__UART3_RXD 0x0
0123                                 MX27_PAD_UART3_CTS__UART3_CTS 0x0
0124                                 MX27_PAD_UART3_RTS__UART3_RTS 0x0
0125                         >;
0126                 };
0127         };
0128 };
0129 
0130 &owire {
0131         pinctrl-names = "default";
0132         pinctrl-0 = <&pinctrl_owire1>;
0133         status = "okay";
0134 };
0135 
0136 &sdhci2 {
0137         pinctrl-names = "default";
0138         pinctrl-0 = <&pinctrl_sdhc2>;
0139         cd-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
0140         status = "okay";
0141 };
0142 
0143 &uart1 {
0144         uart-has-rtscts;
0145         pinctrl-names = "default";
0146         pinctrl-0 = <&pinctrl_uart1>;
0147         status = "okay";
0148 };
0149 
0150 &uart2 {
0151         uart-has-rtscts;
0152         pinctrl-names = "default";
0153         pinctrl-0 = <&pinctrl_uart2>;
0154         status = "okay";
0155 };
0156 
0157 &uart3 {
0158         uart-has-rtscts;
0159         pinctrl-names = "default";
0160         pinctrl-0 = <&pinctrl_uart3>;
0161         status = "okay";
0162 };