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0001 /*
0002  * Copyright 2016 Linaro Ltd
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a copy
0005  * of this software and associated documentation files (the "Software"), to deal
0006  * in the Software without restriction, including without limitation the rights
0007  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
0008  * copies of the Software, and to permit persons to whom the Software is
0009  * furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
0017  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
0018  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
0019  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
0020  * THE SOFTWARE.
0021  */
0022 
0023 /dts-v1/;
0024 #include "arm-realview-pbx.dtsi"
0025 
0026 / {
0027         model = "ARM RealView Platform Baseboard for Cortex-A8";
0028         compatible = "arm,realview-pba8";
0029         arm,hbi = <0x178>;
0030 
0031         cpus {
0032                 #address-cells = <1>;
0033                 #size-cells = <0>;
0034                 enable-method = "arm,realview-smp";
0035 
0036                 cpu0: cpu@0 {
0037                         device_type = "cpu";
0038                         compatible = "arm,cortex-a8";
0039                         reg = <0>;
0040                 };
0041         };
0042 
0043         pmu: pmu@0 {
0044                 compatible = "arm,cortex-a8-pmu";
0045                 interrupt-parent = <&intc>;
0046                 interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
0047                 interrupt-affinity = <&cpu0>;
0048         };
0049 
0050         /* Primary GIC PL390 interrupt controller in the test chip */
0051         intc: interrupt-controller@1e000000 {
0052                 compatible = "arm,pl390";
0053                 #interrupt-cells = <3>;
0054                 #address-cells = <1>;
0055                 interrupt-controller;
0056                 reg = <0x1e001000 0x1000>,
0057                       <0x1e000000 0x100>;
0058         };
0059 };
0060 
0061 &ethernet {
0062         interrupt-parent = <&intc>;
0063         interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
0064 };
0065 
0066 &usb {
0067         interrupt-parent = <&intc>;
0068         interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
0069 };
0070 
0071 &soc {
0072         compatible = "arm,realview-pba8-soc", "simple-bus";
0073 };
0074 
0075 &syscon {
0076         compatible = "arm,realview-pba8-syscon", "syscon", "simple-mfd";
0077 };
0078 
0079 &serial0 {
0080         interrupt-parent = <&intc>;
0081         interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>;
0082 };
0083 
0084 &serial1 {
0085         interrupt-parent = <&intc>;
0086         interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>;
0087 };
0088 
0089 &serial2 {
0090         interrupt-parent = <&intc>;
0091         interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
0092 };
0093 
0094 &serial3 {
0095         interrupt-parent = <&intc>;
0096         interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
0097 };
0098 
0099 &ssp {
0100         interrupt-parent = <&intc>;
0101         interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
0102 };
0103 
0104 &wdog0 {
0105         interrupt-parent = <&intc>;
0106         interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
0107 };
0108 
0109 &wdog1 {
0110         interrupt-parent = <&intc>;
0111         interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
0112 };
0113 
0114 &timer01 {
0115         interrupt-parent = <&intc>;
0116         interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
0117 };
0118 
0119 &timer23 {
0120         interrupt-parent = <&intc>;
0121         interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
0122 };
0123 
0124 &gpio0 {
0125         interrupt-parent = <&intc>;
0126         interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
0127 };
0128 
0129 &gpio1 {
0130         interrupt-parent = <&intc>;
0131         interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
0132 };
0133 
0134 &gpio2 {
0135         interrupt-parent = <&intc>;
0136         interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
0137 };
0138 
0139 &rtc {
0140         interrupt-parent = <&intc>;
0141         interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
0142 };
0143 
0144 &timer45 {
0145         interrupt-parent = <&intc>;
0146         interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
0147 };
0148 
0149 &timer67 {
0150         interrupt-parent = <&intc>;
0151         interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
0152 };
0153 
0154 &aaci {
0155         interrupt-parent = <&intc>;
0156         interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>;
0157 };
0158 
0159 &mmc {
0160         interrupt-parent = <&intc>;
0161         interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH>,
0162                      <0 18 IRQ_TYPE_LEVEL_HIGH>;
0163 };
0164 
0165 &kmi0 {
0166         interrupt-parent = <&intc>;
0167         interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>;
0168 };
0169 
0170 &kmi1 {
0171         interrupt-parent = <&intc>;
0172         interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
0173 };
0174 
0175 &clcd {
0176         interrupt-parent = <&intc>;
0177         interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
0178 };