0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * support for the bosch am335x based shc c3 board
0004 *
0005 * Copyright, C) 2015 Heiko Schocher <hs@denx.de>
0006 *
0007 */
0008 /dts-v1/;
0009
0010 #include "am33xx.dtsi"
0011 #include <dt-bindings/input/input.h>
0012
0013 / {
0014 model = "Bosch SHC";
0015 compatible = "ti,am335x-shc", "ti,am335x-bone", "ti,am33xx";
0016
0017 aliases {
0018 mmcblk0 = &mmc1;
0019 mmcblk1 = &mmc2;
0020 };
0021
0022 cpus {
0023 cpu@0 {
0024 /*
0025 * To consider voltage drop between PMIC and SoC,
0026 * tolerance value is reduced to 2% from 4% and
0027 * voltage value is increased as a precaution.
0028 */
0029 operating-points = <
0030 /* kHz uV */
0031 594000 1225000
0032 294000 1125000
0033 >;
0034 voltage-tolerance = <2>; /* 2 percentage */
0035 cpu0-supply = <&dcdc2_reg>;
0036 };
0037 };
0038
0039 gpio-keys {
0040 compatible = "gpio-keys";
0041
0042 back-button {
0043 label = "Back Button";
0044 gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
0045 linux,code = <KEY_BACK>;
0046 debounce-interval = <1000>;
0047 wakeup-source;
0048 };
0049
0050 front-button {
0051 label = "Front Button";
0052 gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
0053 linux,code = <KEY_FRONT>;
0054 debounce-interval = <1000>;
0055 wakeup-source;
0056 };
0057 };
0058
0059 leds {
0060 pinctrl-names = "default";
0061 pinctrl-0 = <&user_leds_s0>;
0062
0063 compatible = "gpio-leds";
0064
0065 led1 {
0066 label = "shc:power:red";
0067 gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
0068 default-state = "off";
0069 };
0070
0071 led2 {
0072 label = "shc:power:bl";
0073 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
0074 linux,default-trigger = "timer";
0075 default-state = "on";
0076 };
0077
0078 led3 {
0079 label = "shc:lan:red";
0080 gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
0081 default-state = "off";
0082 };
0083
0084 led4 {
0085 label = "shc:lan:bl";
0086 gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
0087 default-state = "off";
0088 };
0089
0090 led5 {
0091 label = "shc:cloud:red";
0092 gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
0093 default-state = "off";
0094 };
0095
0096 led6 {
0097 label = "shc:cloud:bl";
0098 gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
0099 default-state = "off";
0100 };
0101 };
0102
0103 memory@80000000 {
0104 device_type = "memory";
0105 reg = <0x80000000 0x20000000>; /* 512 MB */
0106 };
0107
0108 vmmcsd_fixed: fixedregulator0 {
0109 compatible = "regulator-fixed";
0110 regulator-name = "vmmcsd_fixed";
0111 regulator-min-microvolt = <3300000>;
0112 regulator-max-microvolt = <3300000>;
0113 };
0114 };
0115
0116 &aes {
0117 status = "okay";
0118 };
0119
0120 &epwmss1 {
0121 status = "okay";
0122
0123 ehrpwm1: pwm@200 {
0124 pinctrl-names = "default";
0125 pinctrl-0 = <&ehrpwm1_pins>;
0126 status = "okay";
0127 };
0128 };
0129
0130 &gpio1 {
0131 hmtc-rst-hog {
0132 gpio-hog;
0133 gpios = <24 GPIO_ACTIVE_LOW>;
0134 output-high;
0135 line-name = "homematic_reset";
0136 };
0137
0138 hmtc-prog-hog {
0139 gpio-hog;
0140 gpios = <27 GPIO_ACTIVE_LOW>;
0141 output-high;
0142 line-name = "homematic_program";
0143 };
0144 };
0145
0146 &gpio3 {
0147 zgb-rst-hog {
0148 gpio-hog;
0149 gpios = <18 GPIO_ACTIVE_LOW>;
0150 output-low;
0151 line-name = "zigbee_reset";
0152 };
0153
0154 zgb-boot-hog {
0155 gpio-hog;
0156 gpios = <19 GPIO_ACTIVE_HIGH>;
0157 output-high;
0158 line-name = "zigbee_boot";
0159 };
0160 };
0161
0162 &i2c0 {
0163 pinctrl-names = "default";
0164 pinctrl-0 = <&i2c0_pins>;
0165 status = "okay";
0166 clock-frequency = <400000>;
0167
0168 tps: tps@24 {
0169 reg = <0x24>;
0170 };
0171
0172 at24@50 {
0173 compatible = "atmel,24c32";
0174 pagesize = <32>;
0175 reg = <0x50>;
0176 };
0177
0178 pcf8563@51 {
0179 compatible = "nxp,pcf8563";
0180 reg = <0x51>;
0181 };
0182 };
0183
0184 &mac_sw {
0185 pinctrl-names = "default", "sleep";
0186 pinctrl-0 = <&cpsw_default>;
0187 pinctrl-1 = <&cpsw_sleep>;
0188 status = "okay";
0189 };
0190
0191 &cpsw_port1 {
0192 phy-mode = "mii";
0193 phy-handle = <ðernetphy0>;
0194 ti,dual-emac-pvid = <1>;
0195 };
0196
0197 &cpsw_port2 {
0198 status = "disabled";
0199 };
0200
0201 &davinci_mdio_sw {
0202 pinctrl-names = "default", "sleep";
0203 pinctrl-0 = <&davinci_mdio_default>;
0204 pinctrl-1 = <&davinci_mdio_sleep>;
0205
0206 ethernetphy0: ethernet-phy@0 {
0207 reg = <0>;
0208 smsc,disable-energy-detect;
0209 };
0210 };
0211
0212 &mmc1 {
0213 pinctrl-names = "default";
0214 pinctrl-0 = <&mmc1_pins>;
0215 bus-width = <0x4>;
0216 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
0217 cd-inverted;
0218 max-frequency = <26000000>;
0219 vmmc-supply = <&vmmcsd_fixed>;
0220 status = "okay";
0221 };
0222
0223 &mmc2 {
0224 pinctrl-names = "default";
0225 pinctrl-0 = <&emmc_pins>;
0226 bus-width = <8>;
0227 max-frequency = <26000000>;
0228 sd-uhs-sdr25;
0229 vmmc-supply = <&vmmcsd_fixed>;
0230 status = "okay";
0231 };
0232
0233 &mmc3 {
0234 pinctrl-names = "default";
0235 pinctrl-0 = <&mmc3_pins>;
0236 bus-width = <4>;
0237 cap-power-off-card;
0238 max-frequency = <26000000>;
0239 sd-uhs-sdr25;
0240 vmmc-supply = <&vmmcsd_fixed>;
0241 status = "okay";
0242 };
0243
0244 &rtc {
0245 ti,no-init;
0246 };
0247
0248 &sham {
0249 status = "okay";
0250 };
0251
0252 &tps {
0253 compatible = "ti,tps65217";
0254 ti,pmic-shutdown-controller;
0255
0256 regulators {
0257 #address-cells = <1>;
0258 #size-cells = <0>;
0259
0260 dcdc1_reg: regulator@0 {
0261 reg = <0>;
0262 regulator-name = "vdds_dpr";
0263 regulator-compatible = "dcdc1";
0264 regulator-min-microvolt = <1300000>;
0265 regulator-max-microvolt = <1450000>;
0266 regulator-boot-on;
0267 regulator-always-on;
0268 };
0269
0270 dcdc2_reg: regulator@1 {
0271 reg = <1>;
0272 /*
0273 * VDD_MPU voltage limits 0.95V - 1.26V with
0274 * +/-4% tolerance
0275 */
0276 regulator-compatible = "dcdc2";
0277 regulator-name = "vdd_mpu";
0278 regulator-min-microvolt = <925000>;
0279 regulator-max-microvolt = <1375000>;
0280 regulator-boot-on;
0281 regulator-always-on;
0282 regulator-ramp-delay = <70000>;
0283 };
0284
0285 dcdc3_reg: regulator@2 {
0286 reg = <2>;
0287 /*
0288 * VDD_CORE voltage limits 0.95V - 1.1V with
0289 * +/-4% tolerance
0290 */
0291 regulator-name = "vdd_core";
0292 regulator-compatible = "dcdc3";
0293 regulator-min-microvolt = <925000>;
0294 regulator-max-microvolt = <1125000>;
0295 regulator-boot-on;
0296 regulator-always-on;
0297 };
0298
0299 ldo1_reg: regulator@3 {
0300 reg = <3>;
0301 regulator-name = "vio,vrtc,vdds";
0302 regulator-compatible = "ldo1";
0303 regulator-min-microvolt = <1000000>;
0304 regulator-max-microvolt = <1800000>;
0305 regulator-always-on;
0306 };
0307
0308 ldo2_reg: regulator@4 {
0309 reg = <4>;
0310 regulator-name = "vdd_3v3aux";
0311 regulator-compatible = "ldo2";
0312 regulator-min-microvolt = <900000>;
0313 regulator-max-microvolt = <3300000>;
0314 regulator-always-on;
0315 };
0316
0317 ldo3_reg: regulator@5 {
0318 reg = <5>;
0319 regulator-name = "vdd_1v8";
0320 regulator-compatible = "ldo3";
0321 regulator-min-microvolt = <900000>;
0322 regulator-max-microvolt = <1800000>;
0323 regulator-always-on;
0324 };
0325
0326 ldo4_reg: regulator@6 {
0327 reg = <6>;
0328 regulator-name = "vdd_3v3a";
0329 regulator-compatible = "ldo4";
0330 regulator-min-microvolt = <1800000>;
0331 regulator-max-microvolt = <3300000>;
0332 regulator-always-on;
0333 };
0334 };
0335 };
0336
0337 &uart0 {
0338 pinctrl-names = "default";
0339 pinctrl-0 = <&uart0_pins>;
0340 status = "okay";
0341 };
0342
0343 &uart1 {
0344 pinctrl-names = "default";
0345 pinctrl-0 = <&uart1_pins>;
0346 status = "okay";
0347 };
0348
0349 &uart2 {
0350 pinctrl-names = "default";
0351 pinctrl-0 = <&uart2_pins>;
0352 status = "okay";
0353 };
0354
0355 &uart4 {
0356 pinctrl-names = "default";
0357 pinctrl-0 = <&uart4_pins>;
0358 status = "okay";
0359 };
0360
0361 &usb1 {
0362 dr_mode = "host";
0363 };
0364
0365 &am33xx_pinmux {
0366 pinctrl-names = "default";
0367 pinctrl-0 = <&clkout2_pin>;
0368
0369 clkout2_pin: pinmux_clkout2_pin {
0370 pinctrl-single,pins = <
0371 /* xdma_event_intr1.clkout2 */
0372 AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_INPUT, MUX_MODE6)
0373 >;
0374 };
0375
0376 cpsw_default: cpsw_default {
0377 pinctrl-single,pins = <
0378 /* Slave 1 */
0379 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE0)
0380 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0381 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE0)
0382 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0383 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0384 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE0)
0385 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE0)
0386 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
0387 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0)
0388 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE0)
0389 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE0)
0390 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE0)
0391 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE0)
0392 >;
0393 };
0394
0395 cpsw_sleep: cpsw_sleep {
0396 pinctrl-single,pins = <
0397 /* Slave 1 reset value */
0398 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
0399 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
0400 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
0401 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
0402 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
0403 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
0404 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
0405 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
0406 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
0407 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
0408 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
0409 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
0410 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
0411 >;
0412 };
0413
0414 davinci_mdio_default: davinci_mdio_default {
0415 pinctrl-single,pins = <
0416 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
0417 AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
0418 >;
0419 };
0420
0421 davinci_mdio_sleep: davinci_mdio_sleep {
0422 pinctrl-single,pins = <
0423 /* MDIO reset value */
0424 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
0425 AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
0426 >;
0427 };
0428
0429 ehrpwm1_pins: pinmux_ehrpwm1 {
0430 pinctrl-single,pins = <
0431 AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT, MUX_MODE6) /* gpmc_a3.gpio1_19 */
0432 >;
0433 };
0434
0435 emmc_pins: pinmux_emmc_pins {
0436 pinctrl-single,pins = <
0437 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT, MUX_MODE2)
0438 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2)
0439 AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1)
0440 AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1)
0441 AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1)
0442 AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1)
0443 AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1)
0444 AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1)
0445 AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1)
0446 AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1)
0447 >;
0448 };
0449
0450 i2c0_pins: pinmux_i2c0_pins {
0451 pinctrl-single,pins = <
0452 AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT, MUX_MODE0)
0453 AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT, MUX_MODE0)
0454 >;
0455 };
0456
0457 mmc1_pins: pinmux_mmc1_pins {
0458 pinctrl-single,pins = <
0459 AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE5)
0460 >;
0461 };
0462
0463 mmc3_pins: pinmux_mmc3_pins {
0464 pinctrl-single,pins = <
0465 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT, MUX_MODE3)
0466 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT, MUX_MODE3)
0467 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT, MUX_MODE3)
0468 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT, MUX_MODE3)
0469 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT, MUX_MODE3)
0470 AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT, MUX_MODE3)
0471 >;
0472 };
0473
0474 uart0_pins: pinmux_uart0_pins {
0475 pinctrl-single,pins = <
0476 AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0)
0477 AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_OUTPUT, MUX_MODE0)
0478 AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLDOWN, MUX_MODE0)
0479 AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT, MUX_MODE0)
0480 >;
0481 };
0482
0483 uart1_pins: pinmux_uart1 {
0484 pinctrl-single,pins = <
0485 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0)
0486 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT, MUX_MODE0)
0487 AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0)
0488 AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT, MUX_MODE0)
0489 >;
0490 };
0491
0492 uart2_pins: pinmux_uart2_pins {
0493 pinctrl-single,pins = <
0494 AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE1)
0495 AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE1)
0496 >;
0497 };
0498
0499 uart4_pins: pinmux_uart4_pins {
0500 pinctrl-single,pins = <
0501 AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6)
0502 AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLUP, MUX_MODE6)
0503 >;
0504 };
0505
0506 user_leds_s0: user_leds_s0 {
0507 pinctrl-single,pins = <
0508 AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_OUTPUT, MUX_MODE7)
0509 AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_OUTPUT, MUX_MODE7)
0510 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE7)
0511 AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE7)
0512 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT, MUX_MODE7)
0513 AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_OUTPUT, MUX_MODE7)
0514 AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT, MUX_MODE7)
0515 AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
0516 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7)
0517 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7)
0518 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLUP, MUX_MODE7)
0519 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT, MUX_MODE7)
0520 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT, MUX_MODE7)
0521 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT, MUX_MODE7)
0522 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT, MUX_MODE7)
0523 AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_OUTPUT_PULLUP, MUX_MODE7)
0524 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_INPUT, MUX_MODE7)
0525 AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE7)
0526 AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_INPUT, MUX_MODE7)
0527 AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE7)
0528 AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE7)
0529 AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE7)
0530 AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE7)
0531 AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE7)
0532 AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE7)
0533 AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE7)
0534 AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE7)
0535 AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE7)
0536 AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE7)
0537 AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE7)
0538 AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE7)
0539 AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE7)
0540 AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE7)
0541 AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE7)
0542 AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE7)
0543 AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE7)
0544 AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE7)
0545 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE7)
0546 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE7)
0547 AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE7)
0548 AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE7)
0549 AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
0550 AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_OUTPUT, MUX_MODE7)
0551 AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_OUTPUT, MUX_MODE7)
0552 AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_OUTPUT_PULLUP, MUX_MODE7)
0553 AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
0554 AM33XX_PADCONF(AM335X_PIN_MCASP0_FSR, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
0555 AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR1, PIN_INPUT_PULLDOWN, MUX_MODE7)
0556 AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE7)
0557 >;
0558 };
0559 };
