0001 //SPDX-License-Identifier: GPL-2.0
0002 /* Copyright (C) 2018 Octavo Systems LLC - https://www.octavosystems.com/
0003 *
0004 * This program is free software; you can redistribute it and/or modify
0005 * it under the terms of the GNU General Public License version 2 as
0006 * published by the Free Software Foundation.
0007 */
0008
0009 /dts-v1/;
0010
0011 #include "am33xx.dtsi"
0012 #include "am335x-osd335x-common.dtsi"
0013 #include <dt-bindings/interrupt-controller/irq.h>
0014
0015 #include <dt-bindings/display/tda998x.h>
0016
0017 / {
0018 model = "Octavo Systems OSD3358-SM-RED";
0019 compatible = "oct,osd3358-sm-refdesign", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
0020 };
0021
0022 &ldo3_reg {
0023 regulator-min-microvolt = <1800000>;
0024 regulator-max-microvolt = <1800000>;
0025 regulator-always-on;
0026 };
0027
0028 &mmc2 {
0029 vmmc-supply = <&vmmcsd_fixed>;
0030 pinctrl-names = "default";
0031 pinctrl-0 = <&emmc_pins>;
0032 bus-width = <8>;
0033 status = "okay";
0034 };
0035
0036 &lcdc {
0037 status = "okay";
0038
0039 /* If you want to get 24 bit RGB and 16 BGR mode instead of
0040 * current 16 bit RGB and 24 BGR modes, set the propety
0041 * below to "crossed" and uncomment the video-ports -property
0042 * in tda19988 node.
0043 * AM335x errata for wiring:
0044 * https://www.ti.com/lit/er/sprz360i/sprz360i.pdf
0045 */
0046
0047 blue-and-red-wiring = "straight";
0048
0049 port {
0050 lcdc_0: endpoint {
0051 remote-endpoint = <&hdmi_0>;
0052 };
0053 };
0054 };
0055
0056 &i2c0 {
0057 tda19988: hdmi-encoder@70 {
0058 compatible = "nxp,tda998x";
0059 reg = <0x70>;
0060
0061 pinctrl-names = "default", "off";
0062 pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
0063 pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
0064
0065 /* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
0066 /* video-ports = <0x234501>; */
0067
0068 #sound-dai-cells = <0>;
0069 audio-ports = < TDA998x_I2S 0x03>;
0070
0071 port {
0072 hdmi_0: endpoint {
0073 remote-endpoint = <&lcdc_0>;
0074 };
0075 };
0076 };
0077
0078 mpu9250: imu@68 {
0079 compatible = "invensense,mpu6050";
0080 reg = <0x68>;
0081 interrupt-parent = <&gpio3>;
0082 interrupts = <21 IRQ_TYPE_EDGE_RISING>;
0083 i2c-gate {
0084 #address-cells = <1>;
0085 #size-cells = <0>;
0086 ax8975@c {
0087 compatible = "asahi-kasei,ak8975";
0088 reg = <0x0c>;
0089 };
0090 };
0091 /*invensense,int_config = <0x10>;
0092 invensense,level_shifter = <0>;
0093 invensense,orientation = [01 00 00 00 01 00 00 00 01];
0094 invensense,sec_slave_type = <0>;
0095 invensense,key = [4e cc 7e eb f6 1e 35 22 00 34 0d 65 32 e9 94 89];*/
0096 };
0097
0098 bmp280: pressure@76 {
0099 compatible = "bosch,bmp280";
0100 reg = <0x76>;
0101 };
0102 };
0103
0104 &mcasp0 {
0105 #sound-dai-cells = <0>;
0106 pinctrl-names = "default";
0107 pinctrl-0 = <&mcasp0_pins>;
0108 status = "okay";
0109 op-mode = <0>; /* MCASP_IIS_MODE */
0110 tdm-slots = <2>;
0111 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
0112 0 0 1 0
0113 >;
0114 tx-num-evt = <32>;
0115 rx-num-evt = <32>;
0116 };
0117
0118 / {
0119 clk_mcasp0_fixed: clk-mcasp0-fixed {
0120 #clock-cells = <0>;
0121 compatible = "fixed-clock";
0122 clock-frequency = <24576000>;
0123 };
0124
0125 clk_mcasp0: clk-mcasp0 {
0126 #clock-cells = <0>;
0127 compatible = "gpio-gate-clock";
0128 clocks = <&clk_mcasp0_fixed>;
0129 enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */
0130 };
0131
0132 sound {
0133 compatible = "simple-audio-card";
0134 simple-audio-card,name = "TI BeagleBone Black";
0135 simple-audio-card,format = "i2s";
0136 simple-audio-card,bitclock-master = <&dailink0_master>;
0137 simple-audio-card,frame-master = <&dailink0_master>;
0138
0139 dailink0_master: simple-audio-card,cpu {
0140 sound-dai = <&mcasp0>;
0141 clocks = <&clk_mcasp0>;
0142 };
0143
0144 simple-audio-card,codec {
0145 sound-dai = <&tda19988>;
0146 };
0147 };
0148
0149 chosen {
0150 stdout-path = &uart0;
0151 };
0152
0153 leds {
0154 pinctrl-names = "default";
0155 pinctrl-0 = <&user_leds_s0>;
0156
0157 compatible = "gpio-leds";
0158
0159 led2 {
0160 label = "beaglebone:green:usr0";
0161 gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
0162 linux,default-trigger = "heartbeat";
0163 default-state = "off";
0164 };
0165
0166 led3 {
0167 label = "beaglebone:green:usr1";
0168 gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
0169 linux,default-trigger = "mmc0";
0170 default-state = "off";
0171 };
0172
0173 led4 {
0174 label = "beaglebone:green:usr2";
0175 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
0176 linux,default-trigger = "cpu0";
0177 default-state = "off";
0178 };
0179
0180 led5 {
0181 label = "beaglebone:green:usr3";
0182 gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
0183 linux,default-trigger = "mmc1";
0184 default-state = "off";
0185 };
0186 };
0187
0188 vmmcsd_fixed: fixedregulator0 {
0189 compatible = "regulator-fixed";
0190 regulator-name = "vmmcsd_fixed";
0191 regulator-min-microvolt = <3300000>;
0192 regulator-max-microvolt = <3300000>;
0193 };
0194 };
0195
0196 &am33xx_pinmux {
0197 pinctrl-names = "default";
0198 pinctrl-0 = <&clkout2_pin>;
0199
0200 nxp_hdmi_bonelt_pins: nxp-hdmi-bonelt-pins {
0201 pinctrl-single,pins = <
0202 AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
0203 AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
0204 AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
0205 AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
0206 AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
0207 AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
0208 AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
0209 AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
0210 AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
0211 AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
0212 AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
0213 AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
0214 AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
0215 AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
0216 AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
0217 AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
0218 AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
0219 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0220 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0221 AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0222 AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0223 >;
0224 };
0225
0226 nxp_hdmi_bonelt_off_pins: nxp-hdmi-bonelt-off-pins {
0227 pinctrl-single,pins = <
0228 AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
0229 >;
0230 };
0231
0232 mcasp0_pins: mcasp0-pins {
0233 pinctrl-single,pins = <
0234 AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE0)
0235 AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/
0236 AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLUP, MUX_MODE0)
0237 AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0238 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.GPIO1_27 */
0239 >;
0240 };
0241
0242 flash_enable: flash-enable {
0243 pinctrl-single,pins = <
0244 AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* rmii1_ref_clk.gpio0_29 */
0245 >;
0246 };
0247
0248 imu_interrupt: imu-interrupt {
0249 pinctrl-single,pins = <
0250 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mii1_rx_er.gpio3_2 */
0251 >;
0252 };
0253
0254 ethernet_interrupt: ethernet-interrupt{
0255 pinctrl-single,pins = <
0256 AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mii1_col.gpio3_0 */
0257 >;
0258 };
0259
0260 user_leds_s0: user-leds-s0 {
0261 pinctrl-single,pins = <
0262 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 */
0263 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a6.gpio1_22 */
0264 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a7.gpio1_23 */
0265 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a8.gpio1_24 */
0266 >;
0267 };
0268
0269 i2c2_pins: pinmux-i2c2-pins {
0270 pinctrl-single,pins = <
0271 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_ctsn.i2c2_sda */
0272 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_rtsn.i2c2_scl */
0273 >;
0274 };
0275
0276 uart0_pins: pinmux-uart0-pins {
0277 pinctrl-single,pins = <
0278 AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
0279 AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
0280 >;
0281 };
0282
0283 clkout2_pin: pinmux-clkout2-pin {
0284 pinctrl-single,pins = <
0285 AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* xdma_event_intr1.clkout2 */
0286 >;
0287 };
0288
0289 cpsw_default: cpsw-default {
0290 pinctrl-single,pins = <
0291 /* Slave 1 */
0292 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl */
0293 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
0294 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
0295 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
0296 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
0297 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
0298 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
0299 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2)
0300 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2)
0301 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2)
0302 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2)
0303 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2)
0304 >;
0305 };
0306
0307 cpsw_sleep: cpsw-sleep {
0308 pinctrl-single,pins = <
0309 /* Slave 1 reset value */
0310 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
0311 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
0312 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
0313 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
0314 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
0315 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
0316 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
0317 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
0318 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
0319 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
0320 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
0321 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
0322 >;
0323 };
0324
0325 davinci_mdio_default: davinci-mdio-default {
0326 pinctrl-single,pins = <
0327 /* MDIO */
0328 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
0329 AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
0330 >;
0331 };
0332
0333 davinci_mdio_sleep: davinci-mdio-sleep {
0334 pinctrl-single,pins = <
0335 /* MDIO reset value */
0336 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
0337 AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
0338 >;
0339 };
0340
0341 mmc1_pins: pinmux-mmc1-pins {
0342 pinctrl-single,pins = <
0343 AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* (C15) spi0_cs1.gpio0[6] */
0344 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
0345 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
0346 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
0347 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
0348 AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
0349 AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
0350 >;
0351 };
0352
0353 emmc_pins: pinmux-emmc-pins {
0354 pinctrl-single,pins = <
0355 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */
0356 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
0357 AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
0358 AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
0359 AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
0360 AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
0361 AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
0362 AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
0363 AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
0364 AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
0365 >;
0366 };
0367 };
0368
0369
0370 &uart0 {
0371 pinctrl-names = "default";
0372 pinctrl-0 = <&uart0_pins>;
0373
0374 status = "okay";
0375 };
0376
0377 &usb0 {
0378 dr_mode = "peripheral";
0379 interrupts-extended = <&intc 18 &tps 0>;
0380 interrupt-names = "mc", "vbus";
0381 };
0382
0383 &usb1 {
0384 dr_mode = "host";
0385 };
0386
0387 &i2c2 {
0388 pinctrl-names = "default";
0389 pinctrl-0 = <&i2c2_pins>;
0390 status = "okay";
0391 clock-frequency = <100000>;
0392 };
0393
0394 &cpsw_port1 {
0395 phy-handle = <ðphy0>;
0396 phy-mode = "rgmii-txid";
0397 ti,dual-emac-pvid = <1>;
0398 };
0399
0400 &cpsw_port2 {
0401 status = "disabled";
0402 };
0403
0404 &mac_sw {
0405 pinctrl-names = "default", "sleep";
0406 pinctrl-0 = <&cpsw_default>;
0407 pinctrl-1 = <&cpsw_sleep>;
0408 status = "okay";
0409 };
0410
0411 &davinci_mdio_sw {
0412 pinctrl-names = "default", "sleep";
0413 pinctrl-0 = <&davinci_mdio_default>;
0414 pinctrl-1 = <&davinci_mdio_sleep>;
0415
0416 ethphy0: ethernet-phy@4 {
0417 reg = <4>;
0418 };
0419 };
0420
0421 &mmc1 {
0422 status = "okay";
0423 vmmc-supply = <&vmmcsd_fixed>;
0424 bus-width = <0x4>;
0425 pinctrl-names = "default";
0426 pinctrl-0 = <&mmc1_pins>;
0427 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
0428 };
0429
0430 &rtc {
0431 system-power-controller;
0432 clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
0433 clock-names = "ext-clk", "int-clk";
0434 };
