0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Copyright (C) 2016 Synopsys, Inc. (www.synopsys.com)
0004 */
0005
0006 / {
0007 compatible = "snps,arc";
0008 #address-cells = <1>;
0009 #size-cells = <1>;
0010 chosen { };
0011 aliases { };
0012
0013 cpus {
0014 #address-cells = <1>;
0015 #size-cells = <0>;
0016
0017 cpu@0 {
0018 device_type = "cpu";
0019 compatible = "snps,archs38";
0020 reg = <0>;
0021 clocks = <&core_clk>;
0022 };
0023 cpu@1 {
0024 device_type = "cpu";
0025 compatible = "snps,archs38";
0026 reg = <1>;
0027 clocks = <&core_clk>;
0028 };
0029 cpu@2 {
0030 device_type = "cpu";
0031 compatible = "snps,archs38";
0032 reg = <2>;
0033 clocks = <&core_clk>;
0034 };
0035 cpu@3 {
0036 device_type = "cpu";
0037 compatible = "snps,archs38";
0038 reg = <3>;
0039 clocks = <&core_clk>;
0040 };
0041 };
0042
0043 /* TIMER0 with interrupt for clockevent */
0044 timer0 {
0045 compatible = "snps,arc-timer";
0046 interrupts = <16>;
0047 interrupt-parent = <&core_intc>;
0048 clocks = <&core_clk>;
0049 };
0050
0051 /* 64-bit Global Free Running Counter */
0052 gfrc {
0053 compatible = "snps,archs-timer-gfrc";
0054 clocks = <&core_clk>;
0055 };
0056
0057 memory {
0058 device_type = "memory";
0059 reg = <0x80000000 0x10000000>; /* 256M */
0060 };
0061 };
