0001 /*
0002 * Copyright 2017, Matt Brown, IBM Corp.
0003 *
0004 * This program is free software; you can redistribute it and/or
0005 * modify it under the terms of the GNU General Public License
0006 * as published by the Free Software Foundation; either version
0007 * 2 of the License, or (at your option) any later version.
0008 *
0009 * vpermxor$#.c
0010 *
0011 * Based on H. Peter Anvin's paper - The mathematics of RAID-6
0012 *
0013 * $#-way unrolled portable integer math RAID-6 instruction set
0014 * This file is postprocessed using unroll.awk
0015 *
0016 * vpermxor$#.c makes use of the vpermxor instruction to optimise the RAID6 Q
0017 * syndrome calculations.
0018 * This can be run on systems which have both Altivec and vpermxor instruction.
0019 *
0020 * This instruction was introduced in POWER8 - ISA v2.07.
0021 */
0022
0023 #include <linux/raid/pq.h>
0024 #ifdef CONFIG_ALTIVEC
0025
0026 #include <altivec.h>
0027 #include <asm/ppc-opcode.h>
0028 #ifdef __KERNEL__
0029 #include <asm/cputable.h>
0030 #include <asm/switch_to.h>
0031 #endif
0032
0033 typedef vector unsigned char unative_t;
0034 #define NSIZE sizeof(unative_t)
0035
0036 static const vector unsigned char gf_low = {0x1e, 0x1c, 0x1a, 0x18, 0x16, 0x14,
0037 0x12, 0x10, 0x0e, 0x0c, 0x0a, 0x08,
0038 0x06, 0x04, 0x02,0x00};
0039 static const vector unsigned char gf_high = {0xfd, 0xdd, 0xbd, 0x9d, 0x7d, 0x5d,
0040 0x3d, 0x1d, 0xe0, 0xc0, 0xa0, 0x80,
0041 0x60, 0x40, 0x20, 0x00};
0042
0043 static void noinline raid6_vpermxor$#_gen_syndrome_real(int disks, size_t bytes,
0044 void **ptrs)
0045 {
0046 u8 **dptr = (u8 **)ptrs;
0047 u8 *p, *q;
0048 int d, z, z0;
0049 unative_t wp$$, wq$$, wd$$;
0050
0051 z0 = disks - 3; /* Highest data disk */
0052 p = dptr[z0+1]; /* XOR parity */
0053 q = dptr[z0+2]; /* RS syndrome */
0054
0055 for (d = 0; d < bytes; d += NSIZE*$#) {
0056 wp$$ = wq$$ = *(unative_t *)&dptr[z0][d+$$*NSIZE];
0057
0058 for (z = z0-1; z>=0; z--) {
0059 wd$$ = *(unative_t *)&dptr[z][d+$$*NSIZE];
0060 /* P syndrome */
0061 wp$$ = vec_xor(wp$$, wd$$);
0062
0063 /* Q syndrome */
0064 asm(VPERMXOR(%0,%1,%2,%3):"=v"(wq$$):"v"(gf_high), "v"(gf_low), "v"(wq$$));
0065 wq$$ = vec_xor(wq$$, wd$$);
0066 }
0067 *(unative_t *)&p[d+NSIZE*$$] = wp$$;
0068 *(unative_t *)&q[d+NSIZE*$$] = wq$$;
0069 }
0070 }
0071
0072 static void raid6_vpermxor$#_gen_syndrome(int disks, size_t bytes, void **ptrs)
0073 {
0074 preempt_disable();
0075 enable_kernel_altivec();
0076
0077 raid6_vpermxor$#_gen_syndrome_real(disks, bytes, ptrs);
0078
0079 disable_kernel_altivec();
0080 preempt_enable();
0081 }
0082
0083 int raid6_have_altivec_vpermxor(void);
0084 #if $# == 1
0085 int raid6_have_altivec_vpermxor(void)
0086 {
0087 /* Check if arch has both altivec and the vpermxor instructions */
0088 # ifdef __KERNEL__
0089 return (cpu_has_feature(CPU_FTR_ALTIVEC_COMP) &&
0090 cpu_has_feature(CPU_FTR_ARCH_207S));
0091 # else
0092 return 1;
0093 #endif
0094
0095 }
0096 #endif
0097
0098 const struct raid6_calls raid6_vpermxor$# = {
0099 raid6_vpermxor$#_gen_syndrome,
0100 NULL,
0101 raid6_have_altivec_vpermxor,
0102 "vpermxor$#",
0103 0
0104 };
0105 #endif
