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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Implement the default iomap interfaces
0004  *
0005  * (C) Copyright 2004 Linus Torvalds
0006  */
0007 #include <linux/pci.h>
0008 #include <linux/io.h>
0009 
0010 #include <linux/export.h>
0011 
0012 #ifdef CONFIG_PCI
0013 /**
0014  * pci_iomap_range - create a virtual mapping cookie for a PCI BAR
0015  * @dev: PCI device that owns the BAR
0016  * @bar: BAR number
0017  * @offset: map memory at the given offset in BAR
0018  * @maxlen: max length of the memory to map
0019  *
0020  * Using this function you will get a __iomem address to your device BAR.
0021  * You can access it using ioread*() and iowrite*(). These functions hide
0022  * the details if this is a MMIO or PIO address space and will just do what
0023  * you expect from them in the correct way.
0024  *
0025  * @maxlen specifies the maximum length to map. If you want to get access to
0026  * the complete BAR from offset to the end, pass %0 here.
0027  * */
0028 void __iomem *pci_iomap_range(struct pci_dev *dev,
0029                   int bar,
0030                   unsigned long offset,
0031                   unsigned long maxlen)
0032 {
0033     resource_size_t start = pci_resource_start(dev, bar);
0034     resource_size_t len = pci_resource_len(dev, bar);
0035     unsigned long flags = pci_resource_flags(dev, bar);
0036 
0037     if (len <= offset || !start)
0038         return NULL;
0039     len -= offset;
0040     start += offset;
0041     if (maxlen && len > maxlen)
0042         len = maxlen;
0043     if (flags & IORESOURCE_IO)
0044         return __pci_ioport_map(dev, start, len);
0045     if (flags & IORESOURCE_MEM)
0046         return ioremap(start, len);
0047     /* What? */
0048     return NULL;
0049 }
0050 EXPORT_SYMBOL(pci_iomap_range);
0051 
0052 /**
0053  * pci_iomap_wc_range - create a virtual WC mapping cookie for a PCI BAR
0054  * @dev: PCI device that owns the BAR
0055  * @bar: BAR number
0056  * @offset: map memory at the given offset in BAR
0057  * @maxlen: max length of the memory to map
0058  *
0059  * Using this function you will get a __iomem address to your device BAR.
0060  * You can access it using ioread*() and iowrite*(). These functions hide
0061  * the details if this is a MMIO or PIO address space and will just do what
0062  * you expect from them in the correct way. When possible write combining
0063  * is used.
0064  *
0065  * @maxlen specifies the maximum length to map. If you want to get access to
0066  * the complete BAR from offset to the end, pass %0 here.
0067  * */
0068 void __iomem *pci_iomap_wc_range(struct pci_dev *dev,
0069                  int bar,
0070                  unsigned long offset,
0071                  unsigned long maxlen)
0072 {
0073     resource_size_t start = pci_resource_start(dev, bar);
0074     resource_size_t len = pci_resource_len(dev, bar);
0075     unsigned long flags = pci_resource_flags(dev, bar);
0076 
0077 
0078     if (flags & IORESOURCE_IO)
0079         return NULL;
0080 
0081     if (len <= offset || !start)
0082         return NULL;
0083 
0084     len -= offset;
0085     start += offset;
0086     if (maxlen && len > maxlen)
0087         len = maxlen;
0088 
0089     if (flags & IORESOURCE_MEM)
0090         return ioremap_wc(start, len);
0091 
0092     /* What? */
0093     return NULL;
0094 }
0095 EXPORT_SYMBOL_GPL(pci_iomap_wc_range);
0096 
0097 /**
0098  * pci_iomap - create a virtual mapping cookie for a PCI BAR
0099  * @dev: PCI device that owns the BAR
0100  * @bar: BAR number
0101  * @maxlen: length of the memory to map
0102  *
0103  * Using this function you will get a __iomem address to your device BAR.
0104  * You can access it using ioread*() and iowrite*(). These functions hide
0105  * the details if this is a MMIO or PIO address space and will just do what
0106  * you expect from them in the correct way.
0107  *
0108  * @maxlen specifies the maximum length to map. If you want to get access to
0109  * the complete BAR without checking for its length first, pass %0 here.
0110  * */
0111 void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
0112 {
0113     return pci_iomap_range(dev, bar, 0, maxlen);
0114 }
0115 EXPORT_SYMBOL(pci_iomap);
0116 
0117 /**
0118  * pci_iomap_wc - create a virtual WC mapping cookie for a PCI BAR
0119  * @dev: PCI device that owns the BAR
0120  * @bar: BAR number
0121  * @maxlen: length of the memory to map
0122  *
0123  * Using this function you will get a __iomem address to your device BAR.
0124  * You can access it using ioread*() and iowrite*(). These functions hide
0125  * the details if this is a MMIO or PIO address space and will just do what
0126  * you expect from them in the correct way. When possible write combining
0127  * is used.
0128  *
0129  * @maxlen specifies the maximum length to map. If you want to get access to
0130  * the complete BAR without checking for its length first, pass %0 here.
0131  * */
0132 void __iomem *pci_iomap_wc(struct pci_dev *dev, int bar, unsigned long maxlen)
0133 {
0134     return pci_iomap_wc_range(dev, bar, 0, maxlen);
0135 }
0136 EXPORT_SYMBOL_GPL(pci_iomap_wc);
0137 
0138 /*
0139  * pci_iounmap() somewhat illogically comes from lib/iomap.c for the
0140  * CONFIG_GENERIC_IOMAP case, because that's the code that knows about
0141  * the different IOMAP ranges.
0142  *
0143  * But if the architecture does not use the generic iomap code, and if
0144  * it has _not_ defined it's own private pci_iounmap function, we define
0145  * it here.
0146  *
0147  * NOTE! This default implementation assumes that if the architecture
0148  * support ioport mapping (HAS_IOPORT_MAP), the ioport mapping will
0149  * be fixed to the range [ PCI_IOBASE, PCI_IOBASE+IO_SPACE_LIMIT [,
0150  * and does not need unmapping with 'ioport_unmap()'.
0151  *
0152  * If you have different rules for your architecture, you need to
0153  * implement your own pci_iounmap() that knows the rules for where
0154  * and how IO vs MEM get mapped.
0155  *
0156  * This code is odd, and the ARCH_HAS/ARCH_WANTS #define logic comes
0157  * from legacy <asm-generic/io.h> header file behavior. In particular,
0158  * it would seem to make sense to do the iounmap(p) for the non-IO-space
0159  * case here regardless, but that's not what the old header file code
0160  * did. Probably incorrectly, but this is meant to be bug-for-bug
0161  * compatible.
0162  */
0163 #if defined(ARCH_WANTS_GENERIC_PCI_IOUNMAP)
0164 
0165 void pci_iounmap(struct pci_dev *dev, void __iomem *p)
0166 {
0167 #ifdef ARCH_HAS_GENERIC_IOPORT_MAP
0168     uintptr_t start = (uintptr_t) PCI_IOBASE;
0169     uintptr_t addr = (uintptr_t) p;
0170 
0171     if (addr >= start && addr < start + IO_SPACE_LIMIT)
0172         return;
0173     iounmap(p);
0174 #endif
0175 }
0176 EXPORT_SYMBOL(pci_iounmap);
0177 
0178 #endif /* ARCH_WANTS_GENERIC_PCI_IOUNMAP */
0179 
0180 #endif /* CONFIG_PCI */