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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Implement the default iomap interfaces
0004  *
0005  * (C) Copyright 2004 Linus Torvalds
0006  */
0007 #include <linux/pci.h>
0008 #include <linux/io.h>
0009 
0010 #include <linux/export.h>
0011 
0012 /*
0013  * Read/write from/to an (offsettable) iomem cookie. It might be a PIO
0014  * access or a MMIO access, these functions don't care. The info is
0015  * encoded in the hardware mapping set up by the mapping functions
0016  * (or the cookie itself, depending on implementation and hw).
0017  *
0018  * The generic routines don't assume any hardware mappings, and just
0019  * encode the PIO/MMIO as part of the cookie. They coldly assume that
0020  * the MMIO IO mappings are not in the low address range.
0021  *
0022  * Architectures for which this is not true can't use this generic
0023  * implementation and should do their own copy.
0024  */
0025 
0026 #ifndef HAVE_ARCH_PIO_SIZE
0027 /*
0028  * We encode the physical PIO addresses (0-0xffff) into the
0029  * pointer by offsetting them with a constant (0x10000) and
0030  * assuming that all the low addresses are always PIO. That means
0031  * we can do some sanity checks on the low bits, and don't
0032  * need to just take things for granted.
0033  */
0034 #define PIO_OFFSET  0x10000UL
0035 #define PIO_MASK    0x0ffffUL
0036 #define PIO_RESERVED    0x40000UL
0037 #endif
0038 
0039 static void bad_io_access(unsigned long port, const char *access)
0040 {
0041     static int count = 10;
0042     if (count) {
0043         count--;
0044         WARN(1, KERN_ERR "Bad IO access at port %#lx (%s)\n", port, access);
0045     }
0046 }
0047 
0048 /*
0049  * Ugly macros are a way of life.
0050  */
0051 #define IO_COND(addr, is_pio, is_mmio) do {         \
0052     unsigned long port = (unsigned long __force)addr;   \
0053     if (port >= PIO_RESERVED) {             \
0054         is_mmio;                    \
0055     } else if (port > PIO_OFFSET) {             \
0056         port &= PIO_MASK;               \
0057         is_pio;                     \
0058     } else                          \
0059         bad_io_access(port, #is_pio );          \
0060 } while (0)
0061 
0062 #ifndef pio_read16be
0063 #define pio_read16be(port) swab16(inw(port))
0064 #define pio_read32be(port) swab32(inl(port))
0065 #endif
0066 
0067 #ifndef mmio_read16be
0068 #define mmio_read16be(addr) swab16(readw(addr))
0069 #define mmio_read32be(addr) swab32(readl(addr))
0070 #define mmio_read64be(addr) swab64(readq(addr))
0071 #endif
0072 
0073 unsigned int ioread8(const void __iomem *addr)
0074 {
0075     IO_COND(addr, return inb(port), return readb(addr));
0076     return 0xff;
0077 }
0078 unsigned int ioread16(const void __iomem *addr)
0079 {
0080     IO_COND(addr, return inw(port), return readw(addr));
0081     return 0xffff;
0082 }
0083 unsigned int ioread16be(const void __iomem *addr)
0084 {
0085     IO_COND(addr, return pio_read16be(port), return mmio_read16be(addr));
0086     return 0xffff;
0087 }
0088 unsigned int ioread32(const void __iomem *addr)
0089 {
0090     IO_COND(addr, return inl(port), return readl(addr));
0091     return 0xffffffff;
0092 }
0093 unsigned int ioread32be(const void __iomem *addr)
0094 {
0095     IO_COND(addr, return pio_read32be(port), return mmio_read32be(addr));
0096     return 0xffffffff;
0097 }
0098 EXPORT_SYMBOL(ioread8);
0099 EXPORT_SYMBOL(ioread16);
0100 EXPORT_SYMBOL(ioread16be);
0101 EXPORT_SYMBOL(ioread32);
0102 EXPORT_SYMBOL(ioread32be);
0103 
0104 #ifdef readq
0105 static u64 pio_read64_lo_hi(unsigned long port)
0106 {
0107     u64 lo, hi;
0108 
0109     lo = inl(port);
0110     hi = inl(port + sizeof(u32));
0111 
0112     return lo | (hi << 32);
0113 }
0114 
0115 static u64 pio_read64_hi_lo(unsigned long port)
0116 {
0117     u64 lo, hi;
0118 
0119     hi = inl(port + sizeof(u32));
0120     lo = inl(port);
0121 
0122     return lo | (hi << 32);
0123 }
0124 
0125 static u64 pio_read64be_lo_hi(unsigned long port)
0126 {
0127     u64 lo, hi;
0128 
0129     lo = pio_read32be(port + sizeof(u32));
0130     hi = pio_read32be(port);
0131 
0132     return lo | (hi << 32);
0133 }
0134 
0135 static u64 pio_read64be_hi_lo(unsigned long port)
0136 {
0137     u64 lo, hi;
0138 
0139     hi = pio_read32be(port);
0140     lo = pio_read32be(port + sizeof(u32));
0141 
0142     return lo | (hi << 32);
0143 }
0144 
0145 u64 ioread64_lo_hi(const void __iomem *addr)
0146 {
0147     IO_COND(addr, return pio_read64_lo_hi(port), return readq(addr));
0148     return 0xffffffffffffffffULL;
0149 }
0150 
0151 u64 ioread64_hi_lo(const void __iomem *addr)
0152 {
0153     IO_COND(addr, return pio_read64_hi_lo(port), return readq(addr));
0154     return 0xffffffffffffffffULL;
0155 }
0156 
0157 u64 ioread64be_lo_hi(const void __iomem *addr)
0158 {
0159     IO_COND(addr, return pio_read64be_lo_hi(port),
0160         return mmio_read64be(addr));
0161     return 0xffffffffffffffffULL;
0162 }
0163 
0164 u64 ioread64be_hi_lo(const void __iomem *addr)
0165 {
0166     IO_COND(addr, return pio_read64be_hi_lo(port),
0167         return mmio_read64be(addr));
0168     return 0xffffffffffffffffULL;
0169 }
0170 
0171 EXPORT_SYMBOL(ioread64_lo_hi);
0172 EXPORT_SYMBOL(ioread64_hi_lo);
0173 EXPORT_SYMBOL(ioread64be_lo_hi);
0174 EXPORT_SYMBOL(ioread64be_hi_lo);
0175 
0176 #endif /* readq */
0177 
0178 #ifndef pio_write16be
0179 #define pio_write16be(val,port) outw(swab16(val),port)
0180 #define pio_write32be(val,port) outl(swab32(val),port)
0181 #endif
0182 
0183 #ifndef mmio_write16be
0184 #define mmio_write16be(val,port) writew(swab16(val),port)
0185 #define mmio_write32be(val,port) writel(swab32(val),port)
0186 #define mmio_write64be(val,port) writeq(swab64(val),port)
0187 #endif
0188 
0189 void iowrite8(u8 val, void __iomem *addr)
0190 {
0191     IO_COND(addr, outb(val,port), writeb(val, addr));
0192 }
0193 void iowrite16(u16 val, void __iomem *addr)
0194 {
0195     IO_COND(addr, outw(val,port), writew(val, addr));
0196 }
0197 void iowrite16be(u16 val, void __iomem *addr)
0198 {
0199     IO_COND(addr, pio_write16be(val,port), mmio_write16be(val, addr));
0200 }
0201 void iowrite32(u32 val, void __iomem *addr)
0202 {
0203     IO_COND(addr, outl(val,port), writel(val, addr));
0204 }
0205 void iowrite32be(u32 val, void __iomem *addr)
0206 {
0207     IO_COND(addr, pio_write32be(val,port), mmio_write32be(val, addr));
0208 }
0209 EXPORT_SYMBOL(iowrite8);
0210 EXPORT_SYMBOL(iowrite16);
0211 EXPORT_SYMBOL(iowrite16be);
0212 EXPORT_SYMBOL(iowrite32);
0213 EXPORT_SYMBOL(iowrite32be);
0214 
0215 #ifdef writeq
0216 static void pio_write64_lo_hi(u64 val, unsigned long port)
0217 {
0218     outl(val, port);
0219     outl(val >> 32, port + sizeof(u32));
0220 }
0221 
0222 static void pio_write64_hi_lo(u64 val, unsigned long port)
0223 {
0224     outl(val >> 32, port + sizeof(u32));
0225     outl(val, port);
0226 }
0227 
0228 static void pio_write64be_lo_hi(u64 val, unsigned long port)
0229 {
0230     pio_write32be(val, port + sizeof(u32));
0231     pio_write32be(val >> 32, port);
0232 }
0233 
0234 static void pio_write64be_hi_lo(u64 val, unsigned long port)
0235 {
0236     pio_write32be(val >> 32, port);
0237     pio_write32be(val, port + sizeof(u32));
0238 }
0239 
0240 void iowrite64_lo_hi(u64 val, void __iomem *addr)
0241 {
0242     IO_COND(addr, pio_write64_lo_hi(val, port),
0243         writeq(val, addr));
0244 }
0245 
0246 void iowrite64_hi_lo(u64 val, void __iomem *addr)
0247 {
0248     IO_COND(addr, pio_write64_hi_lo(val, port),
0249         writeq(val, addr));
0250 }
0251 
0252 void iowrite64be_lo_hi(u64 val, void __iomem *addr)
0253 {
0254     IO_COND(addr, pio_write64be_lo_hi(val, port),
0255         mmio_write64be(val, addr));
0256 }
0257 
0258 void iowrite64be_hi_lo(u64 val, void __iomem *addr)
0259 {
0260     IO_COND(addr, pio_write64be_hi_lo(val, port),
0261         mmio_write64be(val, addr));
0262 }
0263 
0264 EXPORT_SYMBOL(iowrite64_lo_hi);
0265 EXPORT_SYMBOL(iowrite64_hi_lo);
0266 EXPORT_SYMBOL(iowrite64be_lo_hi);
0267 EXPORT_SYMBOL(iowrite64be_hi_lo);
0268 
0269 #endif /* readq */
0270 
0271 /*
0272  * These are the "repeat MMIO read/write" functions.
0273  * Note the "__raw" accesses, since we don't want to
0274  * convert to CPU byte order. We write in "IO byte
0275  * order" (we also don't have IO barriers).
0276  */
0277 #ifndef mmio_insb
0278 static inline void mmio_insb(const void __iomem *addr, u8 *dst, int count)
0279 {
0280     while (--count >= 0) {
0281         u8 data = __raw_readb(addr);
0282         *dst = data;
0283         dst++;
0284     }
0285 }
0286 static inline void mmio_insw(const void __iomem *addr, u16 *dst, int count)
0287 {
0288     while (--count >= 0) {
0289         u16 data = __raw_readw(addr);
0290         *dst = data;
0291         dst++;
0292     }
0293 }
0294 static inline void mmio_insl(const void __iomem *addr, u32 *dst, int count)
0295 {
0296     while (--count >= 0) {
0297         u32 data = __raw_readl(addr);
0298         *dst = data;
0299         dst++;
0300     }
0301 }
0302 #endif
0303 
0304 #ifndef mmio_outsb
0305 static inline void mmio_outsb(void __iomem *addr, const u8 *src, int count)
0306 {
0307     while (--count >= 0) {
0308         __raw_writeb(*src, addr);
0309         src++;
0310     }
0311 }
0312 static inline void mmio_outsw(void __iomem *addr, const u16 *src, int count)
0313 {
0314     while (--count >= 0) {
0315         __raw_writew(*src, addr);
0316         src++;
0317     }
0318 }
0319 static inline void mmio_outsl(void __iomem *addr, const u32 *src, int count)
0320 {
0321     while (--count >= 0) {
0322         __raw_writel(*src, addr);
0323         src++;
0324     }
0325 }
0326 #endif
0327 
0328 void ioread8_rep(const void __iomem *addr, void *dst, unsigned long count)
0329 {
0330     IO_COND(addr, insb(port,dst,count), mmio_insb(addr, dst, count));
0331 }
0332 void ioread16_rep(const void __iomem *addr, void *dst, unsigned long count)
0333 {
0334     IO_COND(addr, insw(port,dst,count), mmio_insw(addr, dst, count));
0335 }
0336 void ioread32_rep(const void __iomem *addr, void *dst, unsigned long count)
0337 {
0338     IO_COND(addr, insl(port,dst,count), mmio_insl(addr, dst, count));
0339 }
0340 EXPORT_SYMBOL(ioread8_rep);
0341 EXPORT_SYMBOL(ioread16_rep);
0342 EXPORT_SYMBOL(ioread32_rep);
0343 
0344 void iowrite8_rep(void __iomem *addr, const void *src, unsigned long count)
0345 {
0346     IO_COND(addr, outsb(port, src, count), mmio_outsb(addr, src, count));
0347 }
0348 void iowrite16_rep(void __iomem *addr, const void *src, unsigned long count)
0349 {
0350     IO_COND(addr, outsw(port, src, count), mmio_outsw(addr, src, count));
0351 }
0352 void iowrite32_rep(void __iomem *addr, const void *src, unsigned long count)
0353 {
0354     IO_COND(addr, outsl(port, src,count), mmio_outsl(addr, src, count));
0355 }
0356 EXPORT_SYMBOL(iowrite8_rep);
0357 EXPORT_SYMBOL(iowrite16_rep);
0358 EXPORT_SYMBOL(iowrite32_rep);
0359 
0360 #ifdef CONFIG_HAS_IOPORT_MAP
0361 /* Create a virtual mapping cookie for an IO port range */
0362 void __iomem *ioport_map(unsigned long port, unsigned int nr)
0363 {
0364     if (port > PIO_MASK)
0365         return NULL;
0366     return (void __iomem *) (unsigned long) (port + PIO_OFFSET);
0367 }
0368 
0369 void ioport_unmap(void __iomem *addr)
0370 {
0371     /* Nothing to do */
0372 }
0373 EXPORT_SYMBOL(ioport_map);
0374 EXPORT_SYMBOL(ioport_unmap);
0375 #endif /* CONFIG_HAS_IOPORT_MAP */
0376 
0377 #ifdef CONFIG_PCI
0378 /* Hide the details if this is a MMIO or PIO address space and just do what
0379  * you expect in the correct way. */
0380 void pci_iounmap(struct pci_dev *dev, void __iomem * addr)
0381 {
0382     IO_COND(addr, /* nothing */, iounmap(addr));
0383 }
0384 EXPORT_SYMBOL(pci_iounmap);
0385 #endif /* CONFIG_PCI */
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