kernel/dma/direct.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (C) 2018 Christoph Hellwig.
0004  *
0005  * DMA operations that map physical memory directly without using an IOMMU.
0006  */
0007 #ifndef _KERNEL_DMA_DIRECT_H
0008 #define _KERNEL_DMA_DIRECT_H
0009
0010 #include <linux/dma-direct.h>
0011 #include <linux/memremap.h>
0012
0013 int dma_direct_get_sgtable(struct device *dev, struct sg_table *sgt,
0014         void *cpu_addr, dma_addr_t dma_addr, size_t size,
0015         unsigned long attrs);
0016 bool dma_direct_can_mmap(struct device *dev);
0017 int dma_direct_mmap(struct device *dev, struct vm_area_struct *vma,
0018         void *cpu_addr, dma_addr_t dma_addr, size_t size,
0019         unsigned long attrs);
0020 bool dma_direct_need_sync(struct device *dev, dma_addr_t dma_addr);
0021 int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
0022         enum dma_data_direction dir, unsigned long attrs);
0023 size_t dma_direct_max_mapping_size(struct device *dev);
0024
0025 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
0026     defined(CONFIG_SWIOTLB)
0027 void dma_direct_sync_sg_for_device(struct device *dev, struct scatterlist *sgl,
0028         int nents, enum dma_data_direction dir);
0029 #else
0030 static inline void dma_direct_sync_sg_for_device(struct device *dev,
0031         struct scatterlist *sgl, int nents, enum dma_data_direction dir)
0032 {
0033 }
0034 #endif
0035
0036 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
0037     defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) || \
0038     defined(CONFIG_SWIOTLB)
0039 void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl,
0040         int nents, enum dma_data_direction dir, unsigned long attrs);
0041 void dma_direct_sync_sg_for_cpu(struct device *dev,
0042         struct scatterlist *sgl, int nents, enum dma_data_direction dir);
0043 #else
0044 static inline void dma_direct_unmap_sg(struct device *dev,
0045         struct scatterlist *sgl, int nents, enum dma_data_direction dir,
0046         unsigned long attrs)
0047 {
0048 }
0049 static inline void dma_direct_sync_sg_for_cpu(struct device *dev,
0050         struct scatterlist *sgl, int nents, enum dma_data_direction dir)
0051 {
0052 }
0053 #endif
0054
0055 static inline void dma_direct_sync_single_for_device(struct device *dev,
0056         dma_addr_t addr, size_t size, enum dma_data_direction dir)
0057 {
0058     phys_addr_t paddr = dma_to_phys(dev, addr);
0059
0060     if (unlikely(is_swiotlb_buffer(dev, paddr)))
0061         swiotlb_sync_single_for_device(dev, paddr, size, dir);
0062
0063     if (!dev_is_dma_coherent(dev))
0064         arch_sync_dma_for_device(paddr, size, dir);
0065 }
0066
0067 static inline void dma_direct_sync_single_for_cpu(struct device *dev,
0068         dma_addr_t addr, size_t size, enum dma_data_direction dir)
0069 {
0070     phys_addr_t paddr = dma_to_phys(dev, addr);
0071
0072     if (!dev_is_dma_coherent(dev)) {
0073         arch_sync_dma_for_cpu(paddr, size, dir);
0074         arch_sync_dma_for_cpu_all();
0075     }
0076
0077     if (unlikely(is_swiotlb_buffer(dev, paddr)))
0078         swiotlb_sync_single_for_cpu(dev, paddr, size, dir);
0079
0080     if (dir == DMA_FROM_DEVICE)
0081         arch_dma_mark_clean(paddr, size);
0082 }
0083
0084 static inline dma_addr_t dma_direct_map_page(struct device *dev,
0085         struct page *page, unsigned long offset, size_t size,
0086         enum dma_data_direction dir, unsigned long attrs)
0087 {
0088     phys_addr_t phys = page_to_phys(page) + offset;
0089     dma_addr_t dma_addr = phys_to_dma(dev, phys);
0090
0091     if (is_swiotlb_force_bounce(dev)) {
0092         if (is_pci_p2pdma_page(page))
0093             return DMA_MAPPING_ERROR;
0094         return swiotlb_map(dev, phys, size, dir, attrs);
0095     }
0096
0097     if (unlikely(!dma_capable(dev, dma_addr, size, true))) {
0098         if (is_pci_p2pdma_page(page))
0099             return DMA_MAPPING_ERROR;
0100         if (is_swiotlb_active(dev))
0101             return swiotlb_map(dev, phys, size, dir, attrs);
0102
0103         dev_WARN_ONCE(dev, 1,
0104                  "DMA addr %pad+%zu overflow (mask %llx, bus limit %llx).\n",
0105                  &dma_addr, size, *dev->dma_mask, dev->bus_dma_limit);
0106         return DMA_MAPPING_ERROR;
0107     }
0108
0109     if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))
0110         arch_sync_dma_for_device(phys, size, dir);
0111     return dma_addr;
0112 }
0113
0114 static inline void dma_direct_unmap_page(struct device *dev, dma_addr_t addr,
0115         size_t size, enum dma_data_direction dir, unsigned long attrs)
0116 {
0117     phys_addr_t phys = dma_to_phys(dev, addr);
0118
0119     if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
0120         dma_direct_sync_single_for_cpu(dev, addr, size, dir);
0121
0122     if (unlikely(is_swiotlb_buffer(dev, phys)))
0123         swiotlb_tbl_unmap_single(dev, phys, size, dir,
0124                      attrs | DMA_ATTR_SKIP_CPU_SYNC);
0125 }
0126 #endif /* _KERNEL_DMA_DIRECT_H */