xen/interface/physdev.h

0001 /* SPDX-License-Identifier: MIT */
0002
0003 #ifndef __XEN_PUBLIC_PHYSDEV_H__
0004 #define __XEN_PUBLIC_PHYSDEV_H__
0005
0006 /*
0007  * Prototype for this hypercall is:
0008  *  int physdev_op(int cmd, void *args)
0009  * @cmd  == PHYSDEVOP_??? (physdev operation).
0010  * @args == Operation-specific extra arguments (NULL if none).
0011  */
0012
0013 /*
0014  * Notify end-of-interrupt (EOI) for the specified IRQ.
0015  * @arg == pointer to physdev_eoi structure.
0016  */
0017 #define PHYSDEVOP_eoi           12
0018 struct physdev_eoi {
0019     /* IN */
0020     uint32_t irq;
0021 };
0022
0023 /*
0024  * Register a shared page for the hypervisor to indicate whether the guest
0025  * must issue PHYSDEVOP_eoi. The semantics of PHYSDEVOP_eoi change slightly
0026  * once the guest used this function in that the associated event channel
0027  * will automatically get unmasked. The page registered is used as a bit
0028  * array indexed by Xen's PIRQ value.
0029  */
0030 #define PHYSDEVOP_pirq_eoi_gmfn_v1       17
0031 /*
0032  * Register a shared page for the hypervisor to indicate whether the
0033  * guest must issue PHYSDEVOP_eoi. This hypercall is very similar to
0034  * PHYSDEVOP_pirq_eoi_gmfn_v1 but it doesn't change the semantics of
0035  * PHYSDEVOP_eoi. The page registered is used as a bit array indexed by
0036  * Xen's PIRQ value.
0037  */
0038 #define PHYSDEVOP_pirq_eoi_gmfn_v2       28
0039 struct physdev_pirq_eoi_gmfn {
0040     /* IN */
0041     xen_ulong_t gmfn;
0042 };
0043
0044 /*
0045  * Query the status of an IRQ line.
0046  * @arg == pointer to physdev_irq_status_query structure.
0047  */
0048 #define PHYSDEVOP_irq_status_query   5
0049 struct physdev_irq_status_query {
0050     /* IN */
0051     uint32_t irq;
0052     /* OUT */
0053     uint32_t flags; /* XENIRQSTAT_* */
0054 };
0055
0056 /* Need to call PHYSDEVOP_eoi when the IRQ has been serviced? */
0057 #define _XENIRQSTAT_needs_eoi   (0)
0058 #define  XENIRQSTAT_needs_eoi   (1U<<_XENIRQSTAT_needs_eoi)
0059
0060 /* IRQ shared by multiple guests? */
0061 #define _XENIRQSTAT_shared  (1)
0062 #define  XENIRQSTAT_shared  (1U<<_XENIRQSTAT_shared)
0063
0064 /*
0065  * Set the current VCPU's I/O privilege level.
0066  * @arg == pointer to physdev_set_iopl structure.
0067  */
0068 #define PHYSDEVOP_set_iopl       6
0069 struct physdev_set_iopl {
0070     /* IN */
0071     uint32_t iopl;
0072 };
0073
0074 /*
0075  * Set the current VCPU's I/O-port permissions bitmap.
0076  * @arg == pointer to physdev_set_iobitmap structure.
0077  */
0078 #define PHYSDEVOP_set_iobitmap       7
0079 struct physdev_set_iobitmap {
0080     /* IN */
0081     uint8_t * bitmap;
0082     uint32_t nr_ports;
0083 };
0084
0085 /*
0086  * Read or write an IO-APIC register.
0087  * @arg == pointer to physdev_apic structure.
0088  */
0089 #define PHYSDEVOP_apic_read      8
0090 #define PHYSDEVOP_apic_write         9
0091 struct physdev_apic {
0092     /* IN */
0093     unsigned long apic_physbase;
0094     uint32_t reg;
0095     /* IN or OUT */
0096     uint32_t value;
0097 };
0098
0099 /*
0100  * Allocate or free a physical upcall vector for the specified IRQ line.
0101  * @arg == pointer to physdev_irq structure.
0102  */
0103 #define PHYSDEVOP_alloc_irq_vector  10
0104 #define PHYSDEVOP_free_irq_vector   11
0105 struct physdev_irq {
0106     /* IN */
0107     uint32_t irq;
0108     /* IN or OUT */
0109     uint32_t vector;
0110 };
0111
0112 #define MAP_PIRQ_TYPE_MSI       0x0
0113 #define MAP_PIRQ_TYPE_GSI       0x1
0114 #define MAP_PIRQ_TYPE_UNKNOWN       0x2
0115 #define MAP_PIRQ_TYPE_MSI_SEG       0x3
0116 #define MAP_PIRQ_TYPE_MULTI_MSI     0x4
0117
0118 #define PHYSDEVOP_map_pirq      13
0119 struct physdev_map_pirq {
0120     domid_t domid;
0121     /* IN */
0122     int type;
0123     /* IN */
0124     int index;
0125     /* IN or OUT */
0126     int pirq;
0127     /* IN - high 16 bits hold segment for ..._MSI_SEG and ..._MULTI_MSI */
0128     int bus;
0129     /* IN */
0130     int devfn;
0131     /* IN
0132      * - For MSI-X contains entry number.
0133      * - For MSI with ..._MULTI_MSI contains number of vectors.
0134      * OUT (..._MULTI_MSI only)
0135      * - Number of vectors allocated.
0136      */
0137     int entry_nr;
0138     /* IN */
0139     uint64_t table_base;
0140 };
0141
0142 #define PHYSDEVOP_unmap_pirq        14
0143 struct physdev_unmap_pirq {
0144     domid_t domid;
0145     /* IN */
0146     int pirq;
0147 };
0148
0149 #define PHYSDEVOP_manage_pci_add    15
0150 #define PHYSDEVOP_manage_pci_remove 16
0151 struct physdev_manage_pci {
0152     /* IN */
0153     uint8_t bus;
0154     uint8_t devfn;
0155 };
0156
0157 #define PHYSDEVOP_restore_msi            19
0158 struct physdev_restore_msi {
0159     /* IN */
0160     uint8_t bus;
0161     uint8_t devfn;
0162 };
0163
0164 #define PHYSDEVOP_manage_pci_add_ext    20
0165 struct physdev_manage_pci_ext {
0166     /* IN */
0167     uint8_t bus;
0168     uint8_t devfn;
0169     unsigned is_extfn;
0170     unsigned is_virtfn;
0171     struct {
0172         uint8_t bus;
0173         uint8_t devfn;
0174     } physfn;
0175 };
0176
0177 /*
0178  * Argument to physdev_op_compat() hypercall. Superceded by new physdev_op()
0179  * hypercall since 0x00030202.
0180  */
0181 struct physdev_op {
0182     uint32_t cmd;
0183     union {
0184         struct physdev_irq_status_query      irq_status_query;
0185         struct physdev_set_iopl          set_iopl;
0186         struct physdev_set_iobitmap      set_iobitmap;
0187         struct physdev_apic          apic_op;
0188         struct physdev_irq           irq_op;
0189     } u;
0190 };
0191
0192 #define PHYSDEVOP_setup_gsi    21
0193 struct physdev_setup_gsi {
0194     int gsi;
0195     /* IN */
0196     uint8_t triggering;
0197     /* IN */
0198     uint8_t polarity;
0199     /* IN */
0200 };
0201
0202 #define PHYSDEVOP_get_nr_pirqs    22
0203 struct physdev_nr_pirqs {
0204     /* OUT */
0205     uint32_t nr_pirqs;
0206 };
0207
0208 /* type is MAP_PIRQ_TYPE_GSI or MAP_PIRQ_TYPE_MSI
0209  * the hypercall returns a free pirq */
0210 #define PHYSDEVOP_get_free_pirq    23
0211 struct physdev_get_free_pirq {
0212     /* IN */
0213     int type;
0214     /* OUT */
0215     uint32_t pirq;
0216 };
0217
0218 #define XEN_PCI_DEV_EXTFN              0x1
0219 #define XEN_PCI_DEV_VIRTFN             0x2
0220 #define XEN_PCI_DEV_PXM                0x4
0221
0222 #define XEN_PCI_MMCFG_RESERVED         0x1
0223
0224 #define PHYSDEVOP_pci_mmcfg_reserved    24
0225 struct physdev_pci_mmcfg_reserved {
0226     uint64_t address;
0227     uint16_t segment;
0228     uint8_t start_bus;
0229     uint8_t end_bus;
0230     uint32_t flags;
0231 };
0232
0233 #define PHYSDEVOP_pci_device_add        25
0234 struct physdev_pci_device_add {
0235     /* IN */
0236     uint16_t seg;
0237     uint8_t bus;
0238     uint8_t devfn;
0239     uint32_t flags;
0240     struct {
0241         uint8_t bus;
0242         uint8_t devfn;
0243     } physfn;
0244 #if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
0245     uint32_t optarr[];
0246 #elif defined(__GNUC__)
0247     uint32_t optarr[0];
0248 #endif
0249 };
0250
0251 #define PHYSDEVOP_pci_device_remove     26
0252 #define PHYSDEVOP_restore_msi_ext       27
0253 /*
0254  * Dom0 should use these two to announce MMIO resources assigned to
0255  * MSI-X capable devices won't (prepare) or may (release) change.
0256  */
0257 #define PHYSDEVOP_prepare_msix          30
0258 #define PHYSDEVOP_release_msix          31
0259 struct physdev_pci_device {
0260     /* IN */
0261     uint16_t seg;
0262     uint8_t bus;
0263     uint8_t devfn;
0264 };
0265
0266 #define PHYSDEVOP_DBGP_RESET_PREPARE    1
0267 #define PHYSDEVOP_DBGP_RESET_DONE       2
0268
0269 #define PHYSDEVOP_DBGP_BUS_UNKNOWN      0
0270 #define PHYSDEVOP_DBGP_BUS_PCI          1
0271
0272 #define PHYSDEVOP_dbgp_op               29
0273 struct physdev_dbgp_op {
0274     /* IN */
0275     uint8_t op;
0276     uint8_t bus;
0277     union {
0278         struct physdev_pci_device pci;
0279     } u;
0280 };
0281
0282 /*
0283  * Notify that some PIRQ-bound event channels have been unmasked.
0284  * ** This command is obsolete since interface version 0x00030202 and is **
0285  * ** unsupported by newer versions of Xen.              **
0286  */
0287 #define PHYSDEVOP_IRQ_UNMASK_NOTIFY  4
0288
0289 /*
0290  * These all-capitals physdev operation names are superceded by the new names
0291  * (defined above) since interface version 0x00030202.
0292  */
0293 #define PHYSDEVOP_IRQ_STATUS_QUERY   PHYSDEVOP_irq_status_query
0294 #define PHYSDEVOP_SET_IOPL       PHYSDEVOP_set_iopl
0295 #define PHYSDEVOP_SET_IOBITMAP       PHYSDEVOP_set_iobitmap
0296 #define PHYSDEVOP_APIC_READ      PHYSDEVOP_apic_read
0297 #define PHYSDEVOP_APIC_WRITE         PHYSDEVOP_apic_write
0298 #define PHYSDEVOP_ASSIGN_VECTOR      PHYSDEVOP_alloc_irq_vector
0299 #define PHYSDEVOP_FREE_VECTOR        PHYSDEVOP_free_irq_vector
0300 #define PHYSDEVOP_IRQ_NEEDS_UNMASK_NOTIFY XENIRQSTAT_needs_eoi
0301 #define PHYSDEVOP_IRQ_SHARED         XENIRQSTAT_shared
0302
0303 #endif /* __XEN_PUBLIC_PHYSDEV_H__ */