interface/io/pciif.h

0001 /* SPDX-License-Identifier: MIT */
0002 /*
0003  * PCI Backend/Frontend Common Data Structures & Macros
0004  *
0005  *   Author: Ryan Wilson <hap9@epoch.ncsc.mil>
0006  */
0007 #ifndef __XEN_PCI_COMMON_H__
0008 #define __XEN_PCI_COMMON_H__
0009
0010 /* Be sure to bump this number if you change this file */
0011 #define XEN_PCI_MAGIC "7"
0012
0013 /* xen_pci_sharedinfo flags */
0014 #define _XEN_PCIF_active        (0)
0015 #define XEN_PCIF_active         (1<<_XEN_PCIF_active)
0016 #define _XEN_PCIB_AERHANDLER        (1)
0017 #define XEN_PCIB_AERHANDLER     (1<<_XEN_PCIB_AERHANDLER)
0018 #define _XEN_PCIB_active        (2)
0019 #define XEN_PCIB_active         (1<<_XEN_PCIB_active)
0020
0021 /* xen_pci_op commands */
0022 #define XEN_PCI_OP_conf_read        (0)
0023 #define XEN_PCI_OP_conf_write       (1)
0024 #define XEN_PCI_OP_enable_msi       (2)
0025 #define XEN_PCI_OP_disable_msi      (3)
0026 #define XEN_PCI_OP_enable_msix      (4)
0027 #define XEN_PCI_OP_disable_msix     (5)
0028 #define XEN_PCI_OP_aer_detected     (6)
0029 #define XEN_PCI_OP_aer_resume       (7)
0030 #define XEN_PCI_OP_aer_mmio     (8)
0031 #define XEN_PCI_OP_aer_slotreset    (9)
0032
0033 /* xen_pci_op error numbers */
0034 #define XEN_PCI_ERR_success     (0)
0035 #define XEN_PCI_ERR_dev_not_found   (-1)
0036 #define XEN_PCI_ERR_invalid_offset  (-2)
0037 #define XEN_PCI_ERR_access_denied   (-3)
0038 #define XEN_PCI_ERR_not_implemented (-4)
0039 /* XEN_PCI_ERR_op_failed - backend failed to complete the operation */
0040 #define XEN_PCI_ERR_op_failed       (-5)
0041
0042 /*
0043  * it should be PAGE_SIZE-sizeof(struct xen_pci_op))/sizeof(struct msix_entry))
0044  * Should not exceed 128
0045  */
0046 #define SH_INFO_MAX_VEC         128
0047
0048 struct xen_msix_entry {
0049     uint16_t vector;
0050     uint16_t entry;
0051 };
0052 struct xen_pci_op {
0053     /* IN: what action to perform: XEN_PCI_OP_* */
0054     uint32_t cmd;
0055
0056     /* OUT: will contain an error number (if any) from errno.h */
0057     int32_t err;
0058
0059     /* IN: which device to touch */
0060     uint32_t domain; /* PCI Domain/Segment */
0061     uint32_t bus;
0062     uint32_t devfn;
0063
0064     /* IN: which configuration registers to touch */
0065     int32_t offset;
0066     int32_t size;
0067
0068     /* IN/OUT: Contains the result after a READ or the value to WRITE */
0069     uint32_t value;
0070     /* IN: Contains extra infor for this operation */
0071     uint32_t info;
0072     /*IN:  param for msi-x */
0073     struct xen_msix_entry msix_entries[SH_INFO_MAX_VEC];
0074 };
0075
0076 /*used for pcie aer handling*/
0077 struct xen_pcie_aer_op {
0078     /* IN: what action to perform: XEN_PCI_OP_* */
0079     uint32_t cmd;
0080     /*IN/OUT: return aer_op result or carry error_detected state as input*/
0081     int32_t err;
0082
0083     /* IN: which device to touch */
0084     uint32_t domain; /* PCI Domain/Segment*/
0085     uint32_t bus;
0086     uint32_t devfn;
0087 };
0088 struct xen_pci_sharedinfo {
0089     /* flags - XEN_PCIF_* */
0090     uint32_t flags;
0091     struct xen_pci_op op;
0092     struct xen_pcie_aer_op aer_op;
0093 };
0094
0095 #endif /* __XEN_PCI_COMMON_H__ */