interface/hvm/params.h

0001 /* SPDX-License-Identifier: MIT */
0002
0003 #ifndef __XEN_PUBLIC_HVM_PARAMS_H__
0004 #define __XEN_PUBLIC_HVM_PARAMS_H__
0005
0006 #include <xen/interface/hvm/hvm_op.h>
0007
0008 /*
0009  * Parameter space for HVMOP_{set,get}_param.
0010  */
0011
0012 #define HVM_PARAM_CALLBACK_IRQ 0
0013 /*
0014  * How should CPU0 event-channel notifications be delivered?
0015  *
0016  * If val == 0 then CPU0 event-channel notifications are not delivered.
0017  * If val != 0, val[63:56] encodes the type, as follows:
0018  */
0019
0020 #define HVM_PARAM_CALLBACK_TYPE_GSI      0
0021 /*
0022  * val[55:0] is a delivery GSI.  GSI 0 cannot be used, as it aliases val == 0,
0023  * and disables all notifications.
0024  */
0025
0026 #define HVM_PARAM_CALLBACK_TYPE_PCI_INTX 1
0027 /*
0028  * val[55:0] is a delivery PCI INTx line:
0029  * Domain = val[47:32], Bus = val[31:16] DevFn = val[15:8], IntX = val[1:0]
0030  */
0031
0032 #if defined(__i386__) || defined(__x86_64__)
0033 #define HVM_PARAM_CALLBACK_TYPE_VECTOR   2
0034 /*
0035  * val[7:0] is a vector number.  Check for XENFEAT_hvm_callback_vector to know
0036  * if this delivery method is available.
0037  */
0038 #elif defined(__arm__) || defined(__aarch64__)
0039 #define HVM_PARAM_CALLBACK_TYPE_PPI      2
0040 /*
0041  * val[55:16] needs to be zero.
0042  * val[15:8] is interrupt flag of the PPI used by event-channel:
0043  *  bit 8: the PPI is edge(1) or level(0) triggered
0044  *  bit 9: the PPI is active low(1) or high(0)
0045  * val[7:0] is a PPI number used by event-channel.
0046  * This is only used by ARM/ARM64 and masking/eoi the interrupt associated to
0047  * the notification is handled by the interrupt controller.
0048  */
0049 #endif
0050
0051 #define HVM_PARAM_STORE_PFN    1
0052 #define HVM_PARAM_STORE_EVTCHN 2
0053
0054 #define HVM_PARAM_PAE_ENABLED  4
0055
0056 #define HVM_PARAM_IOREQ_PFN    5
0057
0058 #define HVM_PARAM_BUFIOREQ_PFN 6
0059
0060 /*
0061  * Set mode for virtual timers (currently x86 only):
0062  *  delay_for_missed_ticks (default):
0063  *   Do not advance a vcpu's time beyond the correct delivery time for
0064  *   interrupts that have been missed due to preemption. Deliver missed
0065  *   interrupts when the vcpu is rescheduled and advance the vcpu's virtual
0066  *   time stepwise for each one.
0067  *  no_delay_for_missed_ticks:
0068  *   As above, missed interrupts are delivered, but guest time always tracks
0069  *   wallclock (i.e., real) time while doing so.
0070  *  no_missed_ticks_pending:
0071  *   No missed interrupts are held pending. Instead, to ensure ticks are
0072  *   delivered at some non-zero rate, if we detect missed ticks then the
0073  *   internal tick alarm is not disabled if the VCPU is preempted during the
0074  *   next tick period.
0075  *  one_missed_tick_pending:
0076  *   Missed interrupts are collapsed together and delivered as one 'late tick'.
0077  *   Guest time always tracks wallclock (i.e., real) time.
0078  */
0079 #define HVM_PARAM_TIMER_MODE   10
0080 #define HVMPTM_delay_for_missed_ticks    0
0081 #define HVMPTM_no_delay_for_missed_ticks 1
0082 #define HVMPTM_no_missed_ticks_pending   2
0083 #define HVMPTM_one_missed_tick_pending   3
0084
0085 /* Boolean: Enable virtual HPET (high-precision event timer)? (x86-only) */
0086 #define HVM_PARAM_HPET_ENABLED 11
0087
0088 /* Identity-map page directory used by Intel EPT when CR0.PG=0. */
0089 #define HVM_PARAM_IDENT_PT     12
0090
0091 /* Device Model domain, defaults to 0. */
0092 #define HVM_PARAM_DM_DOMAIN    13
0093
0094 /* ACPI S state: currently support S0 and S3 on x86. */
0095 #define HVM_PARAM_ACPI_S_STATE 14
0096
0097 /* TSS used on Intel when CR0.PE=0. */
0098 #define HVM_PARAM_VM86_TSS     15
0099
0100 /* Boolean: Enable aligning all periodic vpts to reduce interrupts */
0101 #define HVM_PARAM_VPT_ALIGN    16
0102
0103 /* Console debug shared memory ring and event channel */
0104 #define HVM_PARAM_CONSOLE_PFN    17
0105 #define HVM_PARAM_CONSOLE_EVTCHN 18
0106
0107 #define HVM_NR_PARAMS          19
0108
0109 #endif /* __XEN_PUBLIC_HVM_PARAMS_H__ */