include/video/w100fb.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  *  Support for the w100 frame buffer.
0004  *
0005  *  Copyright (c) 2004-2005 Richard Purdie
0006  *  Copyright (c) 2005 Ian Molton
0007  */
0008
0009 #define W100_GPIO_PORT_A    0
0010 #define W100_GPIO_PORT_B    1
0011
0012 #define CLK_SRC_XTAL  0
0013 #define CLK_SRC_PLL   1
0014
0015 struct w100fb_par;
0016
0017 unsigned long w100fb_gpio_read(int port);
0018 void w100fb_gpio_write(int port, unsigned long value);
0019 unsigned long w100fb_get_hsynclen(struct device *dev);
0020
0021 /* LCD Specific Routines and Config */
0022 struct w100_tg_info {
0023     void (*change)(struct w100fb_par*);
0024     void (*suspend)(struct w100fb_par*);
0025     void (*resume)(struct w100fb_par*);
0026 };
0027
0028 /* General Platform Specific w100 Register Values */
0029 struct w100_gen_regs {
0030     unsigned long lcd_format;
0031     unsigned long lcdd_cntl1;
0032     unsigned long lcdd_cntl2;
0033     unsigned long genlcd_cntl1;
0034     unsigned long genlcd_cntl2;
0035     unsigned long genlcd_cntl3;
0036 };
0037
0038 struct w100_gpio_regs {
0039     unsigned long init_data1;
0040     unsigned long init_data2;
0041     unsigned long gpio_dir1;
0042     unsigned long gpio_oe1;
0043     unsigned long gpio_dir2;
0044     unsigned long gpio_oe2;
0045 };
0046
0047 /* Optional External Memory Configuration */
0048 struct w100_mem_info {
0049     unsigned long ext_cntl;
0050     unsigned long sdram_mode_reg;
0051     unsigned long ext_timing_cntl;
0052     unsigned long io_cntl;
0053     unsigned int size;
0054 };
0055
0056 struct w100_bm_mem_info {
0057     unsigned long ext_mem_bw;
0058     unsigned long offset;
0059     unsigned long ext_timing_ctl;
0060     unsigned long ext_cntl;
0061     unsigned long mode_reg;
0062     unsigned long io_cntl;
0063     unsigned long config;
0064 };
0065
0066 /* LCD Mode definition */
0067 struct w100_mode {
0068     unsigned int xres;
0069     unsigned int yres;
0070     unsigned short left_margin;
0071     unsigned short right_margin;
0072     unsigned short upper_margin;
0073     unsigned short lower_margin;
0074     unsigned long crtc_ss;
0075     unsigned long crtc_ls;
0076     unsigned long crtc_gs;
0077     unsigned long crtc_vpos_gs;
0078     unsigned long crtc_rev;
0079     unsigned long crtc_dclk;
0080     unsigned long crtc_gclk;
0081     unsigned long crtc_goe;
0082     unsigned long crtc_ps1_active;
0083     char pll_freq;
0084     char fast_pll_freq;
0085     int sysclk_src;
0086     int sysclk_divider;
0087     int pixclk_src;
0088     int pixclk_divider;
0089     int pixclk_divider_rotated;
0090 };
0091
0092 struct w100_pll_info {
0093     uint16_t freq;  /* desired Fout for PLL (Mhz) */
0094     uint8_t M;      /* input divider */
0095     uint8_t N_int;  /* VCO multiplier */
0096     uint8_t N_fac;  /* VCO multiplier fractional part */
0097     uint8_t tfgoal;
0098     uint8_t lock_time;
0099 };
0100
0101 /* Initial Video mode orientation flags */
0102 #define INIT_MODE_ROTATED  0x1
0103 #define INIT_MODE_FLIPPED  0x2
0104
0105 /*
0106  * This structure describes the machine which we are running on.
0107  * It is set by machine specific code and used in the probe routine
0108  * of drivers/video/w100fb.c
0109  */
0110 struct w100fb_mach_info {
0111     /* General Platform Specific Registers */
0112     struct w100_gen_regs *regs;
0113     /* Table of modes the LCD is capable of */
0114     struct w100_mode *modelist;
0115     unsigned int num_modes;
0116     /* Hooks for any platform specific tg/lcd code (optional) */
0117     struct w100_tg_info *tg;
0118     /* External memory definition (if present) */
0119     struct w100_mem_info *mem;
0120     /* Additional External memory definition (if present) */
0121     struct w100_bm_mem_info *bm_mem;
0122     /* GPIO definitions (optional) */
0123     struct w100_gpio_regs *gpio;
0124     /* Initial Mode flags */
0125     unsigned int init_mode;
0126     /* Xtal Frequency */
0127     unsigned int xtal_freq;
0128     /* Enable Xtal input doubler (1 == enable) */
0129     unsigned int xtal_dbl;
0130 };
0131
0132 /* General frame buffer data structure */
0133 struct w100fb_par {
0134     unsigned int chip_id;
0135     unsigned int xres;
0136     unsigned int yres;
0137     unsigned int extmem_active;
0138     unsigned int flip;
0139     unsigned int blanked;
0140     unsigned int fastpll_mode;
0141     unsigned long hsync_len;
0142     struct w100_mode *mode;
0143     struct w100_pll_info *pll_table;
0144     struct w100fb_mach_info *mach;
0145     uint32_t *saved_intmem;
0146     uint32_t *saved_extmem;
0147 };