0001
0002 #ifndef _TDFX_H
0003 #define _TDFX_H
0004
0005 #include <linux/i2c.h>
0006 #include <linux/i2c-algo-bit.h>
0007
0008
0009 #define STATUS 0x00
0010 #define PCIINIT0 0x04
0011 #define SIPMONITOR 0x08
0012 #define LFBMEMORYCONFIG 0x0c
0013 #define MISCINIT0 0x10
0014 #define MISCINIT1 0x14
0015 #define DRAMINIT0 0x18
0016 #define DRAMINIT1 0x1c
0017 #define AGPINIT 0x20
0018 #define TMUGBEINIT 0x24
0019 #define VGAINIT0 0x28
0020 #define VGAINIT1 0x2c
0021 #define DRAMCOMMAND 0x30
0022 #define DRAMDATA 0x34
0023
0024
0025 #define PLLCTRL0 0x40
0026 #define PLLCTRL1 0x44
0027 #define PLLCTRL2 0x48
0028 #define DACMODE 0x4c
0029 #define DACADDR 0x50
0030 #define DACDATA 0x54
0031 #define RGBMAXDELTA 0x58
0032 #define VIDPROCCFG 0x5c
0033 #define HWCURPATADDR 0x60
0034 #define HWCURLOC 0x64
0035 #define HWCURC0 0x68
0036 #define HWCURC1 0x6c
0037 #define VIDINFORMAT 0x70
0038 #define VIDINSTATUS 0x74
0039 #define VIDSERPARPORT 0x78
0040 #define VIDINXDELTA 0x7c
0041 #define VIDININITERR 0x80
0042 #define VIDINYDELTA 0x84
0043 #define VIDPIXBUFTHOLD 0x88
0044 #define VIDCHRMIN 0x8c
0045 #define VIDCHRMAX 0x90
0046 #define VIDCURLIN 0x94
0047 #define VIDSCREENSIZE 0x98
0048 #define VIDOVRSTARTCRD 0x9c
0049 #define VIDOVRENDCRD 0xa0
0050 #define VIDOVRDUDX 0xa4
0051 #define VIDOVRDUDXOFF 0xa8
0052 #define VIDOVRDVDY 0xac
0053
0054 #define VIDOVRDVDYOFF 0xe0
0055 #define VIDDESKSTART 0xe4
0056 #define VIDDESKSTRIDE 0xe8
0057 #define VIDINADDR0 0xec
0058 #define VIDINADDR1 0xf0
0059 #define VIDINADDR2 0xf4
0060 #define VIDINSTRIDE 0xf8
0061 #define VIDCUROVRSTART 0xfc
0062
0063 #define INTCTRL (0x00100000 + 0x04)
0064 #define CLIP0MIN (0x00100000 + 0x08)
0065 #define CLIP0MAX (0x00100000 + 0x0c)
0066 #define DSTBASE (0x00100000 + 0x10)
0067 #define DSTFORMAT (0x00100000 + 0x14)
0068 #define SRCBASE (0x00100000 + 0x34)
0069 #define COMMANDEXTRA_2D (0x00100000 + 0x38)
0070 #define CLIP1MIN (0x00100000 + 0x4c)
0071 #define CLIP1MAX (0x00100000 + 0x50)
0072 #define SRCFORMAT (0x00100000 + 0x54)
0073 #define SRCSIZE (0x00100000 + 0x58)
0074 #define SRCXY (0x00100000 + 0x5c)
0075 #define COLORBACK (0x00100000 + 0x60)
0076 #define COLORFORE (0x00100000 + 0x64)
0077 #define DSTSIZE (0x00100000 + 0x68)
0078 #define DSTXY (0x00100000 + 0x6c)
0079 #define COMMAND_2D (0x00100000 + 0x70)
0080 #define LAUNCH_2D (0x00100000 + 0x80)
0081
0082 #define COMMAND_3D (0x00200000 + 0x120)
0083
0084
0085
0086
0087 #define TDFX_ROP_COPY 0xcc
0088 #define TDFX_ROP_INVERT 0x55
0089 #define TDFX_ROP_XOR 0x66
0090
0091 #define AUTOINC_DSTX BIT(10)
0092 #define AUTOINC_DSTY BIT(11)
0093 #define COMMAND_2D_FILLRECT 0x05
0094 #define COMMAND_2D_S2S_BITBLT 0x01
0095 #define COMMAND_2D_H2S_BITBLT 0x03
0096
0097 #define COMMAND_3D_NOP 0x00
0098 #define STATUS_RETRACE BIT(6)
0099 #define STATUS_BUSY BIT(9)
0100 #define MISCINIT1_CLUT_INV BIT(0)
0101 #define MISCINIT1_2DBLOCK_DIS BIT(15)
0102 #define DRAMINIT0_SGRAM_NUM BIT(26)
0103 #define DRAMINIT0_SGRAM_TYPE BIT(27)
0104 #define DRAMINIT0_SGRAM_TYPE_MASK (BIT(27) | BIT(28) | BIT(29))
0105 #define DRAMINIT0_SGRAM_TYPE_SHIFT 27
0106 #define DRAMINIT1_MEM_SDRAM BIT(30)
0107 #define VGAINIT0_VGA_DISABLE BIT(0)
0108 #define VGAINIT0_EXT_TIMING BIT(1)
0109 #define VGAINIT0_8BIT_DAC BIT(2)
0110 #define VGAINIT0_EXT_ENABLE BIT(6)
0111 #define VGAINIT0_WAKEUP_3C3 BIT(8)
0112 #define VGAINIT0_LEGACY_DISABLE BIT(9)
0113 #define VGAINIT0_ALT_READBACK BIT(10)
0114 #define VGAINIT0_FAST_BLINK BIT(11)
0115 #define VGAINIT0_EXTSHIFTOUT BIT(12)
0116 #define VGAINIT0_DECODE_3C6 BIT(13)
0117 #define VGAINIT0_SGRAM_HBLANK_DISABLE BIT(22)
0118 #define VGAINIT1_MASK 0x1fffff
0119 #define VIDCFG_VIDPROC_ENABLE BIT(0)
0120 #define VIDCFG_CURS_X11 BIT(1)
0121 #define VIDCFG_INTERLACE BIT(3)
0122 #define VIDCFG_HALF_MODE BIT(4)
0123 #define VIDCFG_DESK_ENABLE BIT(7)
0124 #define VIDCFG_CLUT_BYPASS BIT(10)
0125 #define VIDCFG_2X BIT(26)
0126 #define VIDCFG_HWCURSOR_ENABLE BIT(27)
0127 #define VIDCFG_PIXFMT_SHIFT 18
0128 #define DACMODE_2X BIT(0)
0129
0130
0131 #define DDC_ENAB 0x00040000
0132 #define DDC_SCL_OUT 0x00080000
0133 #define DDC_SDA_OUT 0x00100000
0134 #define DDC_SCL_IN 0x00200000
0135 #define DDC_SDA_IN 0x00400000
0136 #define I2C_ENAB 0x00800000
0137 #define I2C_SCL_OUT 0x01000000
0138 #define I2C_SDA_OUT 0x02000000
0139 #define I2C_SCL_IN 0x04000000
0140 #define I2C_SDA_IN 0x08000000
0141
0142
0143 #define MISC_W 0x3c2
0144 #define MISC_R 0x3cc
0145 #define SEQ_I 0x3c4
0146 #define SEQ_D 0x3c5
0147 #define CRT_I 0x3d4
0148 #define CRT_D 0x3d5
0149 #define ATT_IW 0x3c0
0150 #define IS1_R 0x3da
0151 #define GRA_I 0x3ce
0152 #define GRA_D 0x3cf
0153
0154 #ifdef __KERNEL__
0155
0156 struct banshee_reg {
0157
0158 unsigned char att[21];
0159 unsigned char crt[25];
0160 unsigned char gra[9];
0161 unsigned char misc[1];
0162 unsigned char seq[5];
0163
0164
0165 unsigned char ext[2];
0166 unsigned long vidcfg;
0167 unsigned long vidpll;
0168 unsigned long mempll;
0169 unsigned long gfxpll;
0170 unsigned long dacmode;
0171 unsigned long vgainit0;
0172 unsigned long vgainit1;
0173 unsigned long screensize;
0174 unsigned long stride;
0175 unsigned long cursloc;
0176 unsigned long curspataddr;
0177 unsigned long cursc0;
0178 unsigned long cursc1;
0179 unsigned long startaddr;
0180 unsigned long clip0min;
0181 unsigned long clip0max;
0182 unsigned long clip1min;
0183 unsigned long clip1max;
0184 unsigned long miscinit0;
0185 };
0186
0187 struct tdfx_par;
0188
0189 struct tdfxfb_i2c_chan {
0190 struct tdfx_par *par;
0191 struct i2c_adapter adapter;
0192 struct i2c_algo_bit_data algo;
0193 };
0194
0195 struct tdfx_par {
0196 u32 max_pixclock;
0197 u32 palette[16];
0198 void __iomem *regbase_virt;
0199 unsigned long iobase;
0200 int wc_cookie;
0201 #ifdef CONFIG_FB_3DFX_I2C
0202 struct tdfxfb_i2c_chan chan[2];
0203 #endif
0204 };
0205
0206 #endif
0207
0208 #endif
0209