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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /* include/video/samsung_fimd.h
0003  *
0004  * Copyright 2008 Openmoko, Inc.
0005  * Copyright 2008 Simtec Electronics
0006  *      http://armlinux.simtec.co.uk/
0007  *      Ben Dooks <ben@simtec.co.uk>
0008  *
0009  * S3C Platform - new-style fimd and framebuffer register definitions
0010  *
0011  * This is the register set for the fimd and new style framebuffer interface
0012  * found from the S3C2443 onwards into the S3C2416, S3C2450, the
0013  * S3C64XX series such as the S3C6400 and S3C6410, and Exynos series.
0014 */
0015 
0016 /* VIDCON0 */
0017 
0018 #define VIDCON0                 0x00
0019 #define VIDCON0_DSI_EN              (1 << 30)
0020 #define VIDCON0_INTERLACE           (1 << 29)
0021 #define VIDCON0_VIDOUT_MASK         (0x7 << 26)
0022 #define VIDCON0_VIDOUT_SHIFT            26
0023 #define VIDCON0_VIDOUT_RGB          (0x0 << 26)
0024 #define VIDCON0_VIDOUT_TV           (0x1 << 26)
0025 #define VIDCON0_VIDOUT_I80_LDI0         (0x2 << 26)
0026 #define VIDCON0_VIDOUT_I80_LDI1         (0x3 << 26)
0027 #define VIDCON0_VIDOUT_WB_RGB           (0x4 << 26)
0028 #define VIDCON0_VIDOUT_WB_I80_LDI0      (0x6 << 26)
0029 #define VIDCON0_VIDOUT_WB_I80_LDI1      (0x7 << 26)
0030 
0031 #define VIDCON0_L1_DATA_MASK            (0x7 << 23)
0032 #define VIDCON0_L1_DATA_SHIFT           23
0033 #define VIDCON0_L1_DATA_16BPP           (0x0 << 23)
0034 #define VIDCON0_L1_DATA_18BPP16         (0x1 << 23)
0035 #define VIDCON0_L1_DATA_18BPP9          (0x2 << 23)
0036 #define VIDCON0_L1_DATA_24BPP           (0x3 << 23)
0037 #define VIDCON0_L1_DATA_18BPP           (0x4 << 23)
0038 #define VIDCON0_L1_DATA_16BPP8          (0x5 << 23)
0039 
0040 #define VIDCON0_L0_DATA_MASK            (0x7 << 20)
0041 #define VIDCON0_L0_DATA_SHIFT           20
0042 #define VIDCON0_L0_DATA_16BPP           (0x0 << 20)
0043 #define VIDCON0_L0_DATA_18BPP16         (0x1 << 20)
0044 #define VIDCON0_L0_DATA_18BPP9          (0x2 << 20)
0045 #define VIDCON0_L0_DATA_24BPP           (0x3 << 20)
0046 #define VIDCON0_L0_DATA_18BPP           (0x4 << 20)
0047 #define VIDCON0_L0_DATA_16BPP8          (0x5 << 20)
0048 
0049 #define VIDCON0_PNRMODE_MASK            (0x3 << 17)
0050 #define VIDCON0_PNRMODE_SHIFT           17
0051 #define VIDCON0_PNRMODE_RGB         (0x0 << 17)
0052 #define VIDCON0_PNRMODE_BGR         (0x1 << 17)
0053 #define VIDCON0_PNRMODE_SERIAL_RGB      (0x2 << 17)
0054 #define VIDCON0_PNRMODE_SERIAL_BGR      (0x3 << 17)
0055 
0056 #define VIDCON0_CLKVALUP            (1 << 16)
0057 #define VIDCON0_CLKVAL_F_MASK           (0xff << 6)
0058 #define VIDCON0_CLKVAL_F_SHIFT          6
0059 #define VIDCON0_CLKVAL_F_LIMIT          0xff
0060 #define VIDCON0_CLKVAL_F(_x)            ((_x) << 6)
0061 #define VIDCON0_VLCKFREE            (1 << 5)
0062 #define VIDCON0_CLKDIR              (1 << 4)
0063 
0064 #define VIDCON0_CLKSEL_MASK         (0x3 << 2)
0065 #define VIDCON0_CLKSEL_SHIFT            2
0066 #define VIDCON0_CLKSEL_HCLK         (0x0 << 2)
0067 #define VIDCON0_CLKSEL_LCD          (0x1 << 2)
0068 #define VIDCON0_CLKSEL_27M          (0x3 << 2)
0069 
0070 #define VIDCON0_ENVID               (1 << 1)
0071 #define VIDCON0_ENVID_F             (1 << 0)
0072 
0073 #define VIDCON1                 0x04
0074 #define VIDCON1_LINECNT_MASK            (0x7ff << 16)
0075 #define VIDCON1_LINECNT_SHIFT           16
0076 #define VIDCON1_LINECNT_GET(_v)         (((_v) >> 16) & 0x7ff)
0077 #define VIDCON1_FSTATUS_EVEN            (1 << 15)
0078 #define VIDCON1_VSTATUS_MASK            (0x3 << 13)
0079 #define VIDCON1_VSTATUS_SHIFT           13
0080 #define VIDCON1_VSTATUS_VSYNC           (0x0 << 13)
0081 #define VIDCON1_VSTATUS_BACKPORCH       (0x1 << 13)
0082 #define VIDCON1_VSTATUS_ACTIVE          (0x2 << 13)
0083 #define VIDCON1_VSTATUS_FRONTPORCH      (0x3 << 13)
0084 #define VIDCON1_VCLK_MASK           (0x3 << 9)
0085 #define VIDCON1_VCLK_HOLD           (0x0 << 9)
0086 #define VIDCON1_VCLK_RUN            (0x1 << 9)
0087 
0088 #define VIDCON1_INV_VCLK            (1 << 7)
0089 #define VIDCON1_INV_HSYNC           (1 << 6)
0090 #define VIDCON1_INV_VSYNC           (1 << 5)
0091 #define VIDCON1_INV_VDEN            (1 << 4)
0092 
0093 /* VIDCON2 */
0094 
0095 #define VIDCON2                 0x08
0096 #define VIDCON2_EN601               (1 << 23)
0097 #define VIDCON2_TVFMTSEL_SW         (1 << 14)
0098 
0099 #define VIDCON2_TVFMTSEL1_MASK          (0x3 << 12)
0100 #define VIDCON2_TVFMTSEL1_SHIFT         12
0101 #define VIDCON2_TVFMTSEL1_RGB           (0x0 << 12)
0102 #define VIDCON2_TVFMTSEL1_YUV422        (0x1 << 12)
0103 #define VIDCON2_TVFMTSEL1_YUV444        (0x2 << 12)
0104 
0105 #define VIDCON2_ORGYCbCr            (1 << 8)
0106 #define VIDCON2_YUVORDCrCb          (1 << 7)
0107 
0108 /* PRTCON (S3C6410)
0109  * Might not be present in the S3C6410 documentation,
0110  * but tests prove it's there almost for sure; shouldn't hurt in any case.
0111  */
0112 #define PRTCON                  0x0c
0113 #define PRTCON_PROTECT              (1 << 11)
0114 
0115 /* VIDTCON0 */
0116 
0117 #define VIDTCON0                0x10
0118 #define VIDTCON0_VBPDE_MASK         (0xff << 24)
0119 #define VIDTCON0_VBPDE_SHIFT            24
0120 #define VIDTCON0_VBPDE_LIMIT            0xff
0121 #define VIDTCON0_VBPDE(_x)          ((_x) << 24)
0122 
0123 #define VIDTCON0_VBPD_MASK          (0xff << 16)
0124 #define VIDTCON0_VBPD_SHIFT         16
0125 #define VIDTCON0_VBPD_LIMIT         0xff
0126 #define VIDTCON0_VBPD(_x)           ((_x) << 16)
0127 
0128 #define VIDTCON0_VFPD_MASK          (0xff << 8)
0129 #define VIDTCON0_VFPD_SHIFT         8
0130 #define VIDTCON0_VFPD_LIMIT         0xff
0131 #define VIDTCON0_VFPD(_x)           ((_x) << 8)
0132 
0133 #define VIDTCON0_VSPW_MASK          (0xff << 0)
0134 #define VIDTCON0_VSPW_SHIFT         0
0135 #define VIDTCON0_VSPW_LIMIT         0xff
0136 #define VIDTCON0_VSPW(_x)           ((_x) << 0)
0137 
0138 /* VIDTCON1 */
0139 
0140 #define VIDTCON1                0x14
0141 #define VIDTCON1_VFPDE_MASK         (0xff << 24)
0142 #define VIDTCON1_VFPDE_SHIFT            24
0143 #define VIDTCON1_VFPDE_LIMIT            0xff
0144 #define VIDTCON1_VFPDE(_x)          ((_x) << 24)
0145 
0146 #define VIDTCON1_HBPD_MASK          (0xff << 16)
0147 #define VIDTCON1_HBPD_SHIFT         16
0148 #define VIDTCON1_HBPD_LIMIT         0xff
0149 #define VIDTCON1_HBPD(_x)           ((_x) << 16)
0150 
0151 #define VIDTCON1_HFPD_MASK          (0xff << 8)
0152 #define VIDTCON1_HFPD_SHIFT         8
0153 #define VIDTCON1_HFPD_LIMIT         0xff
0154 #define VIDTCON1_HFPD(_x)           ((_x) << 8)
0155 
0156 #define VIDTCON1_HSPW_MASK          (0xff << 0)
0157 #define VIDTCON1_HSPW_SHIFT         0
0158 #define VIDTCON1_HSPW_LIMIT         0xff
0159 #define VIDTCON1_HSPW(_x)           ((_x) << 0)
0160 
0161 #define VIDTCON2                0x18
0162 #define VIDTCON2_LINEVAL_E(_x)          ((((_x) & 0x800) >> 11) << 23)
0163 #define VIDTCON2_LINEVAL_MASK           (0x7ff << 11)
0164 #define VIDTCON2_LINEVAL_SHIFT          11
0165 #define VIDTCON2_LINEVAL_LIMIT          0x7ff
0166 #define VIDTCON2_LINEVAL(_x)            (((_x) & 0x7ff) << 11)
0167 
0168 #define VIDTCON2_HOZVAL_E(_x)           ((((_x) & 0x800) >> 11) << 22)
0169 #define VIDTCON2_HOZVAL_MASK            (0x7ff << 0)
0170 #define VIDTCON2_HOZVAL_SHIFT           0
0171 #define VIDTCON2_HOZVAL_LIMIT           0x7ff
0172 #define VIDTCON2_HOZVAL(_x)         (((_x) & 0x7ff) << 0)
0173 
0174 /* WINCONx */
0175 
0176 #define WINCON(_win)                (0x20 + ((_win) * 4))
0177 #define WINCONx_CSCCON_EQ601            (0x0 << 28)
0178 #define WINCONx_CSCCON_EQ709            (0x1 << 28)
0179 #define WINCONx_CSCWIDTH_MASK           (0x3 << 26)
0180 #define WINCONx_CSCWIDTH_SHIFT          26
0181 #define WINCONx_CSCWIDTH_WIDE           (0x0 << 26)
0182 #define WINCONx_CSCWIDTH_NARROW         (0x3 << 26)
0183 #define WINCONx_ENLOCAL             (1 << 22)
0184 #define WINCONx_BUFSTATUS           (1 << 21)
0185 #define WINCONx_BUFSEL              (1 << 20)
0186 #define WINCONx_BUFAUTOEN           (1 << 19)
0187 #define WINCONx_BITSWP              (1 << 18)
0188 #define WINCONx_BYTSWP              (1 << 17)
0189 #define WINCONx_HAWSWP              (1 << 16)
0190 #define WINCONx_WSWP                (1 << 15)
0191 #define WINCONx_YCbCr               (1 << 13)
0192 #define WINCONx_BURSTLEN_MASK           (0x3 << 9)
0193 #define WINCONx_BURSTLEN_SHIFT          9
0194 #define WINCONx_BURSTLEN_16WORD         (0x0 << 9)
0195 #define WINCONx_BURSTLEN_8WORD          (0x1 << 9)
0196 #define WINCONx_BURSTLEN_4WORD          (0x2 << 9)
0197 #define WINCONx_ENWIN               (1 << 0)
0198 #define WINCONx_BLEND_MODE_MASK         (0xc2)
0199 
0200 #define WINCON0_BPPMODE_MASK            (0xf << 2)
0201 #define WINCON0_BPPMODE_SHIFT           2
0202 #define WINCON0_BPPMODE_1BPP            (0x0 << 2)
0203 #define WINCON0_BPPMODE_2BPP            (0x1 << 2)
0204 #define WINCON0_BPPMODE_4BPP            (0x2 << 2)
0205 #define WINCON0_BPPMODE_8BPP_PALETTE        (0x3 << 2)
0206 #define WINCON0_BPPMODE_16BPP_565       (0x5 << 2)
0207 #define WINCON0_BPPMODE_16BPP_1555      (0x7 << 2)
0208 #define WINCON0_BPPMODE_18BPP_666       (0x8 << 2)
0209 #define WINCON0_BPPMODE_24BPP_888       (0xb << 2)
0210 
0211 #define WINCON1_LOCALSEL_CAMIF          (1 << 23)
0212 #define WINCON1_ALPHA_MUL           (1 << 7)
0213 #define WINCON1_BLD_PIX             (1 << 6)
0214 #define WINCON1_BPPMODE_MASK            (0xf << 2)
0215 #define WINCON1_BPPMODE_SHIFT           2
0216 #define WINCON1_BPPMODE_1BPP            (0x0 << 2)
0217 #define WINCON1_BPPMODE_2BPP            (0x1 << 2)
0218 #define WINCON1_BPPMODE_4BPP            (0x2 << 2)
0219 #define WINCON1_BPPMODE_8BPP_PALETTE        (0x3 << 2)
0220 #define WINCON1_BPPMODE_8BPP_1232       (0x4 << 2)
0221 #define WINCON1_BPPMODE_16BPP_565       (0x5 << 2)
0222 #define WINCON1_BPPMODE_16BPP_A1555     (0x6 << 2)
0223 #define WINCON1_BPPMODE_16BPP_I1555     (0x7 << 2)
0224 #define WINCON1_BPPMODE_18BPP_666       (0x8 << 2)
0225 #define WINCON1_BPPMODE_18BPP_A1665     (0x9 << 2)
0226 #define WINCON1_BPPMODE_19BPP_A1666     (0xa << 2)
0227 #define WINCON1_BPPMODE_24BPP_888       (0xb << 2)
0228 #define WINCON1_BPPMODE_24BPP_A1887     (0xc << 2)
0229 #define WINCON1_BPPMODE_25BPP_A1888     (0xd << 2)
0230 #define WINCON1_BPPMODE_28BPP_A4888     (0xd << 2)
0231 #define WINCON1_ALPHA_SEL           (1 << 1)
0232 
0233 /* S5PV210 */
0234 #define SHADOWCON               0x34
0235 #define SHADOWCON_WINx_PROTECT(_win)        (1 << (10 + (_win)))
0236 /* DMA channels (all windows) */
0237 #define SHADOWCON_CHx_ENABLE(_win)      (1 << (_win))
0238 /* Local input channels (windows 0-2) */
0239 #define SHADOWCON_CHx_LOCAL_ENABLE(_win)    (1 << (5 + (_win)))
0240 
0241 /* VIDOSDx */
0242 
0243 #define VIDOSD_BASE             0x40
0244 #define VIDOSDxA_TOPLEFT_X_E(_x)        ((((_x) & 0x800) >> 11) << 23)
0245 #define VIDOSDxA_TOPLEFT_X_MASK         (0x7ff << 11)
0246 #define VIDOSDxA_TOPLEFT_X_SHIFT        11
0247 #define VIDOSDxA_TOPLEFT_X_LIMIT        0x7ff
0248 #define VIDOSDxA_TOPLEFT_X(_x)          (((_x) & 0x7ff) << 11)
0249 
0250 #define VIDOSDxA_TOPLEFT_Y_E(_x)        ((((_x) & 0x800) >> 11) << 22)
0251 #define VIDOSDxA_TOPLEFT_Y_MASK         (0x7ff << 0)
0252 #define VIDOSDxA_TOPLEFT_Y_SHIFT        0
0253 #define VIDOSDxA_TOPLEFT_Y_LIMIT        0x7ff
0254 #define VIDOSDxA_TOPLEFT_Y(_x)          (((_x) & 0x7ff) << 0)
0255 
0256 #define VIDOSDxB_BOTRIGHT_X_E(_x)       ((((_x) & 0x800) >> 11) << 23)
0257 #define VIDOSDxB_BOTRIGHT_X_MASK        (0x7ff << 11)
0258 #define VIDOSDxB_BOTRIGHT_X_SHIFT       11
0259 #define VIDOSDxB_BOTRIGHT_X_LIMIT       0x7ff
0260 #define VIDOSDxB_BOTRIGHT_X(_x)         (((_x) & 0x7ff) << 11)
0261 
0262 #define VIDOSDxB_BOTRIGHT_Y_E(_x)       ((((_x) & 0x800) >> 11) << 22)
0263 #define VIDOSDxB_BOTRIGHT_Y_MASK        (0x7ff << 0)
0264 #define VIDOSDxB_BOTRIGHT_Y_SHIFT       0
0265 #define VIDOSDxB_BOTRIGHT_Y_LIMIT       0x7ff
0266 #define VIDOSDxB_BOTRIGHT_Y(_x)         (((_x) & 0x7ff) << 0)
0267 
0268 /* For VIDOSD[1..4]C */
0269 #define VIDISD14C_ALPHA0_R(_x)          ((_x) << 20)
0270 #define VIDISD14C_ALPHA0_G_MASK         (0xf << 16)
0271 #define VIDISD14C_ALPHA0_G_SHIFT        16
0272 #define VIDISD14C_ALPHA0_G_LIMIT        0xf
0273 #define VIDISD14C_ALPHA0_G(_x)          ((_x) << 16)
0274 #define VIDISD14C_ALPHA0_B_MASK         (0xf << 12)
0275 #define VIDISD14C_ALPHA0_B_SHIFT        12
0276 #define VIDISD14C_ALPHA0_B_LIMIT        0xf
0277 #define VIDISD14C_ALPHA0_B(_x)          ((_x) << 12)
0278 #define VIDISD14C_ALPHA1_R_MASK         (0xf << 8)
0279 #define VIDISD14C_ALPHA1_R_SHIFT        8
0280 #define VIDISD14C_ALPHA1_R_LIMIT        0xf
0281 #define VIDISD14C_ALPHA1_R(_x)          ((_x) << 8)
0282 #define VIDISD14C_ALPHA1_G_MASK         (0xf << 4)
0283 #define VIDISD14C_ALPHA1_G_SHIFT        4
0284 #define VIDISD14C_ALPHA1_G_LIMIT        0xf
0285 #define VIDISD14C_ALPHA1_G(_x)          ((_x) << 4)
0286 #define VIDISD14C_ALPHA1_B_MASK         (0xf << 0)
0287 #define VIDISD14C_ALPHA1_B_SHIFT        0
0288 #define VIDISD14C_ALPHA1_B_LIMIT        0xf
0289 #define VIDISD14C_ALPHA1_B(_x)          ((_x) << 0)
0290 
0291 #define VIDW_ALPHA              0x021c
0292 #define VIDW_ALPHA_R(_x)            ((_x) << 16)
0293 #define VIDW_ALPHA_G(_x)            ((_x) << 8)
0294 #define VIDW_ALPHA_B(_x)            ((_x) << 0)
0295 
0296 /* Video buffer addresses */
0297 #define VIDW_BUF_START(_buff)           (0xA0 + ((_buff) * 8))
0298 #define VIDW_BUF_START_S(_buff)         (0x40A0 + ((_buff) * 8))
0299 #define VIDW_BUF_START1(_buff)          (0xA4 + ((_buff) * 8))
0300 #define VIDW_BUF_END(_buff)         (0xD0 + ((_buff) * 8))
0301 #define VIDW_BUF_END1(_buff)            (0xD4 + ((_buff) * 8))
0302 #define VIDW_BUF_SIZE(_buff)            (0x100 + ((_buff) * 4))
0303 
0304 #define VIDW_BUF_SIZE_OFFSET_E(_x)      ((((_x) & 0x2000) >> 13) << 27)
0305 #define VIDW_BUF_SIZE_OFFSET_MASK       (0x1fff << 13)
0306 #define VIDW_BUF_SIZE_OFFSET_SHIFT      13
0307 #define VIDW_BUF_SIZE_OFFSET_LIMIT      0x1fff
0308 #define VIDW_BUF_SIZE_OFFSET(_x)        (((_x) & 0x1fff) << 13)
0309 
0310 #define VIDW_BUF_SIZE_PAGEWIDTH_E(_x)       ((((_x) & 0x2000) >> 13) << 26)
0311 #define VIDW_BUF_SIZE_PAGEWIDTH_MASK        (0x1fff << 0)
0312 #define VIDW_BUF_SIZE_PAGEWIDTH_SHIFT       0
0313 #define VIDW_BUF_SIZE_PAGEWIDTH_LIMIT       0x1fff
0314 #define VIDW_BUF_SIZE_PAGEWIDTH(_x)     (((_x) & 0x1fff) << 0)
0315 
0316 /* Interrupt controls and status */
0317 
0318 #define VIDINTCON0              0x130
0319 #define VIDINTCON0_FIFOINTERVAL_MASK        (0x3f << 20)
0320 #define VIDINTCON0_FIFOINTERVAL_SHIFT       20
0321 #define VIDINTCON0_FIFOINTERVAL_LIMIT       0x3f
0322 #define VIDINTCON0_FIFOINTERVAL(_x)     ((_x) << 20)
0323 
0324 #define VIDINTCON0_INT_SYSMAINCON       (1 << 19)
0325 #define VIDINTCON0_INT_SYSSUBCON        (1 << 18)
0326 #define VIDINTCON0_INT_I80IFDONE        (1 << 17)
0327 
0328 #define VIDINTCON0_FRAMESEL0_MASK       (0x3 << 15)
0329 #define VIDINTCON0_FRAMESEL0_SHIFT      15
0330 #define VIDINTCON0_FRAMESEL0_BACKPORCH      (0x0 << 15)
0331 #define VIDINTCON0_FRAMESEL0_VSYNC      (0x1 << 15)
0332 #define VIDINTCON0_FRAMESEL0_ACTIVE     (0x2 << 15)
0333 #define VIDINTCON0_FRAMESEL0_FRONTPORCH     (0x3 << 15)
0334 
0335 #define VIDINTCON0_FRAMESEL1            (1 << 13)
0336 #define VIDINTCON0_FRAMESEL1_MASK       (0x3 << 13)
0337 #define VIDINTCON0_FRAMESEL1_NONE       (0x0 << 13)
0338 #define VIDINTCON0_FRAMESEL1_BACKPORCH      (0x1 << 13)
0339 #define VIDINTCON0_FRAMESEL1_VSYNC      (0x2 << 13)
0340 #define VIDINTCON0_FRAMESEL1_FRONTPORCH     (0x3 << 13)
0341 
0342 #define VIDINTCON0_INT_FRAME            (1 << 12)
0343 #define VIDINTCON0_FIFIOSEL_MASK        (0x7f << 5)
0344 #define VIDINTCON0_FIFIOSEL_SHIFT       5
0345 #define VIDINTCON0_FIFIOSEL_WINDOW0     (0x1 << 5)
0346 #define VIDINTCON0_FIFIOSEL_WINDOW1     (0x2 << 5)
0347 #define VIDINTCON0_FIFIOSEL_WINDOW2     (0x10 << 5)
0348 #define VIDINTCON0_FIFIOSEL_WINDOW3     (0x20 << 5)
0349 #define VIDINTCON0_FIFIOSEL_WINDOW4     (0x40 << 5)
0350 
0351 #define VIDINTCON0_FIFOLEVEL_MASK       (0x7 << 2)
0352 #define VIDINTCON0_FIFOLEVEL_SHIFT      2
0353 #define VIDINTCON0_FIFOLEVEL_TO25PC     (0x0 << 2)
0354 #define VIDINTCON0_FIFOLEVEL_TO50PC     (0x1 << 2)
0355 #define VIDINTCON0_FIFOLEVEL_TO75PC     (0x2 << 2)
0356 #define VIDINTCON0_FIFOLEVEL_EMPTY      (0x3 << 2)
0357 #define VIDINTCON0_FIFOLEVEL_FULL       (0x4 << 2)
0358 
0359 #define VIDINTCON0_INT_FIFO_MASK        (0x3 << 0)
0360 #define VIDINTCON0_INT_FIFO_SHIFT       0
0361 #define VIDINTCON0_INT_ENABLE           (1 << 0)
0362 
0363 #define VIDINTCON1              0x134
0364 #define VIDINTCON1_INT_I80          (1 << 2)
0365 #define VIDINTCON1_INT_FRAME            (1 << 1)
0366 #define VIDINTCON1_INT_FIFO         (1 << 0)
0367 
0368 /* Window colour-key control registers */
0369 #define WKEYCON                 0x140
0370 
0371 #define WKEYCON0                0x00
0372 #define WKEYCON1                0x04
0373 
0374 #define WxKEYCON0_KEYBL_EN          (1 << 26)
0375 #define WxKEYCON0_KEYEN_F           (1 << 25)
0376 #define WxKEYCON0_DIRCON            (1 << 24)
0377 #define WxKEYCON0_COMPKEY_MASK          (0xffffff << 0)
0378 #define WxKEYCON0_COMPKEY_SHIFT         0
0379 #define WxKEYCON0_COMPKEY_LIMIT         0xffffff
0380 #define WxKEYCON0_COMPKEY(_x)           ((_x) << 0)
0381 #define WxKEYCON1_COLVAL_MASK           (0xffffff << 0)
0382 #define WxKEYCON1_COLVAL_SHIFT          0
0383 #define WxKEYCON1_COLVAL_LIMIT          0xffffff
0384 #define WxKEYCON1_COLVAL(_x)            ((_x) << 0)
0385 
0386 /* Dithering control */
0387 #define DITHMODE                0x170
0388 #define DITHMODE_R_POS_MASK         (0x3 << 5)
0389 #define DITHMODE_R_POS_SHIFT            5
0390 #define DITHMODE_R_POS_8BIT         (0x0 << 5)
0391 #define DITHMODE_R_POS_6BIT         (0x1 << 5)
0392 #define DITHMODE_R_POS_5BIT         (0x2 << 5)
0393 #define DITHMODE_G_POS_MASK         (0x3 << 3)
0394 #define DITHMODE_G_POS_SHIFT            3
0395 #define DITHMODE_G_POS_8BIT         (0x0 << 3)
0396 #define DITHMODE_G_POS_6BIT         (0x1 << 3)
0397 #define DITHMODE_G_POS_5BIT         (0x2 << 3)
0398 #define DITHMODE_B_POS_MASK         (0x3 << 1)
0399 #define DITHMODE_B_POS_SHIFT            1
0400 #define DITHMODE_B_POS_8BIT         (0x0 << 1)
0401 #define DITHMODE_B_POS_6BIT         (0x1 << 1)
0402 #define DITHMODE_B_POS_5BIT         (0x2 << 1)
0403 #define DITHMODE_DITH_EN            (1 << 0)
0404 
0405 /* Window blanking (MAP) */
0406 #define WINxMAP(_win)               (0x180 + ((_win) * 4))
0407 #define WINxMAP_MAP             (1 << 24)
0408 #define WINxMAP_MAP_COLOUR_MASK         (0xffffff << 0)
0409 #define WINxMAP_MAP_COLOUR_SHIFT        0
0410 #define WINxMAP_MAP_COLOUR_LIMIT        0xffffff
0411 #define WINxMAP_MAP_COLOUR(_x)          ((_x) << 0)
0412 
0413 /* Winodw palette control */
0414 #define WPALCON                 0x1A0
0415 #define WPALCON_PAL_UPDATE          (1 << 9)
0416 #define WPALCON_W4PAL_16BPP_A555        (1 << 8)
0417 #define WPALCON_W3PAL_16BPP_A555        (1 << 7)
0418 #define WPALCON_W2PAL_16BPP_A555        (1 << 6)
0419 #define WPALCON_W1PAL_MASK          (0x7 << 3)
0420 #define WPALCON_W1PAL_SHIFT         3
0421 #define WPALCON_W1PAL_25BPP_A888        (0x0 << 3)
0422 #define WPALCON_W1PAL_24BPP         (0x1 << 3)
0423 #define WPALCON_W1PAL_19BPP_A666        (0x2 << 3)
0424 #define WPALCON_W1PAL_18BPP_A665        (0x3 << 3)
0425 #define WPALCON_W1PAL_18BPP         (0x4 << 3)
0426 #define WPALCON_W1PAL_16BPP_A555        (0x5 << 3)
0427 #define WPALCON_W1PAL_16BPP_565         (0x6 << 3)
0428 #define WPALCON_W0PAL_MASK          (0x7 << 0)
0429 #define WPALCON_W0PAL_SHIFT         0
0430 #define WPALCON_W0PAL_25BPP_A888        (0x0 << 0)
0431 #define WPALCON_W0PAL_24BPP         (0x1 << 0)
0432 #define WPALCON_W0PAL_19BPP_A666        (0x2 << 0)
0433 #define WPALCON_W0PAL_18BPP_A665        (0x3 << 0)
0434 #define WPALCON_W0PAL_18BPP         (0x4 << 0)
0435 #define WPALCON_W0PAL_16BPP_A555        (0x5 << 0)
0436 #define WPALCON_W0PAL_16BPP_565         (0x6 << 0)
0437 
0438 /* Blending equation control */
0439 #define BLENDEQx(_win)              (0x244 + ((_win - 1) * 4))
0440 #define BLENDEQ_ZERO                0x0
0441 #define BLENDEQ_ONE             0x1
0442 #define BLENDEQ_ALPHA_A             0x2
0443 #define BLENDEQ_ONE_MINUS_ALPHA_A       0x3
0444 #define BLENDEQ_ALPHA0              0x6
0445 #define BLENDEQ_B_FUNC_F(_x)            (_x << 6)
0446 #define BLENDEQ_A_FUNC_F(_x)            (_x << 0)
0447 #define BLENDCON                0x260
0448 #define BLENDCON_NEW_MASK           (1 << 0)
0449 #define BLENDCON_NEW_8BIT_ALPHA_VALUE       (1 << 0)
0450 #define BLENDCON_NEW_4BIT_ALPHA_VALUE       (0 << 0)
0451 
0452 /* Display port clock control */
0453 #define DP_MIE_CLKCON               0x27c
0454 #define DP_MIE_CLK_DISABLE          0x0
0455 #define DP_MIE_CLK_DP_ENABLE            0x2
0456 #define DP_MIE_CLK_MIE_ENABLE           0x3
0457 
0458 /* Notes on per-window bpp settings
0459  *
0460  * Value    Win0     Win1     Win2     Win3     Win 4
0461  * 0000     1(P)     1(P)     1(P)     1(P)     1(P)
0462  * 0001     2(P)     2(P)     2(P)     2(P)     2(P)
0463  * 0010     4(P)     4(P)     4(P)     4(P)     -none-
0464  * 0011     8(P)     8(P)     -none-   -none-   -none-
0465  * 0100     -none-   8(A232)  8(A232)  -none-   -none-
0466  * 0101     16(565)  16(565)  16(565)  16(565)   16(565)
0467  * 0110     -none-   16(A555) 16(A555) 16(A555)  16(A555)
0468  * 0111     16(I555) 16(I565) 16(I555) 16(I555)  16(I555)
0469  * 1000     18(666)  18(666)  18(666)  18(666)   18(666)
0470  * 1001     -none-   18(A665) 18(A665) 18(A665)  16(A665)
0471  * 1010     -none-   19(A666) 19(A666) 19(A666)  19(A666)
0472  * 1011     24(888)  24(888)  24(888)  24(888)   24(888)
0473  * 1100     -none-   24(A887) 24(A887) 24(A887)  24(A887)
0474  * 1101     -none-   25(A888) 25(A888) 25(A888)  25(A888)
0475  * 1110     -none-   -none-   -none-   -none-    -none-
0476  * 1111     -none-   -none-   -none-   -none-    -none-
0477 */
0478 
0479 #define WIN_RGB_ORDER(_win)         (0x2020 + ((_win) * 4))
0480 #define WIN_RGB_ORDER_FORWARD           (0 << 11)
0481 #define WIN_RGB_ORDER_REVERSE           (1 << 11)
0482 
0483 /* FIMD Version 8 register offset definitions */
0484 #define FIMD_V8_VIDTCON0    0x20010
0485 #define FIMD_V8_VIDTCON1    0x20014
0486 #define FIMD_V8_VIDTCON2    0x20018
0487 #define FIMD_V8_VIDTCON3    0x2001C
0488 #define FIMD_V8_VIDCON1     0x20004