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0001 /* 0002 * Phase5 CybervisionPPC (TVP4020) definitions for the Permedia2 framebuffer 0003 * driver. 0004 * 0005 * Copyright (c) 1998-1999 Ilario Nardinocchi (nardinoc@CS.UniBO.IT) 0006 * -------------------------------------------------------------------------- 0007 * $Id: cvisionppc.h,v 1.8 1999/01/28 13:18:07 illo Exp $ 0008 * -------------------------------------------------------------------------- 0009 * This file is subject to the terms and conditions of the GNU General Public 0010 * License. See the file COPYING in the main directory of this archive 0011 * for more details. 0012 */ 0013 0014 #ifndef CVISIONPPC_H 0015 #define CVISIONPPC_H 0016 0017 #ifndef PM2FB_H 0018 #include "pm2fb.h" 0019 #endif 0020 0021 struct cvppc_par { 0022 unsigned char* pci_config; 0023 unsigned char* pci_bridge; 0024 u32 user_flags; 0025 }; 0026 0027 #define CSPPC_PCI_BRIDGE 0xfffe0000 0028 #define CSPPC_BRIDGE_ENDIAN 0x0000 0029 #define CSPPC_BRIDGE_INT 0x0010 0030 0031 #define CVPPC_PCI_CONFIG 0xfffc0000 0032 #define CVPPC_ROM_ADDRESS 0xe2000001 0033 #define CVPPC_REGS_REGION 0xef000000 0034 #define CVPPC_FB_APERTURE_ONE 0xe0000000 0035 #define CVPPC_FB_APERTURE_TWO 0xe1000000 0036 #define CVPPC_FB_SIZE 0x00800000 0037 #define CVPPC_MEM_CONFIG_OLD 0xed61fcaa /* FIXME Fujitsu?? */ 0038 #define CVPPC_MEM_CONFIG_NEW 0xed41c532 /* FIXME USA?? */ 0039 #define CVPPC_MEMCLOCK 83000 /* in KHz */ 0040 0041 /* CVPPC_BRIDGE_ENDIAN */ 0042 #define CSPPCF_BRIDGE_BIG_ENDIAN 0x02 0043 0044 /* CVPPC_BRIDGE_INT */ 0045 #define CSPPCF_BRIDGE_ACTIVE_INT2 0x01 0046 0047 #endif /* CVISIONPPC_H */ 0048 0049 /***************************************************************************** 0050 * That's all folks! 0051 *****************************************************************************/
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