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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  *  Header file for AT91/AT32 LCD Controller
0004  *
0005  *  Data structure and register user interface
0006  *
0007  *  Copyright (C) 2007 Atmel Corporation
0008  */
0009 #ifndef __ATMEL_LCDC_H__
0010 #define __ATMEL_LCDC_H__
0011 
0012 #include <linux/workqueue.h>
0013 
0014 /* Way LCD wires are connected to the chip:
0015  * Some Atmel chips use BGR color mode (instead of standard RGB)
0016  * A swapped wiring onboard can bring to RGB mode.
0017  */
0018 #define ATMEL_LCDC_WIRING_BGR   0
0019 #define ATMEL_LCDC_WIRING_RGB   1
0020 
0021 
0022  /* LCD Controller info data structure, stored in device platform_data */
0023 struct atmel_lcdfb_pdata {
0024     unsigned int        guard_time;
0025     bool            lcdcon_is_backlight;
0026     bool            lcdcon_pol_negative;
0027     u8          default_bpp;
0028     u8          lcd_wiring_mode;
0029     unsigned int        default_lcdcon2;
0030     unsigned int        default_dmacon;
0031     void (*atmel_lcdfb_power_control)(struct atmel_lcdfb_pdata *pdata, int on);
0032     struct fb_monspecs  *default_monspecs;
0033 
0034     struct list_head    pwr_gpios;
0035 };
0036 
0037 #define ATMEL_LCDC_DMABADDR1    0x00
0038 #define ATMEL_LCDC_DMABADDR2    0x04
0039 #define ATMEL_LCDC_DMAFRMPT1    0x08
0040 #define ATMEL_LCDC_DMAFRMPT2    0x0c
0041 #define ATMEL_LCDC_DMAFRMADD1   0x10
0042 #define ATMEL_LCDC_DMAFRMADD2   0x14
0043 
0044 #define ATMEL_LCDC_DMAFRMCFG    0x18
0045 #define ATMEL_LCDC_FRSIZE   (0x7fffff <<  0)
0046 #define ATMEL_LCDC_BLENGTH_OFFSET   24
0047 #define ATMEL_LCDC_BLENGTH  (0x7f     << ATMEL_LCDC_BLENGTH_OFFSET)
0048 
0049 #define ATMEL_LCDC_DMACON   0x1c
0050 #define ATMEL_LCDC_DMAEN    (0x1 << 0)
0051 #define ATMEL_LCDC_DMARST   (0x1 << 1)
0052 #define ATMEL_LCDC_DMABUSY  (0x1 << 2)
0053 #define     ATMEL_LCDC_DMAUPDT  (0x1 << 3)
0054 #define     ATMEL_LCDC_DMA2DEN  (0x1 << 4)
0055 
0056 #define ATMEL_LCDC_DMA2DCFG 0x20
0057 #define     ATMEL_LCDC_ADDRINC_OFFSET   0
0058 #define     ATMEL_LCDC_ADDRINC      (0xffff)
0059 #define     ATMEL_LCDC_PIXELOFF_OFFSET  24
0060 #define     ATMEL_LCDC_PIXELOFF     (0x1f << 24)
0061 
0062 #define ATMEL_LCDC_LCDCON1  0x0800
0063 #define ATMEL_LCDC_BYPASS   (1     <<  0)
0064 #define ATMEL_LCDC_CLKVAL_OFFSET    12
0065 #define ATMEL_LCDC_CLKVAL   (0x1ff << ATMEL_LCDC_CLKVAL_OFFSET)
0066 #define ATMEL_LCDC_LINCNT   (0x7ff << 21)
0067 
0068 #define ATMEL_LCDC_LCDCON2  0x0804
0069 #define ATMEL_LCDC_DISTYPE  (3 << 0)
0070 #define     ATMEL_LCDC_DISTYPE_STNMONO  (0 << 0)
0071 #define     ATMEL_LCDC_DISTYPE_STNCOLOR (1 << 0)
0072 #define     ATMEL_LCDC_DISTYPE_TFT      (2 << 0)
0073 #define ATMEL_LCDC_SCANMOD  (1 << 2)
0074 #define     ATMEL_LCDC_SCANMOD_SINGLE   (0 << 2)
0075 #define     ATMEL_LCDC_SCANMOD_DUAL     (1 << 2)
0076 #define ATMEL_LCDC_IFWIDTH  (3 << 3)
0077 #define     ATMEL_LCDC_IFWIDTH_4        (0 << 3)
0078 #define     ATMEL_LCDC_IFWIDTH_8        (1 << 3)
0079 #define     ATMEL_LCDC_IFWIDTH_16       (2 << 3)
0080 #define ATMEL_LCDC_PIXELSIZE    (7 << 5)
0081 #define     ATMEL_LCDC_PIXELSIZE_1      (0 << 5)
0082 #define     ATMEL_LCDC_PIXELSIZE_2      (1 << 5)
0083 #define     ATMEL_LCDC_PIXELSIZE_4      (2 << 5)
0084 #define     ATMEL_LCDC_PIXELSIZE_8      (3 << 5)
0085 #define     ATMEL_LCDC_PIXELSIZE_16     (4 << 5)
0086 #define     ATMEL_LCDC_PIXELSIZE_24     (5 << 5)
0087 #define     ATMEL_LCDC_PIXELSIZE_32     (6 << 5)
0088 #define ATMEL_LCDC_INVVD    (1 << 8)
0089 #define     ATMEL_LCDC_INVVD_NORMAL     (0 << 8)
0090 #define     ATMEL_LCDC_INVVD_INVERTED   (1 << 8)
0091 #define ATMEL_LCDC_INVFRAME (1 << 9 )
0092 #define     ATMEL_LCDC_INVFRAME_NORMAL  (0 << 9)
0093 #define     ATMEL_LCDC_INVFRAME_INVERTED    (1 << 9)
0094 #define ATMEL_LCDC_INVLINE  (1 << 10)
0095 #define     ATMEL_LCDC_INVLINE_NORMAL   (0 << 10)
0096 #define     ATMEL_LCDC_INVLINE_INVERTED (1 << 10)
0097 #define ATMEL_LCDC_INVCLK   (1 << 11)
0098 #define     ATMEL_LCDC_INVCLK_NORMAL    (0 << 11)
0099 #define     ATMEL_LCDC_INVCLK_INVERTED  (1 << 11)
0100 #define ATMEL_LCDC_INVDVAL  (1 << 12)
0101 #define     ATMEL_LCDC_INVDVAL_NORMAL   (0 << 12)
0102 #define     ATMEL_LCDC_INVDVAL_INVERTED (1 << 12)
0103 #define ATMEL_LCDC_CLKMOD   (1 << 15)
0104 #define     ATMEL_LCDC_CLKMOD_ACTIVEDISPLAY (0 << 15)
0105 #define     ATMEL_LCDC_CLKMOD_ALWAYSACTIVE  (1 << 15)
0106 #define ATMEL_LCDC_MEMOR    (1 << 31)
0107 #define     ATMEL_LCDC_MEMOR_BIG        (0 << 31)
0108 #define     ATMEL_LCDC_MEMOR_LITTLE     (1 << 31)
0109 
0110 #define ATMEL_LCDC_TIM1     0x0808
0111 #define ATMEL_LCDC_VFP      (0xffU <<  0)
0112 #define ATMEL_LCDC_VBP_OFFSET       8
0113 #define ATMEL_LCDC_VBP      (0xffU <<  ATMEL_LCDC_VBP_OFFSET)
0114 #define ATMEL_LCDC_VPW_OFFSET       16
0115 #define ATMEL_LCDC_VPW      (0x3fU << ATMEL_LCDC_VPW_OFFSET)
0116 #define ATMEL_LCDC_VHDLY_OFFSET     24
0117 #define ATMEL_LCDC_VHDLY    (0xfU  << ATMEL_LCDC_VHDLY_OFFSET)
0118 
0119 #define ATMEL_LCDC_TIM2     0x080c
0120 #define ATMEL_LCDC_HBP      (0xffU  <<  0)
0121 #define ATMEL_LCDC_HPW_OFFSET       8
0122 #define ATMEL_LCDC_HPW      (0x3fU  <<  ATMEL_LCDC_HPW_OFFSET)
0123 #define ATMEL_LCDC_HFP_OFFSET       21
0124 #define ATMEL_LCDC_HFP      (0x7ffU << ATMEL_LCDC_HFP_OFFSET)
0125 
0126 #define ATMEL_LCDC_LCDFRMCFG    0x0810
0127 #define ATMEL_LCDC_LINEVAL  (0x7ff <<  0)
0128 #define ATMEL_LCDC_HOZVAL_OFFSET    21
0129 #define ATMEL_LCDC_HOZVAL   (0x7ff << ATMEL_LCDC_HOZVAL_OFFSET)
0130 
0131 #define ATMEL_LCDC_FIFO     0x0814
0132 #define ATMEL_LCDC_FIFOTH   (0xffff)
0133 
0134 #define ATMEL_LCDC_MVAL     0x0818
0135 
0136 #define ATMEL_LCDC_DP1_2    0x081c
0137 #define ATMEL_LCDC_DP4_7    0x0820
0138 #define ATMEL_LCDC_DP3_5    0x0824
0139 #define ATMEL_LCDC_DP2_3    0x0828
0140 #define ATMEL_LCDC_DP5_7    0x082c
0141 #define ATMEL_LCDC_DP3_4    0x0830
0142 #define ATMEL_LCDC_DP4_5    0x0834
0143 #define ATMEL_LCDC_DP6_7    0x0838
0144 #define ATMEL_LCDC_DP1_2_VAL    (0xff)
0145 #define ATMEL_LCDC_DP4_7_VAL    (0xfffffff)
0146 #define ATMEL_LCDC_DP3_5_VAL    (0xfffff)
0147 #define ATMEL_LCDC_DP2_3_VAL    (0xfff)
0148 #define ATMEL_LCDC_DP5_7_VAL    (0xfffffff)
0149 #define ATMEL_LCDC_DP3_4_VAL    (0xffff)
0150 #define ATMEL_LCDC_DP4_5_VAL    (0xfffff)
0151 #define ATMEL_LCDC_DP6_7_VAL    (0xfffffff)
0152 
0153 #define ATMEL_LCDC_PWRCON   0x083c
0154 #define ATMEL_LCDC_PWR      (1    <<  0)
0155 #define ATMEL_LCDC_GUARDT_OFFSET    1
0156 #define ATMEL_LCDC_GUARDT   (0x7f <<  ATMEL_LCDC_GUARDT_OFFSET)
0157 #define ATMEL_LCDC_BUSY     (1    << 31)
0158 
0159 #define ATMEL_LCDC_CONTRAST_CTR 0x0840
0160 #define ATMEL_LCDC_PS       (3 << 0)
0161 #define     ATMEL_LCDC_PS_DIV1      (0 << 0)
0162 #define     ATMEL_LCDC_PS_DIV2      (1 << 0)
0163 #define     ATMEL_LCDC_PS_DIV4      (2 << 0)
0164 #define     ATMEL_LCDC_PS_DIV8      (3 << 0)
0165 #define ATMEL_LCDC_POL      (1 << 2)
0166 #define     ATMEL_LCDC_POL_NEGATIVE     (0 << 2)
0167 #define     ATMEL_LCDC_POL_POSITIVE     (1 << 2)
0168 #define ATMEL_LCDC_ENA      (1 << 3)
0169 #define     ATMEL_LCDC_ENA_PWMDISABLE   (0 << 3)
0170 #define     ATMEL_LCDC_ENA_PWMENABLE    (1 << 3)
0171 
0172 #define ATMEL_LCDC_CONTRAST_VAL 0x0844
0173 #define ATMEL_LCDC_CVAL (0xff)
0174 
0175 #define ATMEL_LCDC_IER      0x0848
0176 #define ATMEL_LCDC_IDR      0x084c
0177 #define ATMEL_LCDC_IMR      0x0850
0178 #define ATMEL_LCDC_ISR      0x0854
0179 #define ATMEL_LCDC_ICR      0x0858
0180 #define ATMEL_LCDC_LNI      (1 << 0)
0181 #define ATMEL_LCDC_LSTLNI   (1 << 1)
0182 #define ATMEL_LCDC_EOFI     (1 << 2)
0183 #define ATMEL_LCDC_UFLWI    (1 << 4)
0184 #define ATMEL_LCDC_OWRI     (1 << 5)
0185 #define ATMEL_LCDC_MERI     (1 << 6)
0186 
0187 #define ATMEL_LCDC_LUT(n)   (0x0c00 + ((n)*4))
0188 
0189 #endif /* __ATMEL_LCDC_H__ */