uapi/scsi/scsi_bsg_mpi3mr.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later WITH Linux-syscall-note */
0002 /*
0003  * Driver for Broadcom MPI3 Storage Controllers
0004  *
0005  * Copyright (C) 2017-2022 Broadcom Inc.
0006  *  (mailto: mpi3mr-linuxdrv.pdl@broadcom.com)
0007  *
0008  */
0009
0010 #ifndef SCSI_BSG_MPI3MR_H_INCLUDED
0011 #define SCSI_BSG_MPI3MR_H_INCLUDED
0012
0013 #include <linux/types.h>
0014
0015 /* Definitions for BSG commands */
0016 #define MPI3MR_IOCTL_VERSION            0x06
0017
0018 #define MPI3MR_APP_DEFAULT_TIMEOUT      (60) /*seconds*/
0019
0020 #define MPI3MR_BSG_ADPTYPE_UNKNOWN      0
0021 #define MPI3MR_BSG_ADPTYPE_AVGFAMILY        1
0022
0023 #define MPI3MR_BSG_ADPSTATE_UNKNOWN     0
0024 #define MPI3MR_BSG_ADPSTATE_OPERATIONAL     1
0025 #define MPI3MR_BSG_ADPSTATE_FAULT       2
0026 #define MPI3MR_BSG_ADPSTATE_IN_RESET        3
0027 #define MPI3MR_BSG_ADPSTATE_UNRECOVERABLE   4
0028
0029 #define MPI3MR_BSG_ADPRESET_UNKNOWN     0
0030 #define MPI3MR_BSG_ADPRESET_SOFT        1
0031 #define MPI3MR_BSG_ADPRESET_DIAG_FAULT      2
0032
0033 #define MPI3MR_BSG_LOGDATA_MAX_ENTRIES      400
0034 #define MPI3MR_BSG_LOGDATA_ENTRY_HEADER_SZ  4
0035
0036 #define MPI3MR_DRVBSG_OPCODE_UNKNOWN        0
0037 #define MPI3MR_DRVBSG_OPCODE_ADPINFO        1
0038 #define MPI3MR_DRVBSG_OPCODE_ADPRESET       2
0039 #define MPI3MR_DRVBSG_OPCODE_ALLTGTDEVINFO  4
0040 #define MPI3MR_DRVBSG_OPCODE_GETCHGCNT      5
0041 #define MPI3MR_DRVBSG_OPCODE_LOGDATAENABLE  6
0042 #define MPI3MR_DRVBSG_OPCODE_PELENABLE      7
0043 #define MPI3MR_DRVBSG_OPCODE_GETLOGDATA     8
0044 #define MPI3MR_DRVBSG_OPCODE_QUERY_HDB      9
0045 #define MPI3MR_DRVBSG_OPCODE_REPOST_HDB     10
0046 #define MPI3MR_DRVBSG_OPCODE_UPLOAD_HDB     11
0047 #define MPI3MR_DRVBSG_OPCODE_REFRESH_HDB_TRIGGERS   12
0048
0049
0050 #define MPI3MR_BSG_BUFTYPE_UNKNOWN      0
0051 #define MPI3MR_BSG_BUFTYPE_RAIDMGMT_CMD     1
0052 #define MPI3MR_BSG_BUFTYPE_RAIDMGMT_RESP    2
0053 #define MPI3MR_BSG_BUFTYPE_DATA_IN      3
0054 #define MPI3MR_BSG_BUFTYPE_DATA_OUT     4
0055 #define MPI3MR_BSG_BUFTYPE_MPI_REPLY        5
0056 #define MPI3MR_BSG_BUFTYPE_ERR_RESPONSE     6
0057 #define MPI3MR_BSG_BUFTYPE_MPI_REQUEST      0xFE
0058
0059 #define MPI3MR_BSG_MPI_REPLY_BUFTYPE_UNKNOWN    0
0060 #define MPI3MR_BSG_MPI_REPLY_BUFTYPE_STATUS 1
0061 #define MPI3MR_BSG_MPI_REPLY_BUFTYPE_ADDRESS    2
0062
0063 #define MPI3MR_HDB_BUFTYPE_UNKNOWN      0
0064 #define MPI3MR_HDB_BUFTYPE_TRACE        1
0065 #define MPI3MR_HDB_BUFTYPE_FIRMWARE     2
0066 #define MPI3MR_HDB_BUFTYPE_RESERVED     3
0067
0068 #define MPI3MR_HDB_BUFSTATUS_UNKNOWN        0
0069 #define MPI3MR_HDB_BUFSTATUS_NOT_ALLOCATED  1
0070 #define MPI3MR_HDB_BUFSTATUS_POSTED_UNPAUSED    2
0071 #define MPI3MR_HDB_BUFSTATUS_POSTED_PAUSED  3
0072 #define MPI3MR_HDB_BUFSTATUS_RELEASED       4
0073
0074 #define MPI3MR_HDB_TRIGGER_TYPE_UNKNOWN     0
0075 #define MPI3MR_HDB_TRIGGER_TYPE_DIAGFAULT   1
0076 #define MPI3MR_HDB_TRIGGER_TYPE_ELEMENT     2
0077 #define MPI3MR_HDB_TRIGGER_TYPE_MASTER      3
0078
0079
0080 /* Supported BSG commands */
0081 enum command {
0082     MPI3MR_DRV_CMD = 1,
0083     MPI3MR_MPT_CMD = 2,
0084 };
0085
0086 /**
0087  * struct mpi3_driver_info_layout - Information about driver
0088  *
0089  * @information_length: Length of this structure in bytes
0090  * @driver_signature: Driver Vendor name
0091  * @os_name: Operating System Name
0092  * @driver_name: Driver name
0093  * @driver_version: Driver version
0094  * @driver_release_date: Driver release date
0095  * @driver_capabilities: Driver capabilities
0096  */
0097 struct mpi3_driver_info_layout {
0098     __le32  information_length;
0099     __u8    driver_signature[12];
0100     __u8    os_name[16];
0101     __u8    os_version[12];
0102     __u8    driver_name[20];
0103     __u8    driver_version[32];
0104     __u8    driver_release_date[20];
0105     __le32  driver_capabilities;
0106 };
0107
0108 /**
0109  * struct mpi3mr_bsg_in_adpinfo - Adapter information request
0110  * data returned by the driver.
0111  *
0112  * @adp_type: Adapter type
0113  * @rsvd1: Reserved
0114  * @pci_dev_id: PCI device ID of the adapter
0115  * @pci_dev_hw_rev: PCI revision of the adapter
0116  * @pci_subsys_dev_id: PCI subsystem device ID of the adapter
0117  * @pci_subsys_ven_id: PCI subsystem vendor ID of the adapter
0118  * @pci_dev: PCI device
0119  * @pci_func: PCI function
0120  * @pci_bus: PCI bus
0121  * @rsvd2: Reserved
0122  * @pci_seg_id: PCI segment ID
0123  * @app_intfc_ver: version of the application interface definition
0124  * @rsvd3: Reserved
0125  * @rsvd4: Reserved
0126  * @rsvd5: Reserved
0127  * @driver_info: Driver Information (Version/Name)
0128  */
0129 struct mpi3mr_bsg_in_adpinfo {
0130     __u32   adp_type;
0131     __u32   rsvd1;
0132     __u32   pci_dev_id;
0133     __u32   pci_dev_hw_rev;
0134     __u32   pci_subsys_dev_id;
0135     __u32   pci_subsys_ven_id;
0136     __u32   pci_dev:5;
0137     __u32   pci_func:3;
0138     __u32   pci_bus:8;
0139     __u16   rsvd2;
0140     __u32   pci_seg_id;
0141     __u32   app_intfc_ver;
0142     __u8    adp_state;
0143     __u8    rsvd3;
0144     __u16   rsvd4;
0145     __u32   rsvd5[2];
0146     struct mpi3_driver_info_layout driver_info;
0147 };
0148
0149 /**
0150  * struct mpi3mr_bsg_adp_reset - Adapter reset request
0151  * payload data to the driver.
0152  *
0153  * @reset_type: Reset type
0154  * @rsvd1: Reserved
0155  * @rsvd2: Reserved
0156  */
0157 struct mpi3mr_bsg_adp_reset {
0158     __u8    reset_type;
0159     __u8    rsvd1;
0160     __u16   rsvd2;
0161 };
0162
0163 /**
0164  * struct mpi3mr_change_count - Topology change count
0165  * returned by the driver.
0166  *
0167  * @change_count: Topology change count
0168  * @rsvd: Reserved
0169  */
0170 struct mpi3mr_change_count {
0171     __u16   change_count;
0172     __u16   rsvd;
0173 };
0174
0175 /**
0176  * struct mpi3mr_device_map_info - Target device mapping
0177  * information
0178  *
0179  * @handle: Firmware device handle
0180  * @perst_id: Persistent ID assigned by the firmware
0181  * @target_id: Target ID assigned by the driver
0182  * @bus_id: Bus ID assigned by the driver
0183  * @rsvd1: Reserved
0184  * @rsvd2: Reserved
0185  */
0186 struct mpi3mr_device_map_info {
0187     __u16   handle;
0188     __u16   perst_id;
0189     __u32   target_id;
0190     __u8    bus_id;
0191     __u8    rsvd1;
0192     __u16   rsvd2;
0193 };
0194
0195 /**
0196  * struct mpi3mr_all_tgt_info - Target device mapping
0197  * information returned by the driver
0198  *
0199  * @num_devices: The number of devices in driver's inventory
0200  * @rsvd1: Reserved
0201  * @rsvd2: Reserved
0202  * @dmi: Variable length array of mapping information of targets
0203  */
0204 struct mpi3mr_all_tgt_info {
0205     __u16   num_devices;
0206     __u16   rsvd1;
0207     __u32   rsvd2;
0208     struct mpi3mr_device_map_info dmi[1];
0209 };
0210
0211 /**
0212  * struct mpi3mr_logdata_enable - Number of log data
0213  * entries saved by the driver returned as payload data for
0214  * enable logdata BSG request by the driver.
0215  *
0216  * @max_entries: Number of log data entries cached by the driver
0217  * @rsvd: Reserved
0218  */
0219 struct mpi3mr_logdata_enable {
0220     __u16   max_entries;
0221     __u16   rsvd;
0222 };
0223
0224 /**
0225  * struct mpi3mr_bsg_out_pel_enable - PEL enable request payload
0226  * data to the driver.
0227  *
0228  * @pel_locale: PEL locale to the firmware
0229  * @pel_class: PEL class to the firmware
0230  * @rsvd: Reserved
0231  */
0232 struct mpi3mr_bsg_out_pel_enable {
0233     __u16   pel_locale;
0234     __u8    pel_class;
0235     __u8    rsvd;
0236 };
0237
0238 /**
0239  * struct mpi3mr_logdata_entry - Log data entry cached by the
0240  * driver.
0241  *
0242  * @valid_entry: Is the entry valid
0243  * @rsvd1: Reserved
0244  * @rsvd2: Reserved
0245  * @data: Variable length Log entry data
0246  */
0247 struct mpi3mr_logdata_entry {
0248     __u8    valid_entry;
0249     __u8    rsvd1;
0250     __u16   rsvd2;
0251     __u8    data[1]; /* Variable length Array */
0252 };
0253
0254 /**
0255  * struct mpi3mr_bsg_in_log_data - Log data entries saved by
0256  * the driver returned as payload data for Get logdata request
0257  * by the driver.
0258  *
0259  * @entry: Variable length Log data entry array
0260  */
0261 struct mpi3mr_bsg_in_log_data {
0262     struct mpi3mr_logdata_entry entry[1];
0263 };
0264
0265 /**
0266  * struct mpi3mr_hdb_entry - host diag buffer entry.
0267  *
0268  * @buf_type: Buffer type
0269  * @status: Buffer status
0270  * @trigger_type: Trigger type
0271  * @rsvd1: Reserved
0272  * @size: Buffer size
0273  * @rsvd2: Reserved
0274  * @trigger_data: Trigger specific data
0275  * @rsvd3: Reserved
0276  * @rsvd4: Reserved
0277  */
0278 struct mpi3mr_hdb_entry {
0279     __u8    buf_type;
0280     __u8    status;
0281     __u8    trigger_type;
0282     __u8    rsvd1;
0283     __u16   size;
0284     __u16   rsvd2;
0285     __u64   trigger_data;
0286     __u32   rsvd3;
0287     __u32   rsvd4;
0288 };
0289
0290
0291 /**
0292  * struct mpi3mr_bsg_in_hdb_status - This structure contains
0293  * return data for the BSG request to retrieve the number of host
0294  * diagnostic buffers supported by the driver and their current
0295  * status and additional status specific data if any in forms of
0296  * multiple hdb entries.
0297  *
0298  * @num_hdb_types: Number of host diag buffer types supported
0299  * @rsvd1: Reserved
0300  * @rsvd2: Reserved
0301  * @rsvd3: Reserved
0302  * @entry: Variable length Diag buffer status entry array
0303  */
0304 struct mpi3mr_bsg_in_hdb_status {
0305     __u8    num_hdb_types;
0306     __u8    rsvd1;
0307     __u16   rsvd2;
0308     __u32   rsvd3;
0309     struct mpi3mr_hdb_entry entry[1];
0310 };
0311
0312 /**
0313  * struct mpi3mr_bsg_out_repost_hdb - Repost host diagnostic
0314  * buffer request payload data to the driver.
0315  *
0316  * @buf_type: Buffer type
0317  * @rsvd1: Reserved
0318  * @rsvd2: Reserved
0319  */
0320 struct mpi3mr_bsg_out_repost_hdb {
0321     __u8    buf_type;
0322     __u8    rsvd1;
0323     __u16   rsvd2;
0324 };
0325
0326 /**
0327  * struct mpi3mr_bsg_out_upload_hdb - Upload host diagnostic
0328  * buffer request payload data to the driver.
0329  *
0330  * @buf_type: Buffer type
0331  * @rsvd1: Reserved
0332  * @rsvd2: Reserved
0333  * @start_offset: Start offset of the buffer from where to copy
0334  * @length: Length of the buffer to copy
0335  */
0336 struct mpi3mr_bsg_out_upload_hdb {
0337     __u8    buf_type;
0338     __u8    rsvd1;
0339     __u16   rsvd2;
0340     __u32   start_offset;
0341     __u32   length;
0342 };
0343
0344 /**
0345  * struct mpi3mr_bsg_out_refresh_hdb_triggers - Refresh host
0346  * diagnostic buffer triggers request payload data to the driver.
0347  *
0348  * @page_type: Page type
0349  * @rsvd1: Reserved
0350  * @rsvd2: Reserved
0351  */
0352 struct mpi3mr_bsg_out_refresh_hdb_triggers {
0353     __u8    page_type;
0354     __u8    rsvd1;
0355     __u16   rsvd2;
0356 };
0357 /**
0358  * struct mpi3mr_bsg_drv_cmd -  Generic bsg data
0359  * structure for all driver specific requests.
0360  *
0361  * @mrioc_id: Controller ID
0362  * @opcode: Driver specific opcode
0363  * @rsvd1: Reserved
0364  * @rsvd2: Reserved
0365  */
0366 struct mpi3mr_bsg_drv_cmd {
0367     __u8    mrioc_id;
0368     __u8    opcode;
0369     __u16   rsvd1;
0370     __u32   rsvd2[4];
0371 };
0372 /**
0373  * struct mpi3mr_bsg_in_reply_buf - MPI reply buffer returned
0374  * for MPI Passthrough request .
0375  *
0376  * @mpi_reply_type: Type of MPI reply
0377  * @rsvd1: Reserved
0378  * @rsvd2: Reserved
0379  * @reply_buf: Variable Length buffer based on mpirep type
0380  */
0381 struct mpi3mr_bsg_in_reply_buf {
0382     __u8    mpi_reply_type;
0383     __u8    rsvd1;
0384     __u16   rsvd2;
0385     __u8    reply_buf[1];
0386 };
0387
0388 /**
0389  * struct mpi3mr_buf_entry - User buffer descriptor for MPI
0390  * Passthrough requests.
0391  *
0392  * @buf_type: Buffer type
0393  * @rsvd1: Reserved
0394  * @rsvd2: Reserved
0395  * @buf_len: Buffer length
0396  */
0397 struct mpi3mr_buf_entry {
0398     __u8    buf_type;
0399     __u8    rsvd1;
0400     __u16   rsvd2;
0401     __u32   buf_len;
0402 };
0403 /**
0404  * struct mpi3mr_bsg_buf_entry_list - list of user buffer
0405  * descriptor for MPI Passthrough requests.
0406  *
0407  * @num_of_entries: Number of buffer descriptors
0408  * @rsvd1: Reserved
0409  * @rsvd2: Reserved
0410  * @rsvd3: Reserved
0411  * @buf_entry: Variable length array of buffer descriptors
0412  */
0413 struct mpi3mr_buf_entry_list {
0414     __u8    num_of_entries;
0415     __u8    rsvd1;
0416     __u16   rsvd2;
0417     __u32   rsvd3;
0418     struct mpi3mr_buf_entry buf_entry[1];
0419 };
0420 /**
0421  * struct mpi3mr_bsg_mptcmd -  Generic bsg data
0422  * structure for all MPI Passthrough requests .
0423  *
0424  * @mrioc_id: Controller ID
0425  * @rsvd1: Reserved
0426  * @timeout: MPI request timeout
0427  * @buf_entry_list: Buffer descriptor list
0428  */
0429 struct mpi3mr_bsg_mptcmd {
0430     __u8    mrioc_id;
0431     __u8    rsvd1;
0432     __u16   timeout;
0433     __u32   rsvd2;
0434     struct mpi3mr_buf_entry_list buf_entry_list;
0435 };
0436
0437 /**
0438  * struct mpi3mr_bsg_packet -  Generic bsg data
0439  * structure for all supported requests .
0440  *
0441  * @cmd_type: represents drvrcmd or mptcmd
0442  * @rsvd1: Reserved
0443  * @rsvd2: Reserved
0444  * @drvrcmd: driver request structure
0445  * @mptcmd: mpt request structure
0446  */
0447 struct mpi3mr_bsg_packet {
0448     __u8    cmd_type;
0449     __u8    rsvd1;
0450     __u16   rsvd2;
0451     __u32   rsvd3;
0452     union {
0453         struct mpi3mr_bsg_drv_cmd drvrcmd;
0454         struct mpi3mr_bsg_mptcmd mptcmd;
0455     } cmd;
0456 };
0457
0458
0459 /* MPI3: NVMe Encasulation related definitions */
0460 #ifndef MPI3_NVME_ENCAP_CMD_MAX
0461 #define MPI3_NVME_ENCAP_CMD_MAX               (1)
0462 #endif
0463
0464 struct mpi3_nvme_encapsulated_request {
0465     __le16  host_tag;
0466     __u8    ioc_use_only02;
0467     __u8    function;
0468     __le16  ioc_use_only04;
0469     __u8    ioc_use_only06;
0470     __u8    msg_flags;
0471     __le16  change_count;
0472     __le16  dev_handle;
0473     __le16  encapsulated_command_length;
0474     __le16  flags;
0475     __le32  data_length;
0476     __le32  reserved14[3];
0477     __le32  command[MPI3_NVME_ENCAP_CMD_MAX];
0478 };
0479
0480 struct mpi3_nvme_encapsulated_error_reply {
0481     __le16  host_tag;
0482     __u8    ioc_use_only02;
0483     __u8    function;
0484     __le16  ioc_use_only04;
0485     __u8    ioc_use_only06;
0486     __u8    msg_flags;
0487     __le16  ioc_use_only08;
0488     __le16  ioc_status;
0489     __le32  ioc_log_info;
0490     __le32  nvme_completion_entry[4];
0491 };
0492
0493 #define MPI3MR_NVME_PRP_SIZE        8 /* PRP size */
0494 #define MPI3MR_NVME_CMD_PRP1_OFFSET 24 /* PRP1 offset in NVMe cmd */
0495 #define MPI3MR_NVME_CMD_PRP2_OFFSET 32 /* PRP2 offset in NVMe cmd */
0496 #define MPI3MR_NVME_CMD_SGL_OFFSET  24 /* SGL offset in NVMe cmd */
0497 #define MPI3MR_NVME_DATA_FORMAT_PRP 0
0498 #define MPI3MR_NVME_DATA_FORMAT_SGL1    1
0499 #define MPI3MR_NVME_DATA_FORMAT_SGL2    2
0500
0501 /* MPI3: task management related definitions */
0502 struct mpi3_scsi_task_mgmt_request {
0503     __le16  host_tag;
0504     __u8    ioc_use_only02;
0505     __u8    function;
0506     __le16  ioc_use_only04;
0507     __u8    ioc_use_only06;
0508     __u8    msg_flags;
0509     __le16  change_count;
0510     __le16  dev_handle;
0511     __le16  task_host_tag;
0512     __u8    task_type;
0513     __u8    reserved0f;
0514     __le16  task_request_queue_id;
0515     __le16  reserved12;
0516     __le32  reserved14;
0517     __u8    lun[8];
0518 };
0519
0520 #define MPI3_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU      (0x08)
0521 #define MPI3_SCSITASKMGMT_TASKTYPE_ABORT_TASK               (0x01)
0522 #define MPI3_SCSITASKMGMT_TASKTYPE_ABORT_TASK_SET           (0x02)
0523 #define MPI3_SCSITASKMGMT_TASKTYPE_TARGET_RESET             (0x03)
0524 #define MPI3_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET       (0x05)
0525 #define MPI3_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET           (0x06)
0526 #define MPI3_SCSITASKMGMT_TASKTYPE_QUERY_TASK               (0x07)
0527 #define MPI3_SCSITASKMGMT_TASKTYPE_CLEAR_ACA                (0x08)
0528 #define MPI3_SCSITASKMGMT_TASKTYPE_QUERY_TASK_SET           (0x09)
0529 #define MPI3_SCSITASKMGMT_TASKTYPE_QUERY_ASYNC_EVENT        (0x0a)
0530 #define MPI3_SCSITASKMGMT_TASKTYPE_I_T_NEXUS_RESET          (0x0b)
0531 struct mpi3_scsi_task_mgmt_reply {
0532     __le16  host_tag;
0533     __u8    ioc_use_only02;
0534     __u8    function;
0535     __le16  ioc_use_only04;
0536     __u8    ioc_use_only06;
0537     __u8    msg_flags;
0538     __le16  ioc_use_only08;
0539     __le16  ioc_status;
0540     __le32  ioc_log_info;
0541     __le32  termination_count;
0542     __le32  response_data;
0543     __le32  reserved18;
0544 };
0545
0546 #define MPI3_SCSITASKMGMT_RSPCODE_TM_COMPLETE                (0x00)
0547 #define MPI3_SCSITASKMGMT_RSPCODE_INVALID_FRAME              (0x02)
0548 #define MPI3_SCSITASKMGMT_RSPCODE_TM_FUNCTION_NOT_SUPPORTED  (0x04)
0549 #define MPI3_SCSITASKMGMT_RSPCODE_TM_FAILED                  (0x05)
0550 #define MPI3_SCSITASKMGMT_RSPCODE_TM_SUCCEEDED               (0x08)
0551 #define MPI3_SCSITASKMGMT_RSPCODE_TM_INVALID_LUN             (0x09)
0552 #define MPI3_SCSITASKMGMT_RSPCODE_TM_OVERLAPPED_TAG          (0x0a)
0553 #define MPI3_SCSITASKMGMT_RSPCODE_IO_QUEUED_ON_IOC           (0x80)
0554 #define MPI3_SCSITASKMGMT_RSPCODE_TM_NVME_DENIED             (0x81)
0555
0556 /* MPI3: PEL related definitions */
0557 #define MPI3_PEL_LOCALE_FLAGS_NON_BLOCKING_BOOT_EVENT   (0x0200)
0558 #define MPI3_PEL_LOCALE_FLAGS_BLOCKING_BOOT_EVENT       (0x0100)
0559 #define MPI3_PEL_LOCALE_FLAGS_PCIE                      (0x0080)
0560 #define MPI3_PEL_LOCALE_FLAGS_CONFIGURATION             (0x0040)
0561 #define MPI3_PEL_LOCALE_FLAGS_CONTROLER                 (0x0020)
0562 #define MPI3_PEL_LOCALE_FLAGS_SAS                       (0x0010)
0563 #define MPI3_PEL_LOCALE_FLAGS_EPACK                     (0x0008)
0564 #define MPI3_PEL_LOCALE_FLAGS_ENCLOSURE                 (0x0004)
0565 #define MPI3_PEL_LOCALE_FLAGS_PD                        (0x0002)
0566 #define MPI3_PEL_LOCALE_FLAGS_VD                        (0x0001)
0567 #define MPI3_PEL_CLASS_DEBUG                            (0x00)
0568 #define MPI3_PEL_CLASS_PROGRESS                         (0x01)
0569 #define MPI3_PEL_CLASS_INFORMATIONAL                    (0x02)
0570 #define MPI3_PEL_CLASS_WARNING                          (0x03)
0571 #define MPI3_PEL_CLASS_CRITICAL                         (0x04)
0572 #define MPI3_PEL_CLASS_FATAL                            (0x05)
0573 #define MPI3_PEL_CLASS_FAULT                            (0x06)
0574
0575 /* MPI3: Function definitions */
0576 #define MPI3_BSG_FUNCTION_MGMT_PASSTHROUGH              (0x0a)
0577 #define MPI3_BSG_FUNCTION_SCSI_IO                       (0x20)
0578 #define MPI3_BSG_FUNCTION_SCSI_TASK_MGMT                (0x21)
0579 #define MPI3_BSG_FUNCTION_SMP_PASSTHROUGH               (0x22)
0580 #define MPI3_BSG_FUNCTION_NVME_ENCAPSULATED             (0x24)
0581
0582 #endif