uapi/rdma/vmw_pvrdma-abi.h

0001 /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) */
0002 /*
0003  * Copyright (c) 2012-2016 VMware, Inc.  All rights reserved.
0004  *
0005  * This program is free software; you can redistribute it and/or
0006  * modify it under the terms of EITHER the GNU General Public License
0007  * version 2 as published by the Free Software Foundation or the BSD
0008  * 2-Clause License. This program is distributed in the hope that it
0009  * will be useful, but WITHOUT ANY WARRANTY; WITHOUT EVEN THE IMPLIED
0010  * WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
0011  * See the GNU General Public License version 2 for more details at
0012  * http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html.
0013  *
0014  * You should have received a copy of the GNU General Public License
0015  * along with this program available in the file COPYING in the main
0016  * directory of this source tree.
0017  *
0018  * The BSD 2-Clause License
0019  *
0020  *     Redistribution and use in source and binary forms, with or
0021  *     without modification, are permitted provided that the following
0022  *     conditions are met:
0023  *
0024  *      - Redistributions of source code must retain the above
0025  *        copyright notice, this list of conditions and the following
0026  *        disclaimer.
0027  *
0028  *      - Redistributions in binary form must reproduce the above
0029  *        copyright notice, this list of conditions and the following
0030  *        disclaimer in the documentation and/or other materials
0031  *        provided with the distribution.
0032  *
0033  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
0034  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
0035  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
0036  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
0037  * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
0038  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0039  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
0040  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
0041  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
0042  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0043  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
0044  * OF THE POSSIBILITY OF SUCH DAMAGE.
0045  */
0046
0047 #ifndef __VMW_PVRDMA_ABI_H__
0048 #define __VMW_PVRDMA_ABI_H__
0049
0050 #include <linux/types.h>
0051
0052 #define PVRDMA_UVERBS_ABI_VERSION   3       /* ABI Version. */
0053 #define PVRDMA_UAR_HANDLE_MASK      0x00FFFFFF  /* Bottom 24 bits. */
0054 #define PVRDMA_UAR_QP_OFFSET        0       /* QP doorbell. */
0055 #define PVRDMA_UAR_QP_SEND      (1 << 30)   /* Send bit. */
0056 #define PVRDMA_UAR_QP_RECV      (1 << 31)   /* Recv bit. */
0057 #define PVRDMA_UAR_CQ_OFFSET        4       /* CQ doorbell. */
0058 #define PVRDMA_UAR_CQ_ARM_SOL       (1 << 29)   /* Arm solicited bit. */
0059 #define PVRDMA_UAR_CQ_ARM       (1 << 30)   /* Arm bit. */
0060 #define PVRDMA_UAR_CQ_POLL      (1 << 31)   /* Poll bit. */
0061 #define PVRDMA_UAR_SRQ_OFFSET       8       /* SRQ doorbell. */
0062 #define PVRDMA_UAR_SRQ_RECV     (1 << 30)   /* Recv bit. */
0063
0064 enum pvrdma_wr_opcode {
0065     PVRDMA_WR_RDMA_WRITE,
0066     PVRDMA_WR_RDMA_WRITE_WITH_IMM,
0067     PVRDMA_WR_SEND,
0068     PVRDMA_WR_SEND_WITH_IMM,
0069     PVRDMA_WR_RDMA_READ,
0070     PVRDMA_WR_ATOMIC_CMP_AND_SWP,
0071     PVRDMA_WR_ATOMIC_FETCH_AND_ADD,
0072     PVRDMA_WR_LSO,
0073     PVRDMA_WR_SEND_WITH_INV,
0074     PVRDMA_WR_RDMA_READ_WITH_INV,
0075     PVRDMA_WR_LOCAL_INV,
0076     PVRDMA_WR_FAST_REG_MR,
0077     PVRDMA_WR_MASKED_ATOMIC_CMP_AND_SWP,
0078     PVRDMA_WR_MASKED_ATOMIC_FETCH_AND_ADD,
0079     PVRDMA_WR_BIND_MW,
0080     PVRDMA_WR_REG_SIG_MR,
0081     PVRDMA_WR_ERROR,
0082 };
0083
0084 enum pvrdma_wc_status {
0085     PVRDMA_WC_SUCCESS,
0086     PVRDMA_WC_LOC_LEN_ERR,
0087     PVRDMA_WC_LOC_QP_OP_ERR,
0088     PVRDMA_WC_LOC_EEC_OP_ERR,
0089     PVRDMA_WC_LOC_PROT_ERR,
0090     PVRDMA_WC_WR_FLUSH_ERR,
0091     PVRDMA_WC_MW_BIND_ERR,
0092     PVRDMA_WC_BAD_RESP_ERR,
0093     PVRDMA_WC_LOC_ACCESS_ERR,
0094     PVRDMA_WC_REM_INV_REQ_ERR,
0095     PVRDMA_WC_REM_ACCESS_ERR,
0096     PVRDMA_WC_REM_OP_ERR,
0097     PVRDMA_WC_RETRY_EXC_ERR,
0098     PVRDMA_WC_RNR_RETRY_EXC_ERR,
0099     PVRDMA_WC_LOC_RDD_VIOL_ERR,
0100     PVRDMA_WC_REM_INV_RD_REQ_ERR,
0101     PVRDMA_WC_REM_ABORT_ERR,
0102     PVRDMA_WC_INV_EECN_ERR,
0103     PVRDMA_WC_INV_EEC_STATE_ERR,
0104     PVRDMA_WC_FATAL_ERR,
0105     PVRDMA_WC_RESP_TIMEOUT_ERR,
0106     PVRDMA_WC_GENERAL_ERR,
0107 };
0108
0109 enum pvrdma_wc_opcode {
0110     PVRDMA_WC_SEND,
0111     PVRDMA_WC_RDMA_WRITE,
0112     PVRDMA_WC_RDMA_READ,
0113     PVRDMA_WC_COMP_SWAP,
0114     PVRDMA_WC_FETCH_ADD,
0115     PVRDMA_WC_BIND_MW,
0116     PVRDMA_WC_LSO,
0117     PVRDMA_WC_LOCAL_INV,
0118     PVRDMA_WC_FAST_REG_MR,
0119     PVRDMA_WC_MASKED_COMP_SWAP,
0120     PVRDMA_WC_MASKED_FETCH_ADD,
0121     PVRDMA_WC_RECV = 1 << 7,
0122     PVRDMA_WC_RECV_RDMA_WITH_IMM,
0123 };
0124
0125 enum pvrdma_wc_flags {
0126     PVRDMA_WC_GRH           = 1 << 0,
0127     PVRDMA_WC_WITH_IMM      = 1 << 1,
0128     PVRDMA_WC_WITH_INVALIDATE   = 1 << 2,
0129     PVRDMA_WC_IP_CSUM_OK        = 1 << 3,
0130     PVRDMA_WC_WITH_SMAC     = 1 << 4,
0131     PVRDMA_WC_WITH_VLAN     = 1 << 5,
0132     PVRDMA_WC_WITH_NETWORK_HDR_TYPE = 1 << 6,
0133     PVRDMA_WC_FLAGS_MAX     = PVRDMA_WC_WITH_NETWORK_HDR_TYPE,
0134 };
0135
0136 enum pvrdma_network_type {
0137     PVRDMA_NETWORK_IB,
0138     PVRDMA_NETWORK_ROCE_V1 = PVRDMA_NETWORK_IB,
0139     PVRDMA_NETWORK_IPV4,
0140     PVRDMA_NETWORK_IPV6
0141 };
0142
0143 struct pvrdma_alloc_ucontext_resp {
0144     __u32 qp_tab_size;
0145     __u32 reserved;
0146 };
0147
0148 struct pvrdma_alloc_pd_resp {
0149     __u32 pdn;
0150     __u32 reserved;
0151 };
0152
0153 struct pvrdma_create_cq {
0154     __aligned_u64 buf_addr;
0155     __u32 buf_size;
0156     __u32 reserved;
0157 };
0158
0159 struct pvrdma_create_cq_resp {
0160     __u32 cqn;
0161     __u32 reserved;
0162 };
0163
0164 struct pvrdma_resize_cq {
0165     __aligned_u64 buf_addr;
0166     __u32 buf_size;
0167     __u32 reserved;
0168 };
0169
0170 struct pvrdma_create_srq {
0171     __aligned_u64 buf_addr;
0172     __u32 buf_size;
0173     __u32 reserved;
0174 };
0175
0176 struct pvrdma_create_srq_resp {
0177     __u32 srqn;
0178     __u32 reserved;
0179 };
0180
0181 struct pvrdma_create_qp {
0182     __aligned_u64 rbuf_addr;
0183     __aligned_u64 sbuf_addr;
0184     __u32 rbuf_size;
0185     __u32 sbuf_size;
0186     __aligned_u64 qp_addr;
0187 };
0188
0189 struct pvrdma_create_qp_resp {
0190     __u32 qpn;
0191     __u32 qp_handle;
0192 };
0193
0194 /* PVRDMA masked atomic compare and swap */
0195 struct pvrdma_ex_cmp_swap {
0196     __aligned_u64 swap_val;
0197     __aligned_u64 compare_val;
0198     __aligned_u64 swap_mask;
0199     __aligned_u64 compare_mask;
0200 };
0201
0202 /* PVRDMA masked atomic fetch and add */
0203 struct pvrdma_ex_fetch_add {
0204     __aligned_u64 add_val;
0205     __aligned_u64 field_boundary;
0206 };
0207
0208 /* PVRDMA address vector. */
0209 struct pvrdma_av {
0210     __u32 port_pd;
0211     __u32 sl_tclass_flowlabel;
0212     __u8 dgid[16];
0213     __u8 src_path_bits;
0214     __u8 gid_index;
0215     __u8 stat_rate;
0216     __u8 hop_limit;
0217     __u8 dmac[6];
0218     __u8 reserved[6];
0219 };
0220
0221 /* PVRDMA scatter/gather entry */
0222 struct pvrdma_sge {
0223     __aligned_u64 addr;
0224     __u32   length;
0225     __u32   lkey;
0226 };
0227
0228 /* PVRDMA receive queue work request */
0229 struct pvrdma_rq_wqe_hdr {
0230     __aligned_u64 wr_id;        /* wr id */
0231     __u32 num_sge;      /* size of s/g array */
0232     __u32 total_len;    /* reserved */
0233 };
0234 /* Use pvrdma_sge (ib_sge) for receive queue s/g array elements. */
0235
0236 /* PVRDMA send queue work request */
0237 struct pvrdma_sq_wqe_hdr {
0238     __aligned_u64 wr_id;        /* wr id */
0239     __u32 num_sge;      /* size of s/g array */
0240     __u32 total_len;    /* reserved */
0241     __u32 opcode;       /* operation type */
0242     __u32 send_flags;   /* wr flags */
0243     union {
0244         __be32 imm_data;
0245         __u32 invalidate_rkey;
0246     } ex;
0247     __u32 reserved;
0248     union {
0249         struct {
0250             __aligned_u64 remote_addr;
0251             __u32 rkey;
0252             __u8 reserved[4];
0253         } rdma;
0254         struct {
0255             __aligned_u64 remote_addr;
0256             __aligned_u64 compare_add;
0257             __aligned_u64 swap;
0258             __u32 rkey;
0259             __u32 reserved;
0260         } atomic;
0261         struct {
0262             __aligned_u64 remote_addr;
0263             __u32 log_arg_sz;
0264             __u32 rkey;
0265             union {
0266                 struct pvrdma_ex_cmp_swap  cmp_swap;
0267                 struct pvrdma_ex_fetch_add fetch_add;
0268             } wr_data;
0269         } masked_atomics;
0270         struct {
0271             __aligned_u64 iova_start;
0272             __aligned_u64 pl_pdir_dma;
0273             __u32 page_shift;
0274             __u32 page_list_len;
0275             __u32 length;
0276             __u32 access_flags;
0277             __u32 rkey;
0278             __u32 reserved;
0279         } fast_reg;
0280         struct {
0281             __u32 remote_qpn;
0282             __u32 remote_qkey;
0283             struct pvrdma_av av;
0284         } ud;
0285     } wr;
0286 };
0287 /* Use pvrdma_sge (ib_sge) for send queue s/g array elements. */
0288
0289 /* Completion queue element. */
0290 struct pvrdma_cqe {
0291     __aligned_u64 wr_id;
0292     __aligned_u64 qp;
0293     __u32 opcode;
0294     __u32 status;
0295     __u32 byte_len;
0296     __be32 imm_data;
0297     __u32 src_qp;
0298     __u32 wc_flags;
0299     __u32 vendor_err;
0300     __u16 pkey_index;
0301     __u16 slid;
0302     __u8 sl;
0303     __u8 dlid_path_bits;
0304     __u8 port_num;
0305     __u8 smac[6];
0306     __u8 network_hdr_type;
0307     __u8 reserved2[6]; /* Pad to next power of 2 (64). */
0308 };
0309
0310 #endif /* __VMW_PVRDMA_ABI_H__ */