uapi/rdma/mlx4-abi.h

0001 /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR Linux-OpenIB) */
0002 /*
0003  * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
0004  * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
0005  *
0006  * This software is available to you under a choice of one of two
0007  * licenses.  You may choose to be licensed under the terms of the GNU
0008  * General Public License (GPL) Version 2, available from the file
0009  * COPYING in the main directory of this source tree, or the
0010  * OpenIB.org BSD license below:
0011  *
0012  *     Redistribution and use in source and binary forms, with or
0013  *     without modification, are permitted provided that the following
0014  *     conditions are met:
0015  *
0016  *      - Redistributions of source code must retain the above
0017  *        copyright notice, this list of conditions and the following
0018  *        disclaimer.
0019  *
0020  *      - Redistributions in binary form must reproduce the above
0021  *        copyright notice, this list of conditions and the following
0022  *        disclaimer in the documentation and/or other materials
0023  *        provided with the distribution.
0024  *
0025  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0026  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
0027  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0028  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
0029  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
0030  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
0031  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
0032  * SOFTWARE.
0033  */
0034
0035 #ifndef MLX4_ABI_USER_H
0036 #define MLX4_ABI_USER_H
0037
0038 #include <linux/types.h>
0039
0040 /*
0041  * Increment this value if any changes that break userspace ABI
0042  * compatibility are made.
0043  */
0044
0045 #define MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION  3
0046 #define MLX4_IB_UVERBS_ABI_VERSION      4
0047
0048 /*
0049  * Make sure that all structs defined in this file remain laid out so
0050  * that they pack the same way on 32-bit and 64-bit architectures (to
0051  * avoid incompatibility between 32-bit userspace and 64-bit kernels).
0052  * In particular do not use pointer types -- pass pointers in __u64
0053  * instead.
0054  */
0055
0056 struct mlx4_ib_alloc_ucontext_resp_v3 {
0057     __u32   qp_tab_size;
0058     __u16   bf_reg_size;
0059     __u16   bf_regs_per_page;
0060 };
0061
0062 enum {
0063     MLX4_USER_DEV_CAP_LARGE_CQE = 1L << 0,
0064 };
0065
0066 struct mlx4_ib_alloc_ucontext_resp {
0067     __u32   dev_caps;
0068     __u32   qp_tab_size;
0069     __u16   bf_reg_size;
0070     __u16   bf_regs_per_page;
0071     __u32   cqe_size;
0072 };
0073
0074 struct mlx4_ib_alloc_pd_resp {
0075     __u32   pdn;
0076     __u32   reserved;
0077 };
0078
0079 struct mlx4_ib_create_cq {
0080     __aligned_u64 buf_addr;
0081     __aligned_u64 db_addr;
0082 };
0083
0084 struct mlx4_ib_create_cq_resp {
0085     __u32   cqn;
0086     __u32   reserved;
0087 };
0088
0089 struct mlx4_ib_resize_cq {
0090     __aligned_u64 buf_addr;
0091 };
0092
0093 struct mlx4_ib_create_srq {
0094     __aligned_u64 buf_addr;
0095     __aligned_u64 db_addr;
0096 };
0097
0098 struct mlx4_ib_create_srq_resp {
0099     __u32   srqn;
0100     __u32   reserved;
0101 };
0102
0103 struct mlx4_ib_create_qp_rss {
0104     __aligned_u64 rx_hash_fields_mask; /* Use  enum mlx4_ib_rx_hash_fields */
0105     __u8    rx_hash_function; /* Use enum mlx4_ib_rx_hash_function_flags */
0106     __u8    reserved[7];
0107     __u8    rx_hash_key[40];
0108     __u32   comp_mask;
0109     __u32   reserved1;
0110 };
0111
0112 struct mlx4_ib_create_qp {
0113     __aligned_u64 buf_addr;
0114     __aligned_u64 db_addr;
0115     __u8    log_sq_bb_count;
0116     __u8    log_sq_stride;
0117     __u8    sq_no_prefetch;
0118     __u8    reserved;
0119     __u32   inl_recv_sz;
0120 };
0121
0122 struct mlx4_ib_create_wq {
0123     __aligned_u64 buf_addr;
0124     __aligned_u64 db_addr;
0125     __u8    log_range_size;
0126     __u8    reserved[3];
0127     __u32   comp_mask;
0128 };
0129
0130 struct mlx4_ib_modify_wq {
0131     __u32   comp_mask;
0132     __u32   reserved;
0133 };
0134
0135 struct mlx4_ib_create_rwq_ind_tbl_resp {
0136     __u32   response_length;
0137     __u32   reserved;
0138 };
0139
0140 /* RX Hash function flags */
0141 enum mlx4_ib_rx_hash_function_flags {
0142     MLX4_IB_RX_HASH_FUNC_TOEPLITZ   = 1 << 0,
0143 };
0144
0145 /*
0146  * RX Hash flags, these flags allows to set which incoming packet's field should
0147  * participates in RX Hash. Each flag represent certain packet's field,
0148  * when the flag is set the field that is represented by the flag will
0149  * participate in RX Hash calculation.
0150  */
0151 enum mlx4_ib_rx_hash_fields {
0152     MLX4_IB_RX_HASH_SRC_IPV4    = 1 << 0,
0153     MLX4_IB_RX_HASH_DST_IPV4    = 1 << 1,
0154     MLX4_IB_RX_HASH_SRC_IPV6    = 1 << 2,
0155     MLX4_IB_RX_HASH_DST_IPV6    = 1 << 3,
0156     MLX4_IB_RX_HASH_SRC_PORT_TCP    = 1 << 4,
0157     MLX4_IB_RX_HASH_DST_PORT_TCP    = 1 << 5,
0158     MLX4_IB_RX_HASH_SRC_PORT_UDP    = 1 << 6,
0159     MLX4_IB_RX_HASH_DST_PORT_UDP    = 1 << 7,
0160     MLX4_IB_RX_HASH_INNER       = 1ULL << 31,
0161 };
0162
0163 struct mlx4_ib_rss_caps {
0164     __aligned_u64 rx_hash_fields_mask; /* enum mlx4_ib_rx_hash_fields */
0165     __u8 rx_hash_function; /* enum mlx4_ib_rx_hash_function_flags */
0166     __u8 reserved[7];
0167 };
0168
0169 enum query_device_resp_mask {
0170     MLX4_IB_QUERY_DEV_RESP_MASK_CORE_CLOCK_OFFSET = 1UL << 0,
0171 };
0172
0173 struct mlx4_ib_tso_caps {
0174     __u32 max_tso; /* Maximum tso payload size in bytes */
0175     /* Corresponding bit will be set if qp type from
0176      * 'enum ib_qp_type' is supported.
0177      */
0178     __u32 supported_qpts;
0179 };
0180
0181 struct mlx4_uverbs_ex_query_device_resp {
0182     __u32           comp_mask;
0183     __u32           response_length;
0184     __aligned_u64       hca_core_clock_offset;
0185     __u32           max_inl_recv_sz;
0186     __u32           reserved;
0187     struct mlx4_ib_rss_caps rss_caps;
0188     struct mlx4_ib_tso_caps tso_caps;
0189 };
0190
0191 #endif /* MLX4_ABI_USER_H */