rdma/hfi/hfi1_user.h

0001 /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
0002 /*
0003  *
0004  * This file is provided under a dual BSD/GPLv2 license.  When using or
0005  * redistributing this file, you may do so under either license.
0006  *
0007  * GPL LICENSE SUMMARY
0008  *
0009  * Copyright(c) 2015 - 2020 Intel Corporation.
0010  *
0011  * This program is free software; you can redistribute it and/or modify
0012  * it under the terms of version 2 of the GNU General Public License as
0013  * published by the Free Software Foundation.
0014  *
0015  * This program is distributed in the hope that it will be useful, but
0016  * WITHOUT ANY WARRANTY; without even the implied warranty of
0017  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
0018  * General Public License for more details.
0019  *
0020  * BSD LICENSE
0021  *
0022  * Copyright(c) 2015 Intel Corporation.
0023  *
0024  * Redistribution and use in source and binary forms, with or without
0025  * modification, are permitted provided that the following conditions
0026  * are met:
0027  *
0028  *  - Redistributions of source code must retain the above copyright
0029  *    notice, this list of conditions and the following disclaimer.
0030  *  - Redistributions in binary form must reproduce the above copyright
0031  *    notice, this list of conditions and the following disclaimer in
0032  *    the documentation and/or other materials provided with the
0033  *    distribution.
0034  *  - Neither the name of Intel Corporation nor the names of its
0035  *    contributors may be used to endorse or promote products derived
0036  *    from this software without specific prior written permission.
0037  *
0038  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
0039  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
0040  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
0041  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
0042  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
0043  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
0044  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
0045  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
0046  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0047  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
0048  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0049  *
0050  */
0051
0052 /*
0053  * This file contains defines, structures, etc. that are used
0054  * to communicate between kernel and user code.
0055  */
0056
0057 #ifndef _LINUX__HFI1_USER_H
0058 #define _LINUX__HFI1_USER_H
0059
0060 #include <linux/types.h>
0061 #include <rdma/rdma_user_ioctl.h>
0062
0063 /*
0064  * This version number is given to the driver by the user code during
0065  * initialization in the spu_userversion field of hfi1_user_info, so
0066  * the driver can check for compatibility with user code.
0067  *
0068  * The major version changes when data structures change in an incompatible
0069  * way. The driver must be the same for initialization to succeed.
0070  */
0071 #define HFI1_USER_SWMAJOR 6
0072
0073 /*
0074  * Minor version differences are always compatible
0075  * a within a major version, however if user software is larger
0076  * than driver software, some new features and/or structure fields
0077  * may not be implemented; the user code must deal with this if it
0078  * cares, or it must abort after initialization reports the difference.
0079  */
0080 #define HFI1_USER_SWMINOR 3
0081
0082 /*
0083  * We will encode the major/minor inside a single 32bit version number.
0084  */
0085 #define HFI1_SWMAJOR_SHIFT 16
0086
0087 /*
0088  * Set of HW and driver capability/feature bits.
0089  * These bit values are used to configure enabled/disabled HW and
0090  * driver features. The same set of bits are communicated to user
0091  * space.
0092  */
0093 #define HFI1_CAP_DMA_RTAIL        (1UL <<  0) /* Use DMA'ed RTail value */
0094 #define HFI1_CAP_SDMA             (1UL <<  1) /* Enable SDMA support */
0095 #define HFI1_CAP_SDMA_AHG         (1UL <<  2) /* Enable SDMA AHG support */
0096 #define HFI1_CAP_EXTENDED_PSN     (1UL <<  3) /* Enable Extended PSN support */
0097 #define HFI1_CAP_HDRSUPP          (1UL <<  4) /* Enable Header Suppression */
0098 #define HFI1_CAP_TID_RDMA         (1UL <<  5) /* Enable TID RDMA operations */
0099 #define HFI1_CAP_USE_SDMA_HEAD    (1UL <<  6) /* DMA Hdr Q tail vs. use CSR */
0100 #define HFI1_CAP_MULTI_PKT_EGR    (1UL <<  7) /* Enable multi-packet Egr buffs*/
0101 #define HFI1_CAP_NODROP_RHQ_FULL  (1UL <<  8) /* Don't drop on Hdr Q full */
0102 #define HFI1_CAP_NODROP_EGR_FULL  (1UL <<  9) /* Don't drop on EGR buffs full */
0103 #define HFI1_CAP_TID_UNMAP        (1UL << 10) /* Disable Expected TID caching */
0104 #define HFI1_CAP_PRINT_UNIMPL     (1UL << 11) /* Show for unimplemented feats */
0105 #define HFI1_CAP_ALLOW_PERM_JKEY  (1UL << 12) /* Allow use of permissive JKEY */
0106 #define HFI1_CAP_NO_INTEGRITY     (1UL << 13) /* Enable ctxt integrity checks */
0107 #define HFI1_CAP_PKEY_CHECK       (1UL << 14) /* Enable ctxt PKey checking */
0108 #define HFI1_CAP_STATIC_RATE_CTRL (1UL << 15) /* Allow PBC.StaticRateControl */
0109 #define HFI1_CAP_OPFN             (1UL << 16) /* Enable the OPFN protocol */
0110 #define HFI1_CAP_SDMA_HEAD_CHECK  (1UL << 17) /* SDMA head checking */
0111 #define HFI1_CAP_EARLY_CREDIT_RETURN (1UL << 18) /* early credit return */
0112 #define HFI1_CAP_AIP              (1UL << 19) /* Enable accelerated IP */
0113
0114 #define HFI1_RCVHDR_ENTSIZE_2    (1UL << 0)
0115 #define HFI1_RCVHDR_ENTSIZE_16   (1UL << 1)
0116 #define HFI1_RCVDHR_ENTSIZE_32   (1UL << 2)
0117
0118 #define _HFI1_EVENT_FROZEN_BIT         0
0119 #define _HFI1_EVENT_LINKDOWN_BIT       1
0120 #define _HFI1_EVENT_LID_CHANGE_BIT     2
0121 #define _HFI1_EVENT_LMC_CHANGE_BIT     3
0122 #define _HFI1_EVENT_SL2VL_CHANGE_BIT   4
0123 #define _HFI1_EVENT_TID_MMU_NOTIFY_BIT 5
0124 #define _HFI1_MAX_EVENT_BIT _HFI1_EVENT_TID_MMU_NOTIFY_BIT
0125
0126 #define HFI1_EVENT_FROZEN            (1UL << _HFI1_EVENT_FROZEN_BIT)
0127 #define HFI1_EVENT_LINKDOWN          (1UL << _HFI1_EVENT_LINKDOWN_BIT)
0128 #define HFI1_EVENT_LID_CHANGE        (1UL << _HFI1_EVENT_LID_CHANGE_BIT)
0129 #define HFI1_EVENT_LMC_CHANGE        (1UL << _HFI1_EVENT_LMC_CHANGE_BIT)
0130 #define HFI1_EVENT_SL2VL_CHANGE      (1UL << _HFI1_EVENT_SL2VL_CHANGE_BIT)
0131 #define HFI1_EVENT_TID_MMU_NOTIFY    (1UL << _HFI1_EVENT_TID_MMU_NOTIFY_BIT)
0132
0133 /*
0134  * These are the status bits readable (in ASCII form, 64bit value)
0135  * from the "status" sysfs file.  For binary compatibility, values
0136  * must remain as is; removed states can be reused for different
0137  * purposes.
0138  */
0139 #define HFI1_STATUS_INITTED       0x1    /* basic initialization done */
0140 /* Chip has been found and initialized */
0141 #define HFI1_STATUS_CHIP_PRESENT 0x20
0142 /* IB link is at ACTIVE, usable for data traffic */
0143 #define HFI1_STATUS_IB_READY     0x40
0144 /* link is configured, LID, MTU, etc. have been set */
0145 #define HFI1_STATUS_IB_CONF      0x80
0146 /* A Fatal hardware error has occurred. */
0147 #define HFI1_STATUS_HWERROR     0x200
0148
0149 /*
0150  * Number of supported shared contexts.
0151  * This is the maximum number of software contexts that can share
0152  * a hardware send/receive context.
0153  */
0154 #define HFI1_MAX_SHARED_CTXTS 8
0155
0156 /*
0157  * Poll types
0158  */
0159 #define HFI1_POLL_TYPE_ANYRCV     0x0
0160 #define HFI1_POLL_TYPE_URGENT     0x1
0161
0162 enum hfi1_sdma_comp_state {
0163     FREE = 0,
0164     QUEUED,
0165     COMPLETE,
0166     ERROR
0167 };
0168
0169 /*
0170  * SDMA completion ring entry
0171  */
0172 struct hfi1_sdma_comp_entry {
0173     __u32 status;
0174     __u32 errcode;
0175 };
0176
0177 /*
0178  * Device status and notifications from driver to user-space.
0179  */
0180 struct hfi1_status {
0181     __aligned_u64 dev;      /* device/hw status bits */
0182     __aligned_u64 port;     /* port state and status bits */
0183     char freezemsg[];
0184 };
0185
0186 enum sdma_req_opcode {
0187     EXPECTED = 0,
0188     EAGER
0189 };
0190
0191 #define HFI1_SDMA_REQ_VERSION_MASK 0xF
0192 #define HFI1_SDMA_REQ_VERSION_SHIFT 0x0
0193 #define HFI1_SDMA_REQ_OPCODE_MASK 0xF
0194 #define HFI1_SDMA_REQ_OPCODE_SHIFT 0x4
0195 #define HFI1_SDMA_REQ_IOVCNT_MASK 0xFF
0196 #define HFI1_SDMA_REQ_IOVCNT_SHIFT 0x8
0197
0198 struct sdma_req_info {
0199     /*
0200      * bits 0-3 - version (currently unused)
0201      * bits 4-7 - opcode (enum sdma_req_opcode)
0202      * bits 8-15 - io vector count
0203      */
0204     __u16 ctrl;
0205     /*
0206      * Number of fragments contained in this request.
0207      * User-space has already computed how many
0208      * fragment-sized packet the user buffer will be
0209      * split into.
0210      */
0211     __u16 npkts;
0212     /*
0213      * Size of each fragment the user buffer will be
0214      * split into.
0215      */
0216     __u16 fragsize;
0217     /*
0218      * Index of the slot in the SDMA completion ring
0219      * this request should be using. User-space is
0220      * in charge of managing its own ring.
0221      */
0222     __u16 comp_idx;
0223 } __attribute__((__packed__));
0224
0225 /*
0226  * SW KDETH header.
0227  * swdata is SW defined portion.
0228  */
0229 struct hfi1_kdeth_header {
0230     __le32 ver_tid_offset;
0231     __le16 jkey;
0232     __le16 hcrc;
0233     __le32 swdata[7];
0234 }  __attribute__((__packed__));
0235
0236 /*
0237  * Structure describing the headers that User space uses. The
0238  * structure above is a subset of this one.
0239  */
0240 struct hfi1_pkt_header {
0241     __le16 pbc[4];
0242     __be16 lrh[4];
0243     __be32 bth[3];
0244     struct hfi1_kdeth_header kdeth;
0245 }  __attribute__((__packed__));
0246
0247
0248 /*
0249  * The list of usermode accessible registers.
0250  */
0251 enum hfi1_ureg {
0252     /* (RO)  DMA RcvHdr to be used next. */
0253     ur_rcvhdrtail = 0,
0254     /* (RW)  RcvHdr entry to be processed next by host. */
0255     ur_rcvhdrhead = 1,
0256     /* (RO)  Index of next Eager index to use. */
0257     ur_rcvegrindextail = 2,
0258     /* (RW)  Eager TID to be processed next */
0259     ur_rcvegrindexhead = 3,
0260     /* (RO)  Receive Eager Offset Tail */
0261     ur_rcvegroffsettail = 4,
0262     /* For internal use only; max register number. */
0263     ur_maxreg,
0264     /* (RW)  Receive TID flow table */
0265     ur_rcvtidflowtable = 256
0266 };
0267
0268 #endif /* _LINIUX__HFI1_USER_H */