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0001 /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */ 0002 /* 0003 * 0004 * This file is provided under a dual BSD/GPLv2 license. When using or 0005 * redistributing this file, you may do so under either license. 0006 * 0007 * GPL LICENSE SUMMARY 0008 * 0009 * Copyright(c) 2015 Intel Corporation. 0010 * 0011 * This program is free software; you can redistribute it and/or modify 0012 * it under the terms of version 2 of the GNU General Public License as 0013 * published by the Free Software Foundation. 0014 * 0015 * This program is distributed in the hope that it will be useful, but 0016 * WITHOUT ANY WARRANTY; without even the implied warranty of 0017 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 0018 * General Public License for more details. 0019 * 0020 * BSD LICENSE 0021 * 0022 * Copyright(c) 2015 Intel Corporation. 0023 * 0024 * Redistribution and use in source and binary forms, with or without 0025 * modification, are permitted provided that the following conditions 0026 * are met: 0027 * 0028 * - Redistributions of source code must retain the above copyright 0029 * notice, this list of conditions and the following disclaimer. 0030 * - Redistributions in binary form must reproduce the above copyright 0031 * notice, this list of conditions and the following disclaimer in 0032 * the documentation and/or other materials provided with the 0033 * distribution. 0034 * - Neither the name of Intel Corporation nor the names of its 0035 * contributors may be used to endorse or promote products derived 0036 * from this software without specific prior written permission. 0037 * 0038 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 0039 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 0040 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 0041 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 0042 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 0043 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 0044 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 0045 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 0046 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 0047 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 0048 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 0049 * 0050 */ 0051 0052 #ifndef _LINUX__HFI1_IOCTL_H 0053 #define _LINUX__HFI1_IOCTL_H 0054 #include <linux/types.h> 0055 0056 /* 0057 * This structure is passed to the driver to tell it where 0058 * user code buffers are, sizes, etc. The offsets and sizes of the 0059 * fields must remain unchanged, for binary compatibility. It can 0060 * be extended, if userversion is changed so user code can tell, if needed 0061 */ 0062 struct hfi1_user_info { 0063 /* 0064 * version of user software, to detect compatibility issues. 0065 * Should be set to HFI1_USER_SWVERSION. 0066 */ 0067 __u32 userversion; 0068 __u32 pad; 0069 /* 0070 * If two or more processes wish to share a context, each process 0071 * must set the subcontext_cnt and subcontext_id to the same 0072 * values. The only restriction on the subcontext_id is that 0073 * it be unique for a given node. 0074 */ 0075 __u16 subctxt_cnt; 0076 __u16 subctxt_id; 0077 /* 128bit UUID passed in by PSM. */ 0078 __u8 uuid[16]; 0079 }; 0080 0081 struct hfi1_ctxt_info { 0082 __aligned_u64 runtime_flags; /* chip/drv runtime flags (HFI1_CAP_*) */ 0083 __u32 rcvegr_size; /* size of each eager buffer */ 0084 __u16 num_active; /* number of active units */ 0085 __u16 unit; /* unit (chip) assigned to caller */ 0086 __u16 ctxt; /* ctxt on unit assigned to caller */ 0087 __u16 subctxt; /* subctxt on unit assigned to caller */ 0088 __u16 rcvtids; /* number of Rcv TIDs for this context */ 0089 __u16 credits; /* number of PIO credits for this context */ 0090 __u16 numa_node; /* NUMA node of the assigned device */ 0091 __u16 rec_cpu; /* cpu # for affinity (0xffff if none) */ 0092 __u16 send_ctxt; /* send context in use by this user context */ 0093 __u16 egrtids; /* number of RcvArray entries for Eager Rcvs */ 0094 __u16 rcvhdrq_cnt; /* number of RcvHdrQ entries */ 0095 __u16 rcvhdrq_entsize; /* size (in bytes) for each RcvHdrQ entry */ 0096 __u16 sdma_ring_size; /* number of entries in SDMA request ring */ 0097 }; 0098 0099 struct hfi1_tid_info { 0100 /* virtual address of first page in transfer */ 0101 __aligned_u64 vaddr; 0102 /* pointer to tid array. this array is big enough */ 0103 __aligned_u64 tidlist; 0104 /* number of tids programmed by this request */ 0105 __u32 tidcnt; 0106 /* length of transfer buffer programmed by this request */ 0107 __u32 length; 0108 }; 0109 0110 /* 0111 * This structure is returned by the driver immediately after 0112 * open to get implementation-specific info, and info specific to this 0113 * instance. 0114 * 0115 * This struct must have explicit pad fields where type sizes 0116 * may result in different alignments between 32 and 64 bit 0117 * programs, since the 64 bit * bit kernel requires the user code 0118 * to have matching offsets 0119 */ 0120 struct hfi1_base_info { 0121 /* version of hardware, for feature checking. */ 0122 __u32 hw_version; 0123 /* version of software, for feature checking. */ 0124 __u32 sw_version; 0125 /* Job key */ 0126 __u16 jkey; 0127 __u16 padding1; 0128 /* 0129 * The special QP (queue pair) value that identifies PSM 0130 * protocol packet from standard IB packets. 0131 */ 0132 __u32 bthqp; 0133 /* PIO credit return address, */ 0134 __aligned_u64 sc_credits_addr; 0135 /* 0136 * Base address of write-only pio buffers for this process. 0137 * Each buffer has sendpio_credits*64 bytes. 0138 */ 0139 __aligned_u64 pio_bufbase_sop; 0140 /* 0141 * Base address of write-only pio buffers for this process. 0142 * Each buffer has sendpio_credits*64 bytes. 0143 */ 0144 __aligned_u64 pio_bufbase; 0145 /* address where receive buffer queue is mapped into */ 0146 __aligned_u64 rcvhdr_bufbase; 0147 /* base address of Eager receive buffers. */ 0148 __aligned_u64 rcvegr_bufbase; 0149 /* base address of SDMA completion ring */ 0150 __aligned_u64 sdma_comp_bufbase; 0151 /* 0152 * User register base for init code, not to be used directly by 0153 * protocol or applications. Always maps real chip register space. 0154 * the register addresses are: 0155 * ur_rcvhdrhead, ur_rcvhdrtail, ur_rcvegrhead, ur_rcvegrtail, 0156 * ur_rcvtidflow 0157 */ 0158 __aligned_u64 user_regbase; 0159 /* notification events */ 0160 __aligned_u64 events_bufbase; 0161 /* status page */ 0162 __aligned_u64 status_bufbase; 0163 /* rcvhdrtail update */ 0164 __aligned_u64 rcvhdrtail_base; 0165 /* 0166 * shared memory pages for subctxts if ctxt is shared; these cover 0167 * all the processes in the group sharing a single context. 0168 * all have enough space for the num_subcontexts value on this job. 0169 */ 0170 __aligned_u64 subctxt_uregbase; 0171 __aligned_u64 subctxt_rcvegrbuf; 0172 __aligned_u64 subctxt_rcvhdrbuf; 0173 }; 0174 #endif /* _LINIUX__HFI1_IOCTL_H */
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