uapi/misc/xilinx_sdfec.h

0001 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
0002 /*
0003  * Xilinx SD-FEC
0004  *
0005  * Copyright (C) 2019 Xilinx, Inc.
0006  *
0007  * Description:
0008  * This driver is developed for SDFEC16 IP. It provides a char device
0009  * in sysfs and supports file operations like open(), close() and ioctl().
0010  */
0011 #ifndef __XILINX_SDFEC_H__
0012 #define __XILINX_SDFEC_H__
0013
0014 #include <linux/types.h>
0015
0016 /* Shared LDPC Tables */
0017 #define XSDFEC_LDPC_SC_TABLE_ADDR_BASE (0x10000)
0018 #define XSDFEC_LDPC_SC_TABLE_ADDR_HIGH (0x10400)
0019 #define XSDFEC_LDPC_LA_TABLE_ADDR_BASE (0x18000)
0020 #define XSDFEC_LDPC_LA_TABLE_ADDR_HIGH (0x19000)
0021 #define XSDFEC_LDPC_QC_TABLE_ADDR_BASE (0x20000)
0022 #define XSDFEC_LDPC_QC_TABLE_ADDR_HIGH (0x28000)
0023
0024 /* LDPC tables depth */
0025 #define XSDFEC_SC_TABLE_DEPTH                                                  \
0026     (XSDFEC_LDPC_SC_TABLE_ADDR_HIGH - XSDFEC_LDPC_SC_TABLE_ADDR_BASE)
0027 #define XSDFEC_LA_TABLE_DEPTH                                                  \
0028     (XSDFEC_LDPC_LA_TABLE_ADDR_HIGH - XSDFEC_LDPC_LA_TABLE_ADDR_BASE)
0029 #define XSDFEC_QC_TABLE_DEPTH                                                  \
0030     (XSDFEC_LDPC_QC_TABLE_ADDR_HIGH - XSDFEC_LDPC_QC_TABLE_ADDR_BASE)
0031
0032 /**
0033  * enum xsdfec_code - Code Type.
0034  * @XSDFEC_TURBO_CODE: Driver is configured for Turbo mode.
0035  * @XSDFEC_LDPC_CODE: Driver is configured for LDPC mode.
0036  *
0037  * This enum is used to indicate the mode of the driver. The mode is determined
0038  * by checking which codes are set in the driver. Note that the mode cannot be
0039  * changed by the driver.
0040  */
0041 enum xsdfec_code {
0042     XSDFEC_TURBO_CODE = 0,
0043     XSDFEC_LDPC_CODE,
0044 };
0045
0046 /**
0047  * enum xsdfec_order - Order
0048  * @XSDFEC_MAINTAIN_ORDER: Maintain order execution of blocks.
0049  * @XSDFEC_OUT_OF_ORDER: Out-of-order execution of blocks.
0050  *
0051  * This enum is used to indicate whether the order of blocks can change from
0052  * input to output.
0053  */
0054 enum xsdfec_order {
0055     XSDFEC_MAINTAIN_ORDER = 0,
0056     XSDFEC_OUT_OF_ORDER,
0057 };
0058
0059 /**
0060  * enum xsdfec_turbo_alg - Turbo Algorithm Type.
0061  * @XSDFEC_MAX_SCALE: Max Log-Map algorithm with extrinsic scaling. When
0062  *            scaling is set to this is equivalent to the Max Log-Map
0063  *            algorithm.
0064  * @XSDFEC_MAX_STAR: Log-Map algorithm.
0065  * @XSDFEC_TURBO_ALG_MAX: Used to indicate out of bound Turbo algorithms.
0066  *
0067  * This enum specifies which Turbo Decode algorithm is in use.
0068  */
0069 enum xsdfec_turbo_alg {
0070     XSDFEC_MAX_SCALE = 0,
0071     XSDFEC_MAX_STAR,
0072     XSDFEC_TURBO_ALG_MAX,
0073 };
0074
0075 /**
0076  * enum xsdfec_state - State.
0077  * @XSDFEC_INIT: Driver is initialized.
0078  * @XSDFEC_STARTED: Driver is started.
0079  * @XSDFEC_STOPPED: Driver is stopped.
0080  * @XSDFEC_NEEDS_RESET: Driver needs to be reset.
0081  * @XSDFEC_PL_RECONFIGURE: Programmable Logic needs to be recofigured.
0082  *
0083  * This enum is used to indicate the state of the driver.
0084  */
0085 enum xsdfec_state {
0086     XSDFEC_INIT = 0,
0087     XSDFEC_STARTED,
0088     XSDFEC_STOPPED,
0089     XSDFEC_NEEDS_RESET,
0090     XSDFEC_PL_RECONFIGURE,
0091 };
0092
0093 /**
0094  * enum xsdfec_axis_width - AXIS_WIDTH.DIN Setting for 128-bit width.
0095  * @XSDFEC_1x128b: DIN data input stream consists of a 128-bit lane
0096  * @XSDFEC_2x128b: DIN data input stream consists of two 128-bit lanes
0097  * @XSDFEC_4x128b: DIN data input stream consists of four 128-bit lanes
0098  *
0099  * This enum is used to indicate the AXIS_WIDTH.DIN setting for 128-bit width.
0100  * The number of lanes of the DIN data input stream depends upon the
0101  * AXIS_WIDTH.DIN parameter.
0102  */
0103 enum xsdfec_axis_width {
0104     XSDFEC_1x128b = 1,
0105     XSDFEC_2x128b = 2,
0106     XSDFEC_4x128b = 4,
0107 };
0108
0109 /**
0110  * enum xsdfec_axis_word_include - Words Configuration.
0111  * @XSDFEC_FIXED_VALUE: Fixed, the DIN_WORDS AXI4-Stream interface is removed
0112  *          from the IP instance and is driven with the specified
0113  *          number of words.
0114  * @XSDFEC_IN_BLOCK: In Block, configures the IP instance to expect a single
0115  *           DIN_WORDS value per input code block. The DIN_WORDS
0116  *           interface is present.
0117  * @XSDFEC_PER_AXI_TRANSACTION: Per Transaction, configures the IP instance to
0118  * expect one DIN_WORDS value per input transaction on the DIN interface. The
0119  * DIN_WORDS interface is present.
0120  * @XSDFEC_AXIS_WORDS_INCLUDE_MAX: Used to indicate out of bound Words
0121  *                 Configurations.
0122  *
0123  * This enum is used to specify the DIN_WORDS configuration.
0124  */
0125 enum xsdfec_axis_word_include {
0126     XSDFEC_FIXED_VALUE = 0,
0127     XSDFEC_IN_BLOCK,
0128     XSDFEC_PER_AXI_TRANSACTION,
0129     XSDFEC_AXIS_WORDS_INCLUDE_MAX,
0130 };
0131
0132 /**
0133  * struct xsdfec_turbo - User data for Turbo codes.
0134  * @alg: Specifies which Turbo decode algorithm to use
0135  * @scale: Specifies the extrinsic scaling to apply when the Max Scale algorithm
0136  *     has been selected
0137  *
0138  * Turbo code structure to communicate parameters to XSDFEC driver.
0139  */
0140 struct xsdfec_turbo {
0141     __u32 alg;
0142     __u8 scale;
0143 };
0144
0145 /**
0146  * struct xsdfec_ldpc_params - User data for LDPC codes.
0147  * @n: Number of code word bits
0148  * @k: Number of information bits
0149  * @psize: Size of sub-matrix
0150  * @nlayers: Number of layers in code
0151  * @nqc: Quasi Cyclic Number
0152  * @nmqc: Number of M-sized QC operations in parity check matrix
0153  * @nm: Number of M-size vectors in N
0154  * @norm_type: Normalization required or not
0155  * @no_packing: Determines if multiple QC ops should be performed
0156  * @special_qc: Sub-Matrix property for Circulant weight > 0
0157  * @no_final_parity: Decide if final parity check needs to be performed
0158  * @max_schedule: Experimental code word scheduling limit
0159  * @sc_off: SC offset
0160  * @la_off: LA offset
0161  * @qc_off: QC offset
0162  * @sc_table: Pointer to SC Table which must be page aligned
0163  * @la_table: Pointer to LA Table which must be page aligned
0164  * @qc_table: Pointer to QC Table which must be page aligned
0165  * @code_id: LDPC Code
0166  *
0167  * This structure describes the LDPC code that is passed to the driver by the
0168  * application.
0169  */
0170 struct xsdfec_ldpc_params {
0171     __u32 n;
0172     __u32 k;
0173     __u32 psize;
0174     __u32 nlayers;
0175     __u32 nqc;
0176     __u32 nmqc;
0177     __u32 nm;
0178     __u32 norm_type;
0179     __u32 no_packing;
0180     __u32 special_qc;
0181     __u32 no_final_parity;
0182     __u32 max_schedule;
0183     __u32 sc_off;
0184     __u32 la_off;
0185     __u32 qc_off;
0186     __u32 *sc_table;
0187     __u32 *la_table;
0188     __u32 *qc_table;
0189     __u16 code_id;
0190 };
0191
0192 /**
0193  * struct xsdfec_status - Status of SD-FEC core.
0194  * @state: State of the SD-FEC core
0195  * @activity: Describes if the SD-FEC instance is Active
0196  */
0197 struct xsdfec_status {
0198     __u32 state;
0199     __s8 activity;
0200 };
0201
0202 /**
0203  * struct xsdfec_irq - Enabling or Disabling Interrupts.
0204  * @enable_isr: If true enables the ISR
0205  * @enable_ecc_isr: If true enables the ECC ISR
0206  */
0207 struct xsdfec_irq {
0208     __s8 enable_isr;
0209     __s8 enable_ecc_isr;
0210 };
0211
0212 /**
0213  * struct xsdfec_config - Configuration of SD-FEC core.
0214  * @code: The codes being used by the SD-FEC instance
0215  * @order: Order of Operation
0216  * @din_width: Width of the DIN AXI4-Stream
0217  * @din_word_include: How DIN_WORDS are inputted
0218  * @dout_width: Width of the DOUT AXI4-Stream
0219  * @dout_word_include: HOW DOUT_WORDS are outputted
0220  * @irq: Enabling or disabling interrupts
0221  * @bypass: Is the core being bypassed
0222  * @code_wr_protect: Is write protection of LDPC codes enabled
0223  */
0224 struct xsdfec_config {
0225     __u32 code;
0226     __u32 order;
0227     __u32 din_width;
0228     __u32 din_word_include;
0229     __u32 dout_width;
0230     __u32 dout_word_include;
0231     struct xsdfec_irq irq;
0232     __s8 bypass;
0233     __s8 code_wr_protect;
0234 };
0235
0236 /**
0237  * struct xsdfec_stats - Stats retrived by ioctl XSDFEC_GET_STATS. Used
0238  *           to buffer atomic_t variables from struct
0239  *           xsdfec_dev. Counts are accumulated until
0240  *           the user clears them.
0241  * @isr_err_count: Count of ISR errors
0242  * @cecc_count: Count of Correctable ECC errors (SBE)
0243  * @uecc_count: Count of Uncorrectable ECC errors (MBE)
0244  */
0245 struct xsdfec_stats {
0246     __u32 isr_err_count;
0247     __u32 cecc_count;
0248     __u32 uecc_count;
0249 };
0250
0251 /**
0252  * struct xsdfec_ldpc_param_table_sizes - Used to store sizes of SD-FEC table
0253  *                    entries for an individual LPDC code
0254  *                    parameter.
0255  * @sc_size: Size of SC table used
0256  * @la_size: Size of LA table used
0257  * @qc_size: Size of QC table used
0258  */
0259 struct xsdfec_ldpc_param_table_sizes {
0260     __u32 sc_size;
0261     __u32 la_size;
0262     __u32 qc_size;
0263 };
0264
0265 /*
0266  * XSDFEC IOCTL List
0267  */
0268 #define XSDFEC_MAGIC 'f'
0269 /**
0270  * DOC: XSDFEC_START_DEV
0271  *
0272  * @Description
0273  *
0274  * ioctl to start SD-FEC core
0275  *
0276  * This fails if the XSDFEC_SET_ORDER ioctl has not been previously called
0277  */
0278 #define XSDFEC_START_DEV _IO(XSDFEC_MAGIC, 0)
0279 /**
0280  * DOC: XSDFEC_STOP_DEV
0281  *
0282  * @Description
0283  *
0284  * ioctl to stop the SD-FEC core
0285  */
0286 #define XSDFEC_STOP_DEV _IO(XSDFEC_MAGIC, 1)
0287 /**
0288  * DOC: XSDFEC_GET_STATUS
0289  *
0290  * @Description
0291  *
0292  * ioctl that returns status of SD-FEC core
0293  */
0294 #define XSDFEC_GET_STATUS _IOR(XSDFEC_MAGIC, 2, struct xsdfec_status)
0295 /**
0296  * DOC: XSDFEC_SET_IRQ
0297  * @Parameters
0298  *
0299  * @struct xsdfec_irq *
0300  *  Pointer to the &struct xsdfec_irq that contains the interrupt settings
0301  *  for the SD-FEC core
0302  *
0303  * @Description
0304  *
0305  * ioctl to enable or disable irq
0306  */
0307 #define XSDFEC_SET_IRQ _IOW(XSDFEC_MAGIC, 3, struct xsdfec_irq)
0308 /**
0309  * DOC: XSDFEC_SET_TURBO
0310  * @Parameters
0311  *
0312  * @struct xsdfec_turbo *
0313  *  Pointer to the &struct xsdfec_turbo that contains the Turbo decode
0314  *  settings for the SD-FEC core
0315  *
0316  * @Description
0317  *
0318  * ioctl that sets the SD-FEC Turbo parameter values
0319  *
0320  * This can only be used when the driver is in the XSDFEC_STOPPED state
0321  */
0322 #define XSDFEC_SET_TURBO _IOW(XSDFEC_MAGIC, 4, struct xsdfec_turbo)
0323 /**
0324  * DOC: XSDFEC_ADD_LDPC_CODE_PARAMS
0325  * @Parameters
0326  *
0327  * @struct xsdfec_ldpc_params *
0328  *  Pointer to the &struct xsdfec_ldpc_params that contains the LDPC code
0329  *  parameters to be added to the SD-FEC Block
0330  *
0331  * @Description
0332  * ioctl to add an LDPC code to the SD-FEC LDPC codes
0333  *
0334  * This can only be used when:
0335  *
0336  * - Driver is in the XSDFEC_STOPPED state
0337  *
0338  * - SD-FEC core is configured as LPDC
0339  *
0340  * - SD-FEC Code Write Protection is disabled
0341  */
0342 #define XSDFEC_ADD_LDPC_CODE_PARAMS                                            \
0343     _IOW(XSDFEC_MAGIC, 5, struct xsdfec_ldpc_params)
0344 /**
0345  * DOC: XSDFEC_GET_CONFIG
0346  * @Parameters
0347  *
0348  * @struct xsdfec_config *
0349  *  Pointer to the &struct xsdfec_config that contains the current
0350  *  configuration settings of the SD-FEC Block
0351  *
0352  * @Description
0353  *
0354  * ioctl that returns SD-FEC core configuration
0355  */
0356 #define XSDFEC_GET_CONFIG _IOR(XSDFEC_MAGIC, 6, struct xsdfec_config)
0357 /**
0358  * DOC: XSDFEC_GET_TURBO
0359  * @Parameters
0360  *
0361  * @struct xsdfec_turbo *
0362  *  Pointer to the &struct xsdfec_turbo that contains the current Turbo
0363  *  decode settings of the SD-FEC Block
0364  *
0365  * @Description
0366  *
0367  * ioctl that returns SD-FEC turbo param values
0368  */
0369 #define XSDFEC_GET_TURBO _IOR(XSDFEC_MAGIC, 7, struct xsdfec_turbo)
0370 /**
0371  * DOC: XSDFEC_SET_ORDER
0372  * @Parameters
0373  *
0374  * @struct unsigned long *
0375  *  Pointer to the unsigned long that contains a value from the
0376  *  @enum xsdfec_order
0377  *
0378  * @Description
0379  *
0380  * ioctl that sets order, if order of blocks can change from input to output
0381  *
0382  * This can only be used when the driver is in the XSDFEC_STOPPED state
0383  */
0384 #define XSDFEC_SET_ORDER _IOW(XSDFEC_MAGIC, 8, unsigned long)
0385 /**
0386  * DOC: XSDFEC_SET_BYPASS
0387  * @Parameters
0388  *
0389  * @struct bool *
0390  *  Pointer to bool that sets the bypass value, where false results in
0391  *  normal operation and false results in the SD-FEC performing the
0392  *  configured operations (same number of cycles) but output data matches
0393  *  the input data
0394  *
0395  * @Description
0396  *
0397  * ioctl that sets bypass.
0398  *
0399  * This can only be used when the driver is in the XSDFEC_STOPPED state
0400  */
0401 #define XSDFEC_SET_BYPASS _IOW(XSDFEC_MAGIC, 9, bool)
0402 /**
0403  * DOC: XSDFEC_IS_ACTIVE
0404  * @Parameters
0405  *
0406  * @struct bool *
0407  *  Pointer to bool that returns true if the SD-FEC is processing data
0408  *
0409  * @Description
0410  *
0411  * ioctl that determines if SD-FEC is processing data
0412  */
0413 #define XSDFEC_IS_ACTIVE _IOR(XSDFEC_MAGIC, 10, bool)
0414 /**
0415  * DOC: XSDFEC_CLEAR_STATS
0416  *
0417  * @Description
0418  *
0419  * ioctl that clears error stats collected during interrupts
0420  */
0421 #define XSDFEC_CLEAR_STATS _IO(XSDFEC_MAGIC, 11)
0422 /**
0423  * DOC: XSDFEC_GET_STATS
0424  * @Parameters
0425  *
0426  * @struct xsdfec_stats *
0427  *  Pointer to the &struct xsdfec_stats that will contain the updated stats
0428  *  values
0429  *
0430  * @Description
0431  *
0432  * ioctl that returns SD-FEC core stats
0433  *
0434  * This can only be used when the driver is in the XSDFEC_STOPPED state
0435  */
0436 #define XSDFEC_GET_STATS _IOR(XSDFEC_MAGIC, 12, struct xsdfec_stats)
0437 /**
0438  * DOC: XSDFEC_SET_DEFAULT_CONFIG
0439  *
0440  * @Description
0441  *
0442  * ioctl that returns SD-FEC core to default config, use after a reset
0443  *
0444  * This can only be used when the driver is in the XSDFEC_STOPPED state
0445  */
0446 #define XSDFEC_SET_DEFAULT_CONFIG _IO(XSDFEC_MAGIC, 13)
0447
0448 #endif /* __XILINX_SDFEC_H__ */