uapi/linux/virtio_pcidev.h

0001 /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
0002 /*
0003  * Copyright (C) 2021 Intel Corporation
0004  * Author: Johannes Berg <johannes@sipsolutions.net>
0005  */
0006 #ifndef _UAPI_LINUX_VIRTIO_PCIDEV_H
0007 #define _UAPI_LINUX_VIRTIO_PCIDEV_H
0008 #include <linux/types.h>
0009
0010 /**
0011  * enum virtio_pcidev_ops - virtual PCI device operations
0012  * @VIRTIO_PCIDEV_OP_RESERVED: reserved to catch errors
0013  * @VIRTIO_PCIDEV_OP_CFG_READ: read config space, size is 1, 2, 4 or 8;
0014  *  the @data field should be filled in by the device (in little endian).
0015  * @VIRTIO_PCIDEV_OP_CFG_WRITE: write config space, size is 1, 2, 4 or 8;
0016  *  the @data field contains the data to write (in little endian).
0017  * @VIRTIO_PCIDEV_OP_MMIO_READ: read BAR mem/pio, size can be variable;
0018  *  the @data field should be filled in by the device (in little endian).
0019  * @VIRTIO_PCIDEV_OP_MMIO_WRITE: write BAR mem/pio, size can be variable;
0020  *  the @data field contains the data to write (in little endian).
0021  * @VIRTIO_PCIDEV_OP_MMIO_MEMSET: memset MMIO, size is variable but
0022  *  the @data field only has one byte (unlike @VIRTIO_PCIDEV_OP_MMIO_WRITE)
0023  * @VIRTIO_PCIDEV_OP_INT: legacy INTx# pin interrupt, the addr field is 1-4 for
0024  *  the number
0025  * @VIRTIO_PCIDEV_OP_MSI: MSI(-X) interrupt, this message basically transports
0026  *  the 16- or 32-bit write that would otherwise be done into memory,
0027  *  analogous to the write messages (@VIRTIO_PCIDEV_OP_MMIO_WRITE) above
0028  * @VIRTIO_PCIDEV_OP_PME: Dummy message whose content is ignored (and should be
0029  *  all zeroes) to signal the PME# pin.
0030  */
0031 enum virtio_pcidev_ops {
0032     VIRTIO_PCIDEV_OP_RESERVED = 0,
0033     VIRTIO_PCIDEV_OP_CFG_READ,
0034     VIRTIO_PCIDEV_OP_CFG_WRITE,
0035     VIRTIO_PCIDEV_OP_MMIO_READ,
0036     VIRTIO_PCIDEV_OP_MMIO_WRITE,
0037     VIRTIO_PCIDEV_OP_MMIO_MEMSET,
0038     VIRTIO_PCIDEV_OP_INT,
0039     VIRTIO_PCIDEV_OP_MSI,
0040     VIRTIO_PCIDEV_OP_PME,
0041 };
0042
0043 /**
0044  * struct virtio_pcidev_msg - virtio PCI device operation
0045  * @op: the operation to do
0046  * @bar: the bar (only with BAR read/write messages)
0047  * @reserved: reserved
0048  * @size: the size of the read/write (in bytes)
0049  * @addr: the address to read/write
0050  * @data: the data, normally @size long, but just one byte for
0051  *  %VIRTIO_PCIDEV_OP_MMIO_MEMSET
0052  *
0053  * Note: the fields are all in native (CPU) endian, however, the
0054  * @data values will often be in little endian (see the ops above.)
0055  */
0056 struct virtio_pcidev_msg {
0057     __u8 op;
0058     __u8 bar;
0059     __u16 reserved;
0060     __u32 size;
0061     __u64 addr;
0062     __u8 data[];
0063 };
0064
0065 #endif /* _UAPI_LINUX_VIRTIO_PCIDEV_H */