linux/spi/spidev.h

0001 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
0002 /*
0003  * include/linux/spi/spidev.h
0004  *
0005  * Copyright (C) 2006 SWAPP
0006  *  Andrea Paterniani <a.paterniani@swapp-eng.it>
0007  *
0008  * This program is free software; you can redistribute it and/or modify
0009  * it under the terms of the GNU General Public License as published by
0010  * the Free Software Foundation; either version 2 of the License, or
0011  * (at your option) any later version.
0012  *
0013  * This program is distributed in the hope that it will be useful,
0014  * but WITHOUT ANY WARRANTY; without even the implied warranty of
0015  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
0016  * GNU General Public License for more details.
0017  *
0018  * You should have received a copy of the GNU General Public License
0019  * along with this program; if not, write to the Free Software
0020  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
0021   */
0022
0023 #ifndef SPIDEV_H
0024 #define SPIDEV_H
0025
0026 #include <linux/types.h>
0027 #include <linux/ioctl.h>
0028 #include <linux/spi/spi.h>
0029
0030 /* IOCTL commands */
0031
0032 #define SPI_IOC_MAGIC           'k'
0033
0034 /**
0035  * struct spi_ioc_transfer - describes a single SPI transfer
0036  * @tx_buf: Holds pointer to userspace buffer with transmit data, or null.
0037  *  If no data is provided, zeroes are shifted out.
0038  * @rx_buf: Holds pointer to userspace buffer for receive data, or null.
0039  * @len: Length of tx and rx buffers, in bytes.
0040  * @speed_hz: Temporary override of the device's bitrate.
0041  * @bits_per_word: Temporary override of the device's wordsize.
0042  * @delay_usecs: If nonzero, how long to delay after the last bit transfer
0043  *  before optionally deselecting the device before the next transfer.
0044  * @cs_change: True to deselect device before starting the next transfer.
0045  * @word_delay_usecs: If nonzero, how long to wait between words within one
0046  *  transfer. This property needs explicit support in the SPI controller,
0047  *  otherwise it is silently ignored.
0048  *
0049  * This structure is mapped directly to the kernel spi_transfer structure;
0050  * the fields have the same meanings, except of course that the pointers
0051  * are in a different address space (and may be of different sizes in some
0052  * cases, such as 32-bit i386 userspace over a 64-bit x86_64 kernel).
0053  * Zero-initialize the structure, including currently unused fields, to
0054  * accommodate potential future updates.
0055  *
0056  * SPI_IOC_MESSAGE gives userspace the equivalent of kernel spi_sync().
0057  * Pass it an array of related transfers, they'll execute together.
0058  * Each transfer may be half duplex (either direction) or full duplex.
0059  *
0060  *  struct spi_ioc_transfer mesg[4];
0061  *  ...
0062  *  status = ioctl(fd, SPI_IOC_MESSAGE(4), mesg);
0063  *
0064  * So for example one transfer might send a nine bit command (right aligned
0065  * in a 16-bit word), the next could read a block of 8-bit data before
0066  * terminating that command by temporarily deselecting the chip; the next
0067  * could send a different nine bit command (re-selecting the chip), and the
0068  * last transfer might write some register values.
0069  */
0070 struct spi_ioc_transfer {
0071     __u64       tx_buf;
0072     __u64       rx_buf;
0073
0074     __u32       len;
0075     __u32       speed_hz;
0076
0077     __u16       delay_usecs;
0078     __u8        bits_per_word;
0079     __u8        cs_change;
0080     __u8        tx_nbits;
0081     __u8        rx_nbits;
0082     __u8        word_delay_usecs;
0083     __u8        pad;
0084
0085     /* If the contents of 'struct spi_ioc_transfer' ever change
0086      * incompatibly, then the ioctl number (currently 0) must change;
0087      * ioctls with constant size fields get a bit more in the way of
0088      * error checking than ones (like this) where that field varies.
0089      *
0090      * NOTE: struct layout is the same in 64bit and 32bit userspace.
0091      */
0092 };
0093
0094 /* not all platforms use <asm-generic/ioctl.h> or _IOC_TYPECHECK() ... */
0095 #define SPI_MSGSIZE(N) \
0096     ((((N)*(sizeof (struct spi_ioc_transfer))) < (1 << _IOC_SIZEBITS)) \
0097         ? ((N)*(sizeof (struct spi_ioc_transfer))) : 0)
0098 #define SPI_IOC_MESSAGE(N) _IOW(SPI_IOC_MAGIC, 0, char[SPI_MSGSIZE(N)])
0099
0100
0101 /* Read / Write of SPI mode (SPI_MODE_0..SPI_MODE_3) (limited to 8 bits) */
0102 #define SPI_IOC_RD_MODE         _IOR(SPI_IOC_MAGIC, 1, __u8)
0103 #define SPI_IOC_WR_MODE         _IOW(SPI_IOC_MAGIC, 1, __u8)
0104
0105 /* Read / Write SPI bit justification */
0106 #define SPI_IOC_RD_LSB_FIRST        _IOR(SPI_IOC_MAGIC, 2, __u8)
0107 #define SPI_IOC_WR_LSB_FIRST        _IOW(SPI_IOC_MAGIC, 2, __u8)
0108
0109 /* Read / Write SPI device word length (1..N) */
0110 #define SPI_IOC_RD_BITS_PER_WORD    _IOR(SPI_IOC_MAGIC, 3, __u8)
0111 #define SPI_IOC_WR_BITS_PER_WORD    _IOW(SPI_IOC_MAGIC, 3, __u8)
0112
0113 /* Read / Write SPI device default max speed hz */
0114 #define SPI_IOC_RD_MAX_SPEED_HZ     _IOR(SPI_IOC_MAGIC, 4, __u32)
0115 #define SPI_IOC_WR_MAX_SPEED_HZ     _IOW(SPI_IOC_MAGIC, 4, __u32)
0116
0117 /* Read / Write of the SPI mode field */
0118 #define SPI_IOC_RD_MODE32       _IOR(SPI_IOC_MAGIC, 5, __u32)
0119 #define SPI_IOC_WR_MODE32       _IOW(SPI_IOC_MAGIC, 5, __u32)
0120
0121
0122
0123 #endif /* SPIDEV_H */