uapi/linux/serial.h

0001 /* SPDX-License-Identifier: GPL-1.0+ WITH Linux-syscall-note */
0002 /*
0003  * include/linux/serial.h
0004  *
0005  * Copyright (C) 1992 by Theodore Ts'o.
0006  *
0007  * Redistribution of this file is permitted under the terms of the GNU
0008  * Public License (GPL)
0009  */
0010
0011 #ifndef _UAPI_LINUX_SERIAL_H
0012 #define _UAPI_LINUX_SERIAL_H
0013
0014 #include <linux/types.h>
0015
0016 #include <linux/tty_flags.h>
0017
0018
0019 struct serial_struct {
0020     int type;
0021     int line;
0022     unsigned int    port;
0023     int irq;
0024     int flags;
0025     int xmit_fifo_size;
0026     int custom_divisor;
0027     int baud_base;
0028     unsigned short  close_delay;
0029     char    io_type;
0030     char    reserved_char[1];
0031     int hub6;
0032     unsigned short  closing_wait; /* time to wait before closing */
0033     unsigned short  closing_wait2; /* no longer used... */
0034     unsigned char   *iomem_base;
0035     unsigned short  iomem_reg_shift;
0036     unsigned int    port_high;
0037     unsigned long   iomap_base; /* cookie passed into ioremap */
0038 };
0039
0040 /*
0041  * For the close wait times, 0 means wait forever for serial port to
0042  * flush its output.  65535 means don't wait at all.
0043  */
0044 #define ASYNC_CLOSING_WAIT_INF  0
0045 #define ASYNC_CLOSING_WAIT_NONE 65535
0046
0047 /*
0048  * These are the supported serial types.
0049  */
0050 #define PORT_UNKNOWN    0
0051 #define PORT_8250   1
0052 #define PORT_16450  2
0053 #define PORT_16550  3
0054 #define PORT_16550A 4
0055 #define PORT_CIRRUS     5
0056 #define PORT_16650  6
0057 #define PORT_16650V2    7
0058 #define PORT_16750  8
0059 #define PORT_STARTECH   9
0060 #define PORT_16C950 10  /* Oxford Semiconductor */
0061 #define PORT_16654  11
0062 #define PORT_16850  12
0063 #define PORT_RSA    13  /* RSA-DV II/S card */
0064 #define PORT_MAX    13
0065
0066 #define SERIAL_IO_PORT  0
0067 #define SERIAL_IO_HUB6  1
0068 #define SERIAL_IO_MEM   2
0069 #define SERIAL_IO_MEM32   3
0070 #define SERIAL_IO_AU      4
0071 #define SERIAL_IO_TSI     5
0072 #define SERIAL_IO_MEM32BE 6
0073 #define SERIAL_IO_MEM16 7
0074
0075 #define UART_CLEAR_FIFO     0x01
0076 #define UART_USE_FIFO       0x02
0077 #define UART_STARTECH       0x04
0078 #define UART_NATSEMI        0x08
0079
0080
0081 /*
0082  * Multiport serial configuration structure --- external structure
0083  */
0084 struct serial_multiport_struct {
0085     int     irq;
0086     int     port1;
0087     unsigned char   mask1, match1;
0088     int     port2;
0089     unsigned char   mask2, match2;
0090     int     port3;
0091     unsigned char   mask3, match3;
0092     int     port4;
0093     unsigned char   mask4, match4;
0094     int     port_monitor;
0095     int reserved[32];
0096 };
0097
0098 /*
0099  * Serial input interrupt line counters -- external structure
0100  * Four lines can interrupt: CTS, DSR, RI, DCD
0101  */
0102 struct serial_icounter_struct {
0103     int cts, dsr, rng, dcd;
0104     int rx, tx;
0105     int frame, overrun, parity, brk;
0106     int buf_overrun;
0107     int reserved[9];
0108 };
0109
0110 /*
0111  * Serial interface for controlling RS485 settings on chips with suitable
0112  * support. Set with TIOCSRS485 and get with TIOCGRS485 if supported by your
0113  * platform. The set function returns the new state, with any unsupported bits
0114  * reverted appropriately.
0115  */
0116
0117 struct serial_rs485 {
0118     __u32   flags;          /* RS485 feature flags */
0119 #define SER_RS485_ENABLED       (1 << 0)    /* If enabled */
0120 #define SER_RS485_RTS_ON_SEND       (1 << 1)    /* Logical level for
0121                                RTS pin when
0122                                sending */
0123 #define SER_RS485_RTS_AFTER_SEND    (1 << 2)    /* Logical level for
0124                                RTS pin after sent*/
0125 #define SER_RS485_RX_DURING_TX      (1 << 4)
0126 #define SER_RS485_TERMINATE_BUS     (1 << 5)    /* Enable bus
0127                                termination
0128                                (if supported) */
0129
0130 /* RS-485 addressing mode */
0131 #define SER_RS485_ADDRB         (1 << 6)    /* Enable addressing mode */
0132 #define SER_RS485_ADDR_RECV     (1 << 7)    /* Receive address filter */
0133 #define SER_RS485_ADDR_DEST     (1 << 8)    /* Destination address */
0134
0135     __u32   delay_rts_before_send;  /* Delay before send (milliseconds) */
0136     __u32   delay_rts_after_send;   /* Delay after send (milliseconds) */
0137
0138     /* The fields below are defined by flags */
0139     union {
0140         __u32   padding[5];     /* Memory is cheap, new structs are a pain */
0141
0142         struct {
0143             __u8    addr_recv;
0144             __u8    addr_dest;
0145             __u8    padding0[2];
0146             __u32   padding1[4];
0147         };
0148     };
0149 };
0150
0151 /*
0152  * Serial interface for controlling ISO7816 settings on chips with suitable
0153  * support. Set with TIOCSISO7816 and get with TIOCGISO7816 if supported by
0154  * your platform.
0155  */
0156 struct serial_iso7816 {
0157     __u32   flags;          /* ISO7816 feature flags */
0158 #define SER_ISO7816_ENABLED     (1 << 0)
0159 #define SER_ISO7816_T_PARAM     (0x0f << 4)
0160 #define SER_ISO7816_T(t)        (((t) & 0x0f) << 4)
0161     __u32   tg;
0162     __u32   sc_fi;
0163     __u32   sc_di;
0164     __u32   clk;
0165     __u32   reserved[5];
0166 };
0167
0168 #endif /* _UAPI_LINUX_SERIAL_H */