0001
0002 #ifndef __LINUX_PKT_SCHED_H
0003 #define __LINUX_PKT_SCHED_H
0004
0005 #include <linux/const.h>
0006 #include <linux/types.h>
0007
0008
0009
0010
0011
0012
0013
0014
0015
0016
0017
0018
0019
0020
0021 #define TC_PRIO_BESTEFFORT 0
0022 #define TC_PRIO_FILLER 1
0023 #define TC_PRIO_BULK 2
0024 #define TC_PRIO_INTERACTIVE_BULK 4
0025 #define TC_PRIO_INTERACTIVE 6
0026 #define TC_PRIO_CONTROL 7
0027
0028 #define TC_PRIO_MAX 15
0029
0030
0031
0032
0033
0034 struct tc_stats {
0035 __u64 bytes;
0036 __u32 packets;
0037 __u32 drops;
0038 __u32 overlimits;
0039
0040 __u32 bps;
0041 __u32 pps;
0042 __u32 qlen;
0043 __u32 backlog;
0044 };
0045
0046 struct tc_estimator {
0047 signed char interval;
0048 unsigned char ewma_log;
0049 };
0050
0051
0052
0053
0054
0055
0056
0057
0058
0059
0060
0061
0062
0063
0064
0065
0066
0067
0068 #define TC_H_MAJ_MASK (0xFFFF0000U)
0069 #define TC_H_MIN_MASK (0x0000FFFFU)
0070 #define TC_H_MAJ(h) ((h)&TC_H_MAJ_MASK)
0071 #define TC_H_MIN(h) ((h)&TC_H_MIN_MASK)
0072 #define TC_H_MAKE(maj,min) (((maj)&TC_H_MAJ_MASK)|((min)&TC_H_MIN_MASK))
0073
0074 #define TC_H_UNSPEC (0U)
0075 #define TC_H_ROOT (0xFFFFFFFFU)
0076 #define TC_H_INGRESS (0xFFFFFFF1U)
0077 #define TC_H_CLSACT TC_H_INGRESS
0078
0079 #define TC_H_MIN_PRIORITY 0xFFE0U
0080 #define TC_H_MIN_INGRESS 0xFFF2U
0081 #define TC_H_MIN_EGRESS 0xFFF3U
0082
0083
0084 enum tc_link_layer {
0085 TC_LINKLAYER_UNAWARE,
0086 TC_LINKLAYER_ETHERNET,
0087 TC_LINKLAYER_ATM,
0088 };
0089 #define TC_LINKLAYER_MASK 0x0F
0090
0091 struct tc_ratespec {
0092 unsigned char cell_log;
0093 __u8 linklayer;
0094 unsigned short overhead;
0095 short cell_align;
0096 unsigned short mpu;
0097 __u32 rate;
0098 };
0099
0100 #define TC_RTAB_SIZE 1024
0101
0102 struct tc_sizespec {
0103 unsigned char cell_log;
0104 unsigned char size_log;
0105 short cell_align;
0106 int overhead;
0107 unsigned int linklayer;
0108 unsigned int mpu;
0109 unsigned int mtu;
0110 unsigned int tsize;
0111 };
0112
0113 enum {
0114 TCA_STAB_UNSPEC,
0115 TCA_STAB_BASE,
0116 TCA_STAB_DATA,
0117 __TCA_STAB_MAX
0118 };
0119
0120 #define TCA_STAB_MAX (__TCA_STAB_MAX - 1)
0121
0122
0123
0124 struct tc_fifo_qopt {
0125 __u32 limit;
0126 };
0127
0128
0129
0130
0131
0132
0133
0134
0135
0136
0137 #define SKBPRIO_MAX_PRIORITY 64
0138
0139 struct tc_skbprio_qopt {
0140 __u32 limit;
0141 };
0142
0143
0144
0145 #define TCQ_PRIO_BANDS 16
0146 #define TCQ_MIN_PRIO_BANDS 2
0147
0148 struct tc_prio_qopt {
0149 int bands;
0150 __u8 priomap[TC_PRIO_MAX+1];
0151 };
0152
0153
0154
0155 struct tc_multiq_qopt {
0156 __u16 bands;
0157 __u16 max_bands;
0158 };
0159
0160
0161
0162 #define TCQ_PLUG_BUFFER 0
0163 #define TCQ_PLUG_RELEASE_ONE 1
0164 #define TCQ_PLUG_RELEASE_INDEFINITE 2
0165 #define TCQ_PLUG_LIMIT 3
0166
0167 struct tc_plug_qopt {
0168
0169
0170
0171
0172
0173
0174
0175
0176
0177 int action;
0178 __u32 limit;
0179 };
0180
0181
0182
0183 struct tc_tbf_qopt {
0184 struct tc_ratespec rate;
0185 struct tc_ratespec peakrate;
0186 __u32 limit;
0187 __u32 buffer;
0188 __u32 mtu;
0189 };
0190
0191 enum {
0192 TCA_TBF_UNSPEC,
0193 TCA_TBF_PARMS,
0194 TCA_TBF_RTAB,
0195 TCA_TBF_PTAB,
0196 TCA_TBF_RATE64,
0197 TCA_TBF_PRATE64,
0198 TCA_TBF_BURST,
0199 TCA_TBF_PBURST,
0200 TCA_TBF_PAD,
0201 __TCA_TBF_MAX,
0202 };
0203
0204 #define TCA_TBF_MAX (__TCA_TBF_MAX - 1)
0205
0206
0207
0208
0209
0210
0211
0212
0213 struct tc_sfq_qopt {
0214 unsigned quantum;
0215 int perturb_period;
0216 __u32 limit;
0217 unsigned divisor;
0218 unsigned flows;
0219 };
0220
0221 struct tc_sfqred_stats {
0222 __u32 prob_drop;
0223 __u32 forced_drop;
0224 __u32 prob_mark;
0225 __u32 forced_mark;
0226 __u32 prob_mark_head;
0227 __u32 forced_mark_head;
0228 };
0229
0230 struct tc_sfq_qopt_v1 {
0231 struct tc_sfq_qopt v0;
0232 unsigned int depth;
0233 unsigned int headdrop;
0234
0235 __u32 limit;
0236 __u32 qth_min;
0237 __u32 qth_max;
0238 unsigned char Wlog;
0239 unsigned char Plog;
0240 unsigned char Scell_log;
0241 unsigned char flags;
0242 __u32 max_P;
0243
0244 struct tc_sfqred_stats stats;
0245 };
0246
0247
0248 struct tc_sfq_xstats {
0249 __s32 allot;
0250 };
0251
0252
0253
0254 enum {
0255 TCA_RED_UNSPEC,
0256 TCA_RED_PARMS,
0257 TCA_RED_STAB,
0258 TCA_RED_MAX_P,
0259 TCA_RED_FLAGS,
0260 TCA_RED_EARLY_DROP_BLOCK,
0261 TCA_RED_MARK_BLOCK,
0262 __TCA_RED_MAX,
0263 };
0264
0265 #define TCA_RED_MAX (__TCA_RED_MAX - 1)
0266
0267 struct tc_red_qopt {
0268 __u32 limit;
0269 __u32 qth_min;
0270 __u32 qth_max;
0271 unsigned char Wlog;
0272 unsigned char Plog;
0273 unsigned char Scell_log;
0274
0275
0276
0277
0278
0279
0280
0281
0282
0283
0284
0285
0286
0287 unsigned char flags;
0288 #define TC_RED_ECN 1
0289 #define TC_RED_HARDDROP 2
0290 #define TC_RED_ADAPTATIVE 4
0291 #define TC_RED_NODROP 8
0292 };
0293
0294 #define TC_RED_HISTORIC_FLAGS (TC_RED_ECN | TC_RED_HARDDROP | TC_RED_ADAPTATIVE)
0295
0296 struct tc_red_xstats {
0297 __u32 early;
0298 __u32 pdrop;
0299 __u32 other;
0300 __u32 marked;
0301 };
0302
0303
0304
0305 #define MAX_DPs 16
0306
0307 enum {
0308 TCA_GRED_UNSPEC,
0309 TCA_GRED_PARMS,
0310 TCA_GRED_STAB,
0311 TCA_GRED_DPS,
0312 TCA_GRED_MAX_P,
0313 TCA_GRED_LIMIT,
0314 TCA_GRED_VQ_LIST,
0315 __TCA_GRED_MAX,
0316 };
0317
0318 #define TCA_GRED_MAX (__TCA_GRED_MAX - 1)
0319
0320 enum {
0321 TCA_GRED_VQ_ENTRY_UNSPEC,
0322 TCA_GRED_VQ_ENTRY,
0323 __TCA_GRED_VQ_ENTRY_MAX,
0324 };
0325 #define TCA_GRED_VQ_ENTRY_MAX (__TCA_GRED_VQ_ENTRY_MAX - 1)
0326
0327 enum {
0328 TCA_GRED_VQ_UNSPEC,
0329 TCA_GRED_VQ_PAD,
0330 TCA_GRED_VQ_DP,
0331 TCA_GRED_VQ_STAT_BYTES,
0332 TCA_GRED_VQ_STAT_PACKETS,
0333 TCA_GRED_VQ_STAT_BACKLOG,
0334 TCA_GRED_VQ_STAT_PROB_DROP,
0335 TCA_GRED_VQ_STAT_PROB_MARK,
0336 TCA_GRED_VQ_STAT_FORCED_DROP,
0337 TCA_GRED_VQ_STAT_FORCED_MARK,
0338 TCA_GRED_VQ_STAT_PDROP,
0339 TCA_GRED_VQ_STAT_OTHER,
0340 TCA_GRED_VQ_FLAGS,
0341 __TCA_GRED_VQ_MAX
0342 };
0343
0344 #define TCA_GRED_VQ_MAX (__TCA_GRED_VQ_MAX - 1)
0345
0346 struct tc_gred_qopt {
0347 __u32 limit;
0348 __u32 qth_min;
0349 __u32 qth_max;
0350 __u32 DP;
0351 __u32 backlog;
0352 __u32 qave;
0353 __u32 forced;
0354 __u32 early;
0355 __u32 other;
0356 __u32 pdrop;
0357 __u8 Wlog;
0358 __u8 Plog;
0359 __u8 Scell_log;
0360 __u8 prio;
0361 __u32 packets;
0362 __u32 bytesin;
0363 };
0364
0365
0366 struct tc_gred_sopt {
0367 __u32 DPs;
0368 __u32 def_DP;
0369 __u8 grio;
0370 __u8 flags;
0371 __u16 pad1;
0372 };
0373
0374
0375
0376 enum {
0377 TCA_CHOKE_UNSPEC,
0378 TCA_CHOKE_PARMS,
0379 TCA_CHOKE_STAB,
0380 TCA_CHOKE_MAX_P,
0381 __TCA_CHOKE_MAX,
0382 };
0383
0384 #define TCA_CHOKE_MAX (__TCA_CHOKE_MAX - 1)
0385
0386 struct tc_choke_qopt {
0387 __u32 limit;
0388 __u32 qth_min;
0389 __u32 qth_max;
0390 unsigned char Wlog;
0391 unsigned char Plog;
0392 unsigned char Scell_log;
0393 unsigned char flags;
0394 };
0395
0396 struct tc_choke_xstats {
0397 __u32 early;
0398 __u32 pdrop;
0399 __u32 other;
0400 __u32 marked;
0401 __u32 matched;
0402 };
0403
0404
0405 #define TC_HTB_NUMPRIO 8
0406 #define TC_HTB_MAXDEPTH 8
0407 #define TC_HTB_PROTOVER 3
0408
0409 struct tc_htb_opt {
0410 struct tc_ratespec rate;
0411 struct tc_ratespec ceil;
0412 __u32 buffer;
0413 __u32 cbuffer;
0414 __u32 quantum;
0415 __u32 level;
0416 __u32 prio;
0417 };
0418 struct tc_htb_glob {
0419 __u32 version;
0420 __u32 rate2quantum;
0421 __u32 defcls;
0422 __u32 debug;
0423
0424
0425 __u32 direct_pkts;
0426 };
0427 enum {
0428 TCA_HTB_UNSPEC,
0429 TCA_HTB_PARMS,
0430 TCA_HTB_INIT,
0431 TCA_HTB_CTAB,
0432 TCA_HTB_RTAB,
0433 TCA_HTB_DIRECT_QLEN,
0434 TCA_HTB_RATE64,
0435 TCA_HTB_CEIL64,
0436 TCA_HTB_PAD,
0437 TCA_HTB_OFFLOAD,
0438 __TCA_HTB_MAX,
0439 };
0440
0441 #define TCA_HTB_MAX (__TCA_HTB_MAX - 1)
0442
0443 struct tc_htb_xstats {
0444 __u32 lends;
0445 __u32 borrows;
0446 __u32 giants;
0447 __s32 tokens;
0448 __s32 ctokens;
0449 };
0450
0451
0452
0453 struct tc_hfsc_qopt {
0454 __u16 defcls;
0455 };
0456
0457 struct tc_service_curve {
0458 __u32 m1;
0459 __u32 d;
0460 __u32 m2;
0461 };
0462
0463 struct tc_hfsc_stats {
0464 __u64 work;
0465 __u64 rtwork;
0466 __u32 period;
0467 __u32 level;
0468 };
0469
0470 enum {
0471 TCA_HFSC_UNSPEC,
0472 TCA_HFSC_RSC,
0473 TCA_HFSC_FSC,
0474 TCA_HFSC_USC,
0475 __TCA_HFSC_MAX,
0476 };
0477
0478 #define TCA_HFSC_MAX (__TCA_HFSC_MAX - 1)
0479
0480
0481
0482
0483 #define TC_CBQ_MAXPRIO 8
0484 #define TC_CBQ_MAXLEVEL 8
0485 #define TC_CBQ_DEF_EWMA 5
0486
0487 struct tc_cbq_lssopt {
0488 unsigned char change;
0489 unsigned char flags;
0490 #define TCF_CBQ_LSS_BOUNDED 1
0491 #define TCF_CBQ_LSS_ISOLATED 2
0492 unsigned char ewma_log;
0493 unsigned char level;
0494 #define TCF_CBQ_LSS_FLAGS 1
0495 #define TCF_CBQ_LSS_EWMA 2
0496 #define TCF_CBQ_LSS_MAXIDLE 4
0497 #define TCF_CBQ_LSS_MINIDLE 8
0498 #define TCF_CBQ_LSS_OFFTIME 0x10
0499 #define TCF_CBQ_LSS_AVPKT 0x20
0500 __u32 maxidle;
0501 __u32 minidle;
0502 __u32 offtime;
0503 __u32 avpkt;
0504 };
0505
0506 struct tc_cbq_wrropt {
0507 unsigned char flags;
0508 unsigned char priority;
0509 unsigned char cpriority;
0510 unsigned char __reserved;
0511 __u32 allot;
0512 __u32 weight;
0513 };
0514
0515 struct tc_cbq_ovl {
0516 unsigned char strategy;
0517 #define TC_CBQ_OVL_CLASSIC 0
0518 #define TC_CBQ_OVL_DELAY 1
0519 #define TC_CBQ_OVL_LOWPRIO 2
0520 #define TC_CBQ_OVL_DROP 3
0521 #define TC_CBQ_OVL_RCLASSIC 4
0522 unsigned char priority2;
0523 __u16 pad;
0524 __u32 penalty;
0525 };
0526
0527 struct tc_cbq_police {
0528 unsigned char police;
0529 unsigned char __res1;
0530 unsigned short __res2;
0531 };
0532
0533 struct tc_cbq_fopt {
0534 __u32 split;
0535 __u32 defmap;
0536 __u32 defchange;
0537 };
0538
0539 struct tc_cbq_xstats {
0540 __u32 borrows;
0541 __u32 overactions;
0542 __s32 avgidle;
0543 __s32 undertime;
0544 };
0545
0546 enum {
0547 TCA_CBQ_UNSPEC,
0548 TCA_CBQ_LSSOPT,
0549 TCA_CBQ_WRROPT,
0550 TCA_CBQ_FOPT,
0551 TCA_CBQ_OVL_STRATEGY,
0552 TCA_CBQ_RATE,
0553 TCA_CBQ_RTAB,
0554 TCA_CBQ_POLICE,
0555 __TCA_CBQ_MAX,
0556 };
0557
0558 #define TCA_CBQ_MAX (__TCA_CBQ_MAX - 1)
0559
0560
0561
0562 enum {
0563 TCA_DSMARK_UNSPEC,
0564 TCA_DSMARK_INDICES,
0565 TCA_DSMARK_DEFAULT_INDEX,
0566 TCA_DSMARK_SET_TC_INDEX,
0567 TCA_DSMARK_MASK,
0568 TCA_DSMARK_VALUE,
0569 __TCA_DSMARK_MAX,
0570 };
0571
0572 #define TCA_DSMARK_MAX (__TCA_DSMARK_MAX - 1)
0573
0574
0575
0576 enum {
0577 TCA_ATM_UNSPEC,
0578 TCA_ATM_FD,
0579 TCA_ATM_PTR,
0580 TCA_ATM_HDR,
0581 TCA_ATM_EXCESS,
0582 TCA_ATM_ADDR,
0583 TCA_ATM_STATE,
0584 __TCA_ATM_MAX,
0585 };
0586
0587 #define TCA_ATM_MAX (__TCA_ATM_MAX - 1)
0588
0589
0590
0591 enum {
0592 TCA_NETEM_UNSPEC,
0593 TCA_NETEM_CORR,
0594 TCA_NETEM_DELAY_DIST,
0595 TCA_NETEM_REORDER,
0596 TCA_NETEM_CORRUPT,
0597 TCA_NETEM_LOSS,
0598 TCA_NETEM_RATE,
0599 TCA_NETEM_ECN,
0600 TCA_NETEM_RATE64,
0601 TCA_NETEM_PAD,
0602 TCA_NETEM_LATENCY64,
0603 TCA_NETEM_JITTER64,
0604 TCA_NETEM_SLOT,
0605 TCA_NETEM_SLOT_DIST,
0606 __TCA_NETEM_MAX,
0607 };
0608
0609 #define TCA_NETEM_MAX (__TCA_NETEM_MAX - 1)
0610
0611 struct tc_netem_qopt {
0612 __u32 latency;
0613 __u32 limit;
0614 __u32 loss;
0615 __u32 gap;
0616 __u32 duplicate;
0617 __u32 jitter;
0618 };
0619
0620 struct tc_netem_corr {
0621 __u32 delay_corr;
0622 __u32 loss_corr;
0623 __u32 dup_corr;
0624 };
0625
0626 struct tc_netem_reorder {
0627 __u32 probability;
0628 __u32 correlation;
0629 };
0630
0631 struct tc_netem_corrupt {
0632 __u32 probability;
0633 __u32 correlation;
0634 };
0635
0636 struct tc_netem_rate {
0637 __u32 rate;
0638 __s32 packet_overhead;
0639 __u32 cell_size;
0640 __s32 cell_overhead;
0641 };
0642
0643 struct tc_netem_slot {
0644 __s64 min_delay;
0645 __s64 max_delay;
0646 __s32 max_packets;
0647 __s32 max_bytes;
0648 __s64 dist_delay;
0649 __s64 dist_jitter;
0650 };
0651
0652 enum {
0653 NETEM_LOSS_UNSPEC,
0654 NETEM_LOSS_GI,
0655 NETEM_LOSS_GE,
0656 __NETEM_LOSS_MAX
0657 };
0658 #define NETEM_LOSS_MAX (__NETEM_LOSS_MAX - 1)
0659
0660
0661 struct tc_netem_gimodel {
0662 __u32 p13;
0663 __u32 p31;
0664 __u32 p32;
0665 __u32 p14;
0666 __u32 p23;
0667 };
0668
0669
0670 struct tc_netem_gemodel {
0671 __u32 p;
0672 __u32 r;
0673 __u32 h;
0674 __u32 k1;
0675 };
0676
0677 #define NETEM_DIST_SCALE 8192
0678 #define NETEM_DIST_MAX 16384
0679
0680
0681
0682 enum {
0683 TCA_DRR_UNSPEC,
0684 TCA_DRR_QUANTUM,
0685 __TCA_DRR_MAX
0686 };
0687
0688 #define TCA_DRR_MAX (__TCA_DRR_MAX - 1)
0689
0690 struct tc_drr_stats {
0691 __u32 deficit;
0692 };
0693
0694
0695 #define TC_QOPT_BITMASK 15
0696 #define TC_QOPT_MAX_QUEUE 16
0697
0698 enum {
0699 TC_MQPRIO_HW_OFFLOAD_NONE,
0700 TC_MQPRIO_HW_OFFLOAD_TCS,
0701 __TC_MQPRIO_HW_OFFLOAD_MAX
0702 };
0703
0704 #define TC_MQPRIO_HW_OFFLOAD_MAX (__TC_MQPRIO_HW_OFFLOAD_MAX - 1)
0705
0706 enum {
0707 TC_MQPRIO_MODE_DCB,
0708 TC_MQPRIO_MODE_CHANNEL,
0709 __TC_MQPRIO_MODE_MAX
0710 };
0711
0712 #define __TC_MQPRIO_MODE_MAX (__TC_MQPRIO_MODE_MAX - 1)
0713
0714 enum {
0715 TC_MQPRIO_SHAPER_DCB,
0716 TC_MQPRIO_SHAPER_BW_RATE,
0717 __TC_MQPRIO_SHAPER_MAX
0718 };
0719
0720 #define __TC_MQPRIO_SHAPER_MAX (__TC_MQPRIO_SHAPER_MAX - 1)
0721
0722 struct tc_mqprio_qopt {
0723 __u8 num_tc;
0724 __u8 prio_tc_map[TC_QOPT_BITMASK + 1];
0725 __u8 hw;
0726 __u16 count[TC_QOPT_MAX_QUEUE];
0727 __u16 offset[TC_QOPT_MAX_QUEUE];
0728 };
0729
0730 #define TC_MQPRIO_F_MODE 0x1
0731 #define TC_MQPRIO_F_SHAPER 0x2
0732 #define TC_MQPRIO_F_MIN_RATE 0x4
0733 #define TC_MQPRIO_F_MAX_RATE 0x8
0734
0735 enum {
0736 TCA_MQPRIO_UNSPEC,
0737 TCA_MQPRIO_MODE,
0738 TCA_MQPRIO_SHAPER,
0739 TCA_MQPRIO_MIN_RATE64,
0740 TCA_MQPRIO_MAX_RATE64,
0741 __TCA_MQPRIO_MAX,
0742 };
0743
0744 #define TCA_MQPRIO_MAX (__TCA_MQPRIO_MAX - 1)
0745
0746
0747
0748 enum {
0749 TCA_SFB_UNSPEC,
0750 TCA_SFB_PARMS,
0751 __TCA_SFB_MAX,
0752 };
0753
0754 #define TCA_SFB_MAX (__TCA_SFB_MAX - 1)
0755
0756
0757
0758
0759 struct tc_sfb_qopt {
0760 __u32 rehash_interval;
0761 __u32 warmup_time;
0762 __u32 max;
0763 __u32 bin_size;
0764 __u32 increment;
0765 __u32 decrement;
0766 __u32 limit;
0767 __u32 penalty_rate;
0768 __u32 penalty_burst;
0769 };
0770
0771 struct tc_sfb_xstats {
0772 __u32 earlydrop;
0773 __u32 penaltydrop;
0774 __u32 bucketdrop;
0775 __u32 queuedrop;
0776 __u32 childdrop;
0777 __u32 marked;
0778 __u32 maxqlen;
0779 __u32 maxprob;
0780 __u32 avgprob;
0781 };
0782
0783 #define SFB_MAX_PROB 0xFFFF
0784
0785
0786 enum {
0787 TCA_QFQ_UNSPEC,
0788 TCA_QFQ_WEIGHT,
0789 TCA_QFQ_LMAX,
0790 __TCA_QFQ_MAX
0791 };
0792
0793 #define TCA_QFQ_MAX (__TCA_QFQ_MAX - 1)
0794
0795 struct tc_qfq_stats {
0796 __u32 weight;
0797 __u32 lmax;
0798 };
0799
0800
0801
0802 enum {
0803 TCA_CODEL_UNSPEC,
0804 TCA_CODEL_TARGET,
0805 TCA_CODEL_LIMIT,
0806 TCA_CODEL_INTERVAL,
0807 TCA_CODEL_ECN,
0808 TCA_CODEL_CE_THRESHOLD,
0809 __TCA_CODEL_MAX
0810 };
0811
0812 #define TCA_CODEL_MAX (__TCA_CODEL_MAX - 1)
0813
0814 struct tc_codel_xstats {
0815 __u32 maxpacket;
0816 __u32 count;
0817
0818
0819 __u32 lastcount;
0820 __u32 ldelay;
0821 __s32 drop_next;
0822 __u32 drop_overlimit;
0823 __u32 ecn_mark;
0824 __u32 dropping;
0825 __u32 ce_mark;
0826 };
0827
0828
0829
0830 #define FQ_CODEL_QUANTUM_MAX (1 << 20)
0831
0832 enum {
0833 TCA_FQ_CODEL_UNSPEC,
0834 TCA_FQ_CODEL_TARGET,
0835 TCA_FQ_CODEL_LIMIT,
0836 TCA_FQ_CODEL_INTERVAL,
0837 TCA_FQ_CODEL_ECN,
0838 TCA_FQ_CODEL_FLOWS,
0839 TCA_FQ_CODEL_QUANTUM,
0840 TCA_FQ_CODEL_CE_THRESHOLD,
0841 TCA_FQ_CODEL_DROP_BATCH_SIZE,
0842 TCA_FQ_CODEL_MEMORY_LIMIT,
0843 TCA_FQ_CODEL_CE_THRESHOLD_SELECTOR,
0844 TCA_FQ_CODEL_CE_THRESHOLD_MASK,
0845 __TCA_FQ_CODEL_MAX
0846 };
0847
0848 #define TCA_FQ_CODEL_MAX (__TCA_FQ_CODEL_MAX - 1)
0849
0850 enum {
0851 TCA_FQ_CODEL_XSTATS_QDISC,
0852 TCA_FQ_CODEL_XSTATS_CLASS,
0853 };
0854
0855 struct tc_fq_codel_qd_stats {
0856 __u32 maxpacket;
0857 __u32 drop_overlimit;
0858
0859
0860 __u32 ecn_mark;
0861
0862
0863 __u32 new_flow_count;
0864
0865
0866 __u32 new_flows_len;
0867 __u32 old_flows_len;
0868 __u32 ce_mark;
0869 __u32 memory_usage;
0870 __u32 drop_overmemory;
0871 };
0872
0873 struct tc_fq_codel_cl_stats {
0874 __s32 deficit;
0875 __u32 ldelay;
0876
0877
0878 __u32 count;
0879 __u32 lastcount;
0880 __u32 dropping;
0881 __s32 drop_next;
0882 };
0883
0884 struct tc_fq_codel_xstats {
0885 __u32 type;
0886 union {
0887 struct tc_fq_codel_qd_stats qdisc_stats;
0888 struct tc_fq_codel_cl_stats class_stats;
0889 };
0890 };
0891
0892
0893
0894 enum {
0895 TCA_FQ_UNSPEC,
0896
0897 TCA_FQ_PLIMIT,
0898
0899 TCA_FQ_FLOW_PLIMIT,
0900
0901 TCA_FQ_QUANTUM,
0902
0903 TCA_FQ_INITIAL_QUANTUM,
0904
0905 TCA_FQ_RATE_ENABLE,
0906
0907 TCA_FQ_FLOW_DEFAULT_RATE,
0908
0909 TCA_FQ_FLOW_MAX_RATE,
0910
0911 TCA_FQ_BUCKETS_LOG,
0912
0913 TCA_FQ_FLOW_REFILL_DELAY,
0914
0915 TCA_FQ_ORPHAN_MASK,
0916
0917 TCA_FQ_LOW_RATE_THRESHOLD,
0918
0919 TCA_FQ_CE_THRESHOLD,
0920
0921 TCA_FQ_TIMER_SLACK,
0922
0923 TCA_FQ_HORIZON,
0924
0925 TCA_FQ_HORIZON_DROP,
0926
0927 __TCA_FQ_MAX
0928 };
0929
0930 #define TCA_FQ_MAX (__TCA_FQ_MAX - 1)
0931
0932 struct tc_fq_qd_stats {
0933 __u64 gc_flows;
0934 __u64 highprio_packets;
0935 __u64 tcp_retrans;
0936 __u64 throttled;
0937 __u64 flows_plimit;
0938 __u64 pkts_too_long;
0939 __u64 allocation_errors;
0940 __s64 time_next_delayed_flow;
0941 __u32 flows;
0942 __u32 inactive_flows;
0943 __u32 throttled_flows;
0944 __u32 unthrottle_latency_ns;
0945 __u64 ce_mark;
0946 __u64 horizon_drops;
0947 __u64 horizon_caps;
0948 };
0949
0950
0951
0952 enum {
0953 TCA_HHF_UNSPEC,
0954 TCA_HHF_BACKLOG_LIMIT,
0955 TCA_HHF_QUANTUM,
0956 TCA_HHF_HH_FLOWS_LIMIT,
0957 TCA_HHF_RESET_TIMEOUT,
0958 TCA_HHF_ADMIT_BYTES,
0959 TCA_HHF_EVICT_TIMEOUT,
0960 TCA_HHF_NON_HH_WEIGHT,
0961 __TCA_HHF_MAX
0962 };
0963
0964 #define TCA_HHF_MAX (__TCA_HHF_MAX - 1)
0965
0966 struct tc_hhf_xstats {
0967 __u32 drop_overlimit;
0968
0969
0970 __u32 hh_overlimit;
0971 __u32 hh_tot_count;
0972 __u32 hh_cur_count;
0973 };
0974
0975
0976 enum {
0977 TCA_PIE_UNSPEC,
0978 TCA_PIE_TARGET,
0979 TCA_PIE_LIMIT,
0980 TCA_PIE_TUPDATE,
0981 TCA_PIE_ALPHA,
0982 TCA_PIE_BETA,
0983 TCA_PIE_ECN,
0984 TCA_PIE_BYTEMODE,
0985 TCA_PIE_DQ_RATE_ESTIMATOR,
0986 __TCA_PIE_MAX
0987 };
0988 #define TCA_PIE_MAX (__TCA_PIE_MAX - 1)
0989
0990 struct tc_pie_xstats {
0991 __u64 prob;
0992 __u32 delay;
0993 __u32 avg_dq_rate;
0994
0995
0996 __u32 dq_rate_estimating;
0997 __u32 packets_in;
0998 __u32 dropped;
0999 __u32 overlimit;
1000
1001
1002 __u32 maxq;
1003 __u32 ecn_mark;
1004 };
1005
1006
1007 enum {
1008 TCA_FQ_PIE_UNSPEC,
1009 TCA_FQ_PIE_LIMIT,
1010 TCA_FQ_PIE_FLOWS,
1011 TCA_FQ_PIE_TARGET,
1012 TCA_FQ_PIE_TUPDATE,
1013 TCA_FQ_PIE_ALPHA,
1014 TCA_FQ_PIE_BETA,
1015 TCA_FQ_PIE_QUANTUM,
1016 TCA_FQ_PIE_MEMORY_LIMIT,
1017 TCA_FQ_PIE_ECN_PROB,
1018 TCA_FQ_PIE_ECN,
1019 TCA_FQ_PIE_BYTEMODE,
1020 TCA_FQ_PIE_DQ_RATE_ESTIMATOR,
1021 __TCA_FQ_PIE_MAX
1022 };
1023 #define TCA_FQ_PIE_MAX (__TCA_FQ_PIE_MAX - 1)
1024
1025 struct tc_fq_pie_xstats {
1026 __u32 packets_in;
1027 __u32 dropped;
1028 __u32 overlimit;
1029 __u32 overmemory;
1030 __u32 ecn_mark;
1031 __u32 new_flow_count;
1032 __u32 new_flows_len;
1033 __u32 old_flows_len;
1034 __u32 memory_usage;
1035 };
1036
1037
1038 struct tc_cbs_qopt {
1039 __u8 offload;
1040 __u8 _pad[3];
1041 __s32 hicredit;
1042 __s32 locredit;
1043 __s32 idleslope;
1044 __s32 sendslope;
1045 };
1046
1047 enum {
1048 TCA_CBS_UNSPEC,
1049 TCA_CBS_PARMS,
1050 __TCA_CBS_MAX,
1051 };
1052
1053 #define TCA_CBS_MAX (__TCA_CBS_MAX - 1)
1054
1055
1056
1057 struct tc_etf_qopt {
1058 __s32 delta;
1059 __s32 clockid;
1060 __u32 flags;
1061 #define TC_ETF_DEADLINE_MODE_ON _BITUL(0)
1062 #define TC_ETF_OFFLOAD_ON _BITUL(1)
1063 #define TC_ETF_SKIP_SOCK_CHECK _BITUL(2)
1064 };
1065
1066 enum {
1067 TCA_ETF_UNSPEC,
1068 TCA_ETF_PARMS,
1069 __TCA_ETF_MAX,
1070 };
1071
1072 #define TCA_ETF_MAX (__TCA_ETF_MAX - 1)
1073
1074
1075
1076 enum {
1077 TCA_CAKE_UNSPEC,
1078 TCA_CAKE_PAD,
1079 TCA_CAKE_BASE_RATE64,
1080 TCA_CAKE_DIFFSERV_MODE,
1081 TCA_CAKE_ATM,
1082 TCA_CAKE_FLOW_MODE,
1083 TCA_CAKE_OVERHEAD,
1084 TCA_CAKE_RTT,
1085 TCA_CAKE_TARGET,
1086 TCA_CAKE_AUTORATE,
1087 TCA_CAKE_MEMORY,
1088 TCA_CAKE_NAT,
1089 TCA_CAKE_RAW,
1090 TCA_CAKE_WASH,
1091 TCA_CAKE_MPU,
1092 TCA_CAKE_INGRESS,
1093 TCA_CAKE_ACK_FILTER,
1094 TCA_CAKE_SPLIT_GSO,
1095 TCA_CAKE_FWMARK,
1096 __TCA_CAKE_MAX
1097 };
1098 #define TCA_CAKE_MAX (__TCA_CAKE_MAX - 1)
1099
1100 enum {
1101 __TCA_CAKE_STATS_INVALID,
1102 TCA_CAKE_STATS_PAD,
1103 TCA_CAKE_STATS_CAPACITY_ESTIMATE64,
1104 TCA_CAKE_STATS_MEMORY_LIMIT,
1105 TCA_CAKE_STATS_MEMORY_USED,
1106 TCA_CAKE_STATS_AVG_NETOFF,
1107 TCA_CAKE_STATS_MIN_NETLEN,
1108 TCA_CAKE_STATS_MAX_NETLEN,
1109 TCA_CAKE_STATS_MIN_ADJLEN,
1110 TCA_CAKE_STATS_MAX_ADJLEN,
1111 TCA_CAKE_STATS_TIN_STATS,
1112 TCA_CAKE_STATS_DEFICIT,
1113 TCA_CAKE_STATS_COBALT_COUNT,
1114 TCA_CAKE_STATS_DROPPING,
1115 TCA_CAKE_STATS_DROP_NEXT_US,
1116 TCA_CAKE_STATS_P_DROP,
1117 TCA_CAKE_STATS_BLUE_TIMER_US,
1118 __TCA_CAKE_STATS_MAX
1119 };
1120 #define TCA_CAKE_STATS_MAX (__TCA_CAKE_STATS_MAX - 1)
1121
1122 enum {
1123 __TCA_CAKE_TIN_STATS_INVALID,
1124 TCA_CAKE_TIN_STATS_PAD,
1125 TCA_CAKE_TIN_STATS_SENT_PACKETS,
1126 TCA_CAKE_TIN_STATS_SENT_BYTES64,
1127 TCA_CAKE_TIN_STATS_DROPPED_PACKETS,
1128 TCA_CAKE_TIN_STATS_DROPPED_BYTES64,
1129 TCA_CAKE_TIN_STATS_ACKS_DROPPED_PACKETS,
1130 TCA_CAKE_TIN_STATS_ACKS_DROPPED_BYTES64,
1131 TCA_CAKE_TIN_STATS_ECN_MARKED_PACKETS,
1132 TCA_CAKE_TIN_STATS_ECN_MARKED_BYTES64,
1133 TCA_CAKE_TIN_STATS_BACKLOG_PACKETS,
1134 TCA_CAKE_TIN_STATS_BACKLOG_BYTES,
1135 TCA_CAKE_TIN_STATS_THRESHOLD_RATE64,
1136 TCA_CAKE_TIN_STATS_TARGET_US,
1137 TCA_CAKE_TIN_STATS_INTERVAL_US,
1138 TCA_CAKE_TIN_STATS_WAY_INDIRECT_HITS,
1139 TCA_CAKE_TIN_STATS_WAY_MISSES,
1140 TCA_CAKE_TIN_STATS_WAY_COLLISIONS,
1141 TCA_CAKE_TIN_STATS_PEAK_DELAY_US,
1142 TCA_CAKE_TIN_STATS_AVG_DELAY_US,
1143 TCA_CAKE_TIN_STATS_BASE_DELAY_US,
1144 TCA_CAKE_TIN_STATS_SPARSE_FLOWS,
1145 TCA_CAKE_TIN_STATS_BULK_FLOWS,
1146 TCA_CAKE_TIN_STATS_UNRESPONSIVE_FLOWS,
1147 TCA_CAKE_TIN_STATS_MAX_SKBLEN,
1148 TCA_CAKE_TIN_STATS_FLOW_QUANTUM,
1149 __TCA_CAKE_TIN_STATS_MAX
1150 };
1151 #define TCA_CAKE_TIN_STATS_MAX (__TCA_CAKE_TIN_STATS_MAX - 1)
1152 #define TC_CAKE_MAX_TINS (8)
1153
1154 enum {
1155 CAKE_FLOW_NONE = 0,
1156 CAKE_FLOW_SRC_IP,
1157 CAKE_FLOW_DST_IP,
1158 CAKE_FLOW_HOSTS,
1159 CAKE_FLOW_FLOWS,
1160 CAKE_FLOW_DUAL_SRC,
1161 CAKE_FLOW_DUAL_DST,
1162 CAKE_FLOW_TRIPLE,
1163 CAKE_FLOW_MAX,
1164 };
1165
1166 enum {
1167 CAKE_DIFFSERV_DIFFSERV3 = 0,
1168 CAKE_DIFFSERV_DIFFSERV4,
1169 CAKE_DIFFSERV_DIFFSERV8,
1170 CAKE_DIFFSERV_BESTEFFORT,
1171 CAKE_DIFFSERV_PRECEDENCE,
1172 CAKE_DIFFSERV_MAX
1173 };
1174
1175 enum {
1176 CAKE_ACK_NONE = 0,
1177 CAKE_ACK_FILTER,
1178 CAKE_ACK_AGGRESSIVE,
1179 CAKE_ACK_MAX
1180 };
1181
1182 enum {
1183 CAKE_ATM_NONE = 0,
1184 CAKE_ATM_ATM,
1185 CAKE_ATM_PTM,
1186 CAKE_ATM_MAX
1187 };
1188
1189
1190
1191 enum {
1192 TC_TAPRIO_CMD_SET_GATES = 0x00,
1193 TC_TAPRIO_CMD_SET_AND_HOLD = 0x01,
1194 TC_TAPRIO_CMD_SET_AND_RELEASE = 0x02,
1195 };
1196
1197 enum {
1198 TCA_TAPRIO_SCHED_ENTRY_UNSPEC,
1199 TCA_TAPRIO_SCHED_ENTRY_INDEX,
1200 TCA_TAPRIO_SCHED_ENTRY_CMD,
1201 TCA_TAPRIO_SCHED_ENTRY_GATE_MASK,
1202 TCA_TAPRIO_SCHED_ENTRY_INTERVAL,
1203 __TCA_TAPRIO_SCHED_ENTRY_MAX,
1204 };
1205 #define TCA_TAPRIO_SCHED_ENTRY_MAX (__TCA_TAPRIO_SCHED_ENTRY_MAX - 1)
1206
1207
1208
1209
1210
1211
1212
1213
1214 enum {
1215 TCA_TAPRIO_SCHED_UNSPEC,
1216 TCA_TAPRIO_SCHED_ENTRY,
1217 __TCA_TAPRIO_SCHED_MAX,
1218 };
1219
1220 #define TCA_TAPRIO_SCHED_MAX (__TCA_TAPRIO_SCHED_MAX - 1)
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232 #define TCA_TAPRIO_ATTR_FLAG_TXTIME_ASSIST _BITUL(0)
1233 #define TCA_TAPRIO_ATTR_FLAG_FULL_OFFLOAD _BITUL(1)
1234
1235 enum {
1236 TCA_TAPRIO_ATTR_UNSPEC,
1237 TCA_TAPRIO_ATTR_PRIOMAP,
1238 TCA_TAPRIO_ATTR_SCHED_ENTRY_LIST,
1239 TCA_TAPRIO_ATTR_SCHED_BASE_TIME,
1240 TCA_TAPRIO_ATTR_SCHED_SINGLE_ENTRY,
1241 TCA_TAPRIO_ATTR_SCHED_CLOCKID,
1242 TCA_TAPRIO_PAD,
1243 TCA_TAPRIO_ATTR_ADMIN_SCHED,
1244 TCA_TAPRIO_ATTR_SCHED_CYCLE_TIME,
1245 TCA_TAPRIO_ATTR_SCHED_CYCLE_TIME_EXTENSION,
1246 TCA_TAPRIO_ATTR_FLAGS,
1247 TCA_TAPRIO_ATTR_TXTIME_DELAY,
1248 __TCA_TAPRIO_ATTR_MAX,
1249 };
1250
1251 #define TCA_TAPRIO_ATTR_MAX (__TCA_TAPRIO_ATTR_MAX - 1)
1252
1253
1254
1255 #define TCQ_ETS_MAX_BANDS 16
1256
1257 enum {
1258 TCA_ETS_UNSPEC,
1259 TCA_ETS_NBANDS,
1260 TCA_ETS_NSTRICT,
1261 TCA_ETS_QUANTA,
1262 TCA_ETS_QUANTA_BAND,
1263 TCA_ETS_PRIOMAP,
1264 TCA_ETS_PRIOMAP_BAND,
1265 __TCA_ETS_MAX,
1266 };
1267
1268 #define TCA_ETS_MAX (__TCA_ETS_MAX - 1)
1269
1270 #endif