linux/hdlc/ioctl.h

0001 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
0002 #ifndef __HDLC_IOCTL_H__
0003 #define __HDLC_IOCTL_H__
0004
0005
0006 #define GENERIC_HDLC_VERSION 4  /* For synchronization with sethdlc utility */
0007
0008 #define CLOCK_DEFAULT   0   /* Default setting */
0009 #define CLOCK_EXT   1   /* External TX and RX clock - DTE */
0010 #define CLOCK_INT   2   /* Internal TX and RX clock - DCE */
0011 #define CLOCK_TXINT 3   /* Internal TX and external RX clock */
0012 #define CLOCK_TXFROMRX  4   /* TX clock derived from external RX clock */
0013
0014
0015 #define ENCODING_DEFAULT    0 /* Default setting */
0016 #define ENCODING_NRZ        1
0017 #define ENCODING_NRZI       2
0018 #define ENCODING_FM_MARK    3
0019 #define ENCODING_FM_SPACE   4
0020 #define ENCODING_MANCHESTER 5
0021
0022
0023 #define PARITY_DEFAULT      0 /* Default setting */
0024 #define PARITY_NONE     1 /* No parity */
0025 #define PARITY_CRC16_PR0    2 /* CRC16, initial value 0x0000 */
0026 #define PARITY_CRC16_PR1    3 /* CRC16, initial value 0xFFFF */
0027 #define PARITY_CRC16_PR0_CCITT  4 /* CRC16, initial 0x0000, ITU-T version */
0028 #define PARITY_CRC16_PR1_CCITT  5 /* CRC16, initial 0xFFFF, ITU-T version */
0029 #define PARITY_CRC32_PR0_CCITT  6 /* CRC32, initial value 0x00000000 */
0030 #define PARITY_CRC32_PR1_CCITT  7 /* CRC32, initial value 0xFFFFFFFF */
0031
0032 #define LMI_DEFAULT     0 /* Default setting */
0033 #define LMI_NONE        1 /* No LMI, all PVCs are static */
0034 #define LMI_ANSI        2 /* ANSI Annex D */
0035 #define LMI_CCITT       3 /* ITU-T Annex A */
0036 #define LMI_CISCO       4 /* The "original" LMI, aka Gang of Four */
0037
0038 #ifndef __ASSEMBLY__
0039
0040 typedef struct {
0041     unsigned int clock_rate; /* bits per second */
0042     unsigned int clock_type; /* internal, external, TX-internal etc. */
0043     unsigned short loopback;
0044 } sync_serial_settings;          /* V.35, V.24, X.21 */
0045
0046 typedef struct {
0047     unsigned int clock_rate; /* bits per second */
0048     unsigned int clock_type; /* internal, external, TX-internal etc. */
0049     unsigned short loopback;
0050     unsigned int slot_map;
0051 } te1_settings;                  /* T1, E1 */
0052
0053 typedef struct {
0054     unsigned short encoding;
0055     unsigned short parity;
0056 } raw_hdlc_proto;
0057
0058 typedef struct {
0059     unsigned int t391;
0060     unsigned int t392;
0061     unsigned int n391;
0062     unsigned int n392;
0063     unsigned int n393;
0064     unsigned short lmi;
0065     unsigned short dce; /* 1 for DCE (network side) operation */
0066 } fr_proto;
0067
0068 typedef struct {
0069     unsigned int dlci;
0070 } fr_proto_pvc;          /* for creating/deleting FR PVCs */
0071
0072 typedef struct {
0073     unsigned int dlci;
0074     char master[IFNAMSIZ];  /* Name of master FRAD device */
0075 }fr_proto_pvc_info;     /* for returning PVC information only */
0076
0077 typedef struct {
0078     unsigned int interval;
0079     unsigned int timeout;
0080 } cisco_proto;
0081
0082 typedef struct {
0083     unsigned short dce; /* 1 for DCE (network side) operation */
0084     unsigned int modulo; /* modulo (8 = basic / 128 = extended) */
0085     unsigned int window; /* frame window size */
0086     unsigned int t1; /* timeout t1 */
0087     unsigned int t2; /* timeout t2 */
0088     unsigned int n2; /* frame retry counter */
0089 } x25_hdlc_proto;
0090
0091 /* PPP doesn't need any info now - supply length = 0 to ioctl */
0092
0093 #endif /* __ASSEMBLY__ */
0094 #endif /* __HDLC_IOCTL_H__ */