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0001 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
0002 #ifndef _UAPI_LINUX_FB_H
0003 #define _UAPI_LINUX_FB_H
0004 
0005 #include <linux/types.h>
0006 #include <linux/i2c.h>
0007 
0008 /* Definitions of frame buffers                     */
0009 
0010 #define FB_MAX          32  /* sufficient for now */
0011 
0012 /* ioctls
0013    0x46 is 'F'                              */
0014 #define FBIOGET_VSCREENINFO 0x4600
0015 #define FBIOPUT_VSCREENINFO 0x4601
0016 #define FBIOGET_FSCREENINFO 0x4602
0017 #define FBIOGETCMAP     0x4604
0018 #define FBIOPUTCMAP     0x4605
0019 #define FBIOPAN_DISPLAY     0x4606
0020 #ifndef __KERNEL__
0021 #define FBIO_CURSOR            _IOWR('F', 0x08, struct fb_cursor)
0022 #endif
0023 /* 0x4607-0x460B are defined below */
0024 /* #define FBIOGET_MONITORSPEC  0x460C */
0025 /* #define FBIOPUT_MONITORSPEC  0x460D */
0026 /* #define FBIOSWITCH_MONIBIT   0x460E */
0027 #define FBIOGET_CON2FBMAP   0x460F
0028 #define FBIOPUT_CON2FBMAP   0x4610
0029 #define FBIOBLANK       0x4611      /* arg: 0 or vesa level + 1 */
0030 #define FBIOGET_VBLANK      _IOR('F', 0x12, struct fb_vblank)
0031 #define FBIO_ALLOC              0x4613
0032 #define FBIO_FREE               0x4614
0033 #define FBIOGET_GLYPH           0x4615
0034 #define FBIOGET_HWCINFO         0x4616
0035 #define FBIOPUT_MODEINFO        0x4617
0036 #define FBIOGET_DISPINFO        0x4618
0037 #define FBIO_WAITFORVSYNC   _IOW('F', 0x20, __u32)
0038 
0039 #define FB_TYPE_PACKED_PIXELS       0   /* Packed Pixels    */
0040 #define FB_TYPE_PLANES          1   /* Non interleaved planes */
0041 #define FB_TYPE_INTERLEAVED_PLANES  2   /* Interleaved planes   */
0042 #define FB_TYPE_TEXT            3   /* Text/attributes  */
0043 #define FB_TYPE_VGA_PLANES      4   /* EGA/VGA planes   */
0044 #define FB_TYPE_FOURCC          5   /* Type identified by a V4L2 FOURCC */
0045 
0046 #define FB_AUX_TEXT_MDA     0   /* Monochrome text */
0047 #define FB_AUX_TEXT_CGA     1   /* CGA/EGA/VGA Color text */
0048 #define FB_AUX_TEXT_S3_MMIO 2   /* S3 MMIO fasttext */
0049 #define FB_AUX_TEXT_MGA_STEP16  3   /* MGA Millenium I: text, attr, 14 reserved bytes */
0050 #define FB_AUX_TEXT_MGA_STEP8   4   /* other MGAs:      text, attr,  6 reserved bytes */
0051 #define FB_AUX_TEXT_SVGA_GROUP  8   /* 8-15: SVGA tileblit compatible modes */
0052 #define FB_AUX_TEXT_SVGA_MASK   7   /* lower three bits says step */
0053 #define FB_AUX_TEXT_SVGA_STEP2  8   /* SVGA text mode:  text, attr */
0054 #define FB_AUX_TEXT_SVGA_STEP4  9   /* SVGA text mode:  text, attr,  2 reserved bytes */
0055 #define FB_AUX_TEXT_SVGA_STEP8  10  /* SVGA text mode:  text, attr,  6 reserved bytes */
0056 #define FB_AUX_TEXT_SVGA_STEP16 11  /* SVGA text mode:  text, attr, 14 reserved bytes */
0057 #define FB_AUX_TEXT_SVGA_LAST   15  /* reserved up to 15 */
0058 
0059 #define FB_AUX_VGA_PLANES_VGA4      0   /* 16 color planes (EGA/VGA) */
0060 #define FB_AUX_VGA_PLANES_CFB4      1   /* CFB4 in planes (VGA) */
0061 #define FB_AUX_VGA_PLANES_CFB8      2   /* CFB8 in planes (VGA) */
0062 
0063 #define FB_VISUAL_MONO01        0   /* Monochr. 1=Black 0=White */
0064 #define FB_VISUAL_MONO10        1   /* Monochr. 1=White 0=Black */
0065 #define FB_VISUAL_TRUECOLOR     2   /* True color   */
0066 #define FB_VISUAL_PSEUDOCOLOR       3   /* Pseudo color (like atari) */
0067 #define FB_VISUAL_DIRECTCOLOR       4   /* Direct color */
0068 #define FB_VISUAL_STATIC_PSEUDOCOLOR    5   /* Pseudo color readonly */
0069 #define FB_VISUAL_FOURCC        6   /* Visual identified by a V4L2 FOURCC */
0070 
0071 #define FB_ACCEL_NONE       0   /* no hardware accelerator  */
0072 #define FB_ACCEL_ATARIBLITT 1   /* Atari Blitter        */
0073 #define FB_ACCEL_AMIGABLITT 2   /* Amiga Blitter                */
0074 #define FB_ACCEL_S3_TRIO64  3   /* Cybervision64 (S3 Trio64)    */
0075 #define FB_ACCEL_NCR_77C32BLT   4   /* RetinaZ3 (NCR 77C32BLT)      */
0076 #define FB_ACCEL_S3_VIRGE   5   /* Cybervision64/3D (S3 ViRGE)  */
0077 #define FB_ACCEL_ATI_MACH64GX   6   /* ATI Mach 64GX family     */
0078 #define FB_ACCEL_DEC_TGA    7   /* DEC 21030 TGA        */
0079 #define FB_ACCEL_ATI_MACH64CT   8   /* ATI Mach 64CT family     */
0080 #define FB_ACCEL_ATI_MACH64VT   9   /* ATI Mach 64CT family VT class */
0081 #define FB_ACCEL_ATI_MACH64GT   10  /* ATI Mach 64CT family GT class */
0082 #define FB_ACCEL_SUN_CREATOR    11  /* Sun Creator/Creator3D    */
0083 #define FB_ACCEL_SUN_CGSIX  12  /* Sun cg6          */
0084 #define FB_ACCEL_SUN_LEO    13  /* Sun leo/zx           */
0085 #define FB_ACCEL_IMS_TWINTURBO  14  /* IMS Twin Turbo       */
0086 #define FB_ACCEL_3DLABS_PERMEDIA2 15    /* 3Dlabs Permedia 2        */
0087 #define FB_ACCEL_MATROX_MGA2064W 16 /* Matrox MGA2064W (Millenium)  */
0088 #define FB_ACCEL_MATROX_MGA1064SG 17    /* Matrox MGA1064SG (Mystique)  */
0089 #define FB_ACCEL_MATROX_MGA2164W 18 /* Matrox MGA2164W (Millenium II) */
0090 #define FB_ACCEL_MATROX_MGA2164W_AGP 19 /* Matrox MGA2164W (Millenium II) */
0091 #define FB_ACCEL_MATROX_MGAG100 20  /* Matrox G100 (Productiva G100) */
0092 #define FB_ACCEL_MATROX_MGAG200 21  /* Matrox G200 (Myst, Mill, ...) */
0093 #define FB_ACCEL_SUN_CG14   22  /* Sun cgfourteen        */
0094 #define FB_ACCEL_SUN_BWTWO  23  /* Sun bwtwo            */
0095 #define FB_ACCEL_SUN_CGTHREE    24  /* Sun cgthree          */
0096 #define FB_ACCEL_SUN_TCX    25  /* Sun tcx          */
0097 #define FB_ACCEL_MATROX_MGAG400 26  /* Matrox G400          */
0098 #define FB_ACCEL_NV3        27  /* nVidia RIVA 128              */
0099 #define FB_ACCEL_NV4        28  /* nVidia RIVA TNT      */
0100 #define FB_ACCEL_NV5        29  /* nVidia RIVA TNT2     */
0101 #define FB_ACCEL_CT_6555x   30  /* C&T 6555x            */
0102 #define FB_ACCEL_3DFX_BANSHEE   31  /* 3Dfx Banshee         */
0103 #define FB_ACCEL_ATI_RAGE128    32  /* ATI Rage128 family       */
0104 #define FB_ACCEL_IGS_CYBER2000  33  /* CyberPro 2000        */
0105 #define FB_ACCEL_IGS_CYBER2010  34  /* CyberPro 2010        */
0106 #define FB_ACCEL_IGS_CYBER5000  35  /* CyberPro 5000        */
0107 #define FB_ACCEL_SIS_GLAMOUR    36  /* SiS 300/630/540              */
0108 #define FB_ACCEL_3DLABS_PERMEDIA3 37    /* 3Dlabs Permedia 3        */
0109 #define FB_ACCEL_ATI_RADEON 38  /* ATI Radeon family        */
0110 #define FB_ACCEL_I810           39      /* Intel 810/815                */
0111 #define FB_ACCEL_SIS_GLAMOUR_2  40  /* SiS 315, 650, 740        */
0112 #define FB_ACCEL_SIS_XABRE      41  /* SiS 330 ("Xabre")        */
0113 #define FB_ACCEL_I830           42      /* Intel 830M/845G/85x/865G     */
0114 #define FB_ACCEL_NV_10          43      /* nVidia Arch 10               */
0115 #define FB_ACCEL_NV_20          44      /* nVidia Arch 20               */
0116 #define FB_ACCEL_NV_30          45      /* nVidia Arch 30               */
0117 #define FB_ACCEL_NV_40          46      /* nVidia Arch 40               */
0118 #define FB_ACCEL_XGI_VOLARI_V   47  /* XGI Volari V3XT, V5, V8      */
0119 #define FB_ACCEL_XGI_VOLARI_Z   48  /* XGI Volari Z7                */
0120 #define FB_ACCEL_OMAP1610   49  /* TI OMAP16xx                  */
0121 #define FB_ACCEL_TRIDENT_TGUI   50  /* Trident TGUI         */
0122 #define FB_ACCEL_TRIDENT_3DIMAGE 51 /* Trident 3DImage      */
0123 #define FB_ACCEL_TRIDENT_BLADE3D 52 /* Trident Blade3D      */
0124 #define FB_ACCEL_TRIDENT_BLADEXP 53 /* Trident BladeXP      */
0125 #define FB_ACCEL_CIRRUS_ALPINE   53 /* Cirrus Logic 543x/544x/5480  */
0126 #define FB_ACCEL_NEOMAGIC_NM2070 90 /* NeoMagic NM2070              */
0127 #define FB_ACCEL_NEOMAGIC_NM2090 91 /* NeoMagic NM2090              */
0128 #define FB_ACCEL_NEOMAGIC_NM2093 92 /* NeoMagic NM2093              */
0129 #define FB_ACCEL_NEOMAGIC_NM2097 93 /* NeoMagic NM2097              */
0130 #define FB_ACCEL_NEOMAGIC_NM2160 94 /* NeoMagic NM2160              */
0131 #define FB_ACCEL_NEOMAGIC_NM2200 95 /* NeoMagic NM2200              */
0132 #define FB_ACCEL_NEOMAGIC_NM2230 96 /* NeoMagic NM2230              */
0133 #define FB_ACCEL_NEOMAGIC_NM2360 97 /* NeoMagic NM2360              */
0134 #define FB_ACCEL_NEOMAGIC_NM2380 98 /* NeoMagic NM2380              */
0135 #define FB_ACCEL_PXA3XX      99 /* PXA3xx           */
0136 
0137 #define FB_ACCEL_SAVAGE4        0x80    /* S3 Savage4                   */
0138 #define FB_ACCEL_SAVAGE3D       0x81    /* S3 Savage3D                  */
0139 #define FB_ACCEL_SAVAGE3D_MV    0x82    /* S3 Savage3D-MV               */
0140 #define FB_ACCEL_SAVAGE2000     0x83    /* S3 Savage2000                */
0141 #define FB_ACCEL_SAVAGE_MX_MV   0x84    /* S3 Savage/MX-MV              */
0142 #define FB_ACCEL_SAVAGE_MX      0x85    /* S3 Savage/MX                 */
0143 #define FB_ACCEL_SAVAGE_IX_MV   0x86    /* S3 Savage/IX-MV              */
0144 #define FB_ACCEL_SAVAGE_IX      0x87    /* S3 Savage/IX                 */
0145 #define FB_ACCEL_PROSAVAGE_PM   0x88    /* S3 ProSavage PM133           */
0146 #define FB_ACCEL_PROSAVAGE_KM   0x89    /* S3 ProSavage KM133           */
0147 #define FB_ACCEL_S3TWISTER_P    0x8a    /* S3 Twister                   */
0148 #define FB_ACCEL_S3TWISTER_K    0x8b    /* S3 TwisterK                  */
0149 #define FB_ACCEL_SUPERSAVAGE    0x8c    /* S3 Supersavage               */
0150 #define FB_ACCEL_PROSAVAGE_DDR  0x8d    /* S3 ProSavage DDR             */
0151 #define FB_ACCEL_PROSAVAGE_DDRK 0x8e    /* S3 ProSavage DDR-K           */
0152 
0153 #define FB_ACCEL_PUV3_UNIGFX    0xa0    /* PKUnity-v3 Unigfx        */
0154 
0155 #define FB_CAP_FOURCC       1   /* Device supports FOURCC-based formats */
0156 
0157 struct fb_fix_screeninfo {
0158     char id[16];            /* identification string eg "TT Builtin" */
0159     unsigned long smem_start;   /* Start of frame buffer mem */
0160                     /* (physical address) */
0161     __u32 smem_len;         /* Length of frame buffer mem */
0162     __u32 type;         /* see FB_TYPE_*        */
0163     __u32 type_aux;         /* Interleave for interleaved Planes */
0164     __u32 visual;           /* see FB_VISUAL_*      */ 
0165     __u16 xpanstep;         /* zero if no hardware panning  */
0166     __u16 ypanstep;         /* zero if no hardware panning  */
0167     __u16 ywrapstep;        /* zero if no hardware ywrap    */
0168     __u32 line_length;      /* length of a line in bytes    */
0169     unsigned long mmio_start;   /* Start of Memory Mapped I/O   */
0170                     /* (physical address) */
0171     __u32 mmio_len;         /* Length of Memory Mapped I/O  */
0172     __u32 accel;            /* Indicate to driver which */
0173                     /*  specific chip/card we have  */
0174     __u16 capabilities;     /* see FB_CAP_*         */
0175     __u16 reserved[2];      /* Reserved for future compatibility */
0176 };
0177 
0178 /* Interpretation of offset for color fields: All offsets are from the right,
0179  * inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you
0180  * can use the offset as right argument to <<). A pixel afterwards is a bit
0181  * stream and is written to video memory as that unmodified.
0182  *
0183  * For pseudocolor: offset and length should be the same for all color
0184  * components. Offset specifies the position of the least significant bit
0185  * of the palette index in a pixel value. Length indicates the number
0186  * of available palette entries (i.e. # of entries = 1 << length).
0187  */
0188 struct fb_bitfield {
0189     __u32 offset;           /* beginning of bitfield    */
0190     __u32 length;           /* length of bitfield       */
0191     __u32 msb_right;        /* != 0 : Most significant bit is */ 
0192                     /* right */ 
0193 };
0194 
0195 #define FB_NONSTD_HAM       1   /* Hold-And-Modify (HAM)        */
0196 #define FB_NONSTD_REV_PIX_IN_B  2   /* order of pixels in each byte is reversed */
0197 
0198 #define FB_ACTIVATE_NOW     0   /* set values immediately (or vbl)*/
0199 #define FB_ACTIVATE_NXTOPEN 1   /* activate on next open    */
0200 #define FB_ACTIVATE_TEST    2   /* don't set, round up impossible */
0201 #define FB_ACTIVATE_MASK       15
0202                     /* values           */
0203 #define FB_ACTIVATE_VBL        16   /* activate values on next vbl  */
0204 #define FB_CHANGE_CMAP_VBL     32   /* change colormap on vbl   */
0205 #define FB_ACTIVATE_ALL        64   /* change all VCs on this fb    */
0206 #define FB_ACTIVATE_FORCE     128   /* force apply even when no change*/
0207 #define FB_ACTIVATE_INV_MODE  256       /* invalidate videomode */
0208 #define FB_ACTIVATE_KD_TEXT   512       /* for KDSET vt ioctl */
0209 
0210 #define FB_ACCELF_TEXT      1   /* (OBSOLETE) see fb_info.flags and vc_mode */
0211 
0212 #define FB_SYNC_HOR_HIGH_ACT    1   /* horizontal sync high active  */
0213 #define FB_SYNC_VERT_HIGH_ACT   2   /* vertical sync high active    */
0214 #define FB_SYNC_EXT     4   /* external sync        */
0215 #define FB_SYNC_COMP_HIGH_ACT   8   /* composite sync high active   */
0216 #define FB_SYNC_BROADCAST   16  /* broadcast video timings      */
0217                     /* vtotal = 144d/288n/576i => PAL  */
0218                     /* vtotal = 121d/242n/484i => NTSC */
0219 #define FB_SYNC_ON_GREEN    32  /* sync on green */
0220 
0221 #define FB_VMODE_NONINTERLACED  0   /* non interlaced */
0222 #define FB_VMODE_INTERLACED 1   /* interlaced   */
0223 #define FB_VMODE_DOUBLE     2   /* double scan */
0224 #define FB_VMODE_ODD_FLD_FIRST  4   /* interlaced: top line first */
0225 #define FB_VMODE_MASK       255
0226 
0227 #define FB_VMODE_YWRAP      256 /* ywrap instead of panning     */
0228 #define FB_VMODE_SMOOTH_XPAN    512 /* smooth xpan possible (internally used) */
0229 #define FB_VMODE_CONUPDATE  512 /* don't update x/yoffset   */
0230 
0231 /*
0232  * Display rotation support
0233  */
0234 #define FB_ROTATE_UR      0
0235 #define FB_ROTATE_CW      1
0236 #define FB_ROTATE_UD      2
0237 #define FB_ROTATE_CCW     3
0238 
0239 #define PICOS2KHZ(a) (1000000000UL/(a))
0240 #define KHZ2PICOS(a) (1000000000UL/(a))
0241 
0242 struct fb_var_screeninfo {
0243     __u32 xres;         /* visible resolution       */
0244     __u32 yres;
0245     __u32 xres_virtual;     /* virtual resolution       */
0246     __u32 yres_virtual;
0247     __u32 xoffset;          /* offset from virtual to visible */
0248     __u32 yoffset;          /* resolution           */
0249 
0250     __u32 bits_per_pixel;       /* guess what           */
0251     __u32 grayscale;        /* 0 = color, 1 = grayscale,    */
0252                     /* >1 = FOURCC          */
0253     struct fb_bitfield red;     /* bitfield in fb mem if true color, */
0254     struct fb_bitfield green;   /* else only length is significant */
0255     struct fb_bitfield blue;
0256     struct fb_bitfield transp;  /* transparency         */  
0257 
0258     __u32 nonstd;           /* != 0 Non standard pixel format */
0259 
0260     __u32 activate;         /* see FB_ACTIVATE_*        */
0261 
0262     __u32 height;           /* height of picture in mm    */
0263     __u32 width;            /* width of picture in mm     */
0264 
0265     __u32 accel_flags;      /* (OBSOLETE) see fb_info.flags */
0266 
0267     /* Timing: All values in pixclocks, except pixclock (of course) */
0268     __u32 pixclock;         /* pixel clock in ps (pico seconds) */
0269     __u32 left_margin;      /* time from sync to picture    */
0270     __u32 right_margin;     /* time from picture to sync    */
0271     __u32 upper_margin;     /* time from sync to picture    */
0272     __u32 lower_margin;
0273     __u32 hsync_len;        /* length of horizontal sync    */
0274     __u32 vsync_len;        /* length of vertical sync  */
0275     __u32 sync;         /* see FB_SYNC_*        */
0276     __u32 vmode;            /* see FB_VMODE_*       */
0277     __u32 rotate;           /* angle we rotate counter clockwise */
0278     __u32 colorspace;       /* colorspace for FOURCC-based modes */
0279     __u32 reserved[4];      /* Reserved for future compatibility */
0280 };
0281 
0282 struct fb_cmap {
0283     __u32 start;            /* First entry  */
0284     __u32 len;          /* Number of entries */
0285     __u16 *red;         /* Red values   */
0286     __u16 *green;
0287     __u16 *blue;
0288     __u16 *transp;          /* transparency, can be NULL */
0289 };
0290 
0291 struct fb_con2fbmap {
0292     __u32 console;
0293     __u32 framebuffer;
0294 };
0295 
0296 /* VESA Blanking Levels */
0297 #define VESA_NO_BLANKING        0
0298 #define VESA_VSYNC_SUSPEND      1
0299 #define VESA_HSYNC_SUSPEND      2
0300 #define VESA_POWERDOWN          3
0301 
0302 
0303 enum {
0304     /* screen: unblanked, hsync: on,  vsync: on */
0305     FB_BLANK_UNBLANK       = VESA_NO_BLANKING,
0306 
0307     /* screen: blanked,   hsync: on,  vsync: on */
0308     FB_BLANK_NORMAL        = VESA_NO_BLANKING + 1,
0309 
0310     /* screen: blanked,   hsync: on,  vsync: off */
0311     FB_BLANK_VSYNC_SUSPEND = VESA_VSYNC_SUSPEND + 1,
0312 
0313     /* screen: blanked,   hsync: off, vsync: on */
0314     FB_BLANK_HSYNC_SUSPEND = VESA_HSYNC_SUSPEND + 1,
0315 
0316     /* screen: blanked,   hsync: off, vsync: off */
0317     FB_BLANK_POWERDOWN     = VESA_POWERDOWN + 1
0318 };
0319 
0320 #define FB_VBLANK_VBLANKING 0x001   /* currently in a vertical blank */
0321 #define FB_VBLANK_HBLANKING 0x002   /* currently in a horizontal blank */
0322 #define FB_VBLANK_HAVE_VBLANK   0x004   /* vertical blanks can be detected */
0323 #define FB_VBLANK_HAVE_HBLANK   0x008   /* horizontal blanks can be detected */
0324 #define FB_VBLANK_HAVE_COUNT    0x010   /* global retrace counter is available */
0325 #define FB_VBLANK_HAVE_VCOUNT   0x020   /* the vcount field is valid */
0326 #define FB_VBLANK_HAVE_HCOUNT   0x040   /* the hcount field is valid */
0327 #define FB_VBLANK_VSYNCING  0x080   /* currently in a vsync */
0328 #define FB_VBLANK_HAVE_VSYNC    0x100   /* verical syncs can be detected */
0329 
0330 struct fb_vblank {
0331     __u32 flags;            /* FB_VBLANK flags */
0332     __u32 count;            /* counter of retraces since boot */
0333     __u32 vcount;           /* current scanline position */
0334     __u32 hcount;           /* current scandot position */
0335     __u32 reserved[4];      /* reserved for future compatibility */
0336 };
0337 
0338 /* Internal HW accel */
0339 #define ROP_COPY 0
0340 #define ROP_XOR  1
0341 
0342 struct fb_copyarea {
0343     __u32 dx;
0344     __u32 dy;
0345     __u32 width;
0346     __u32 height;
0347     __u32 sx;
0348     __u32 sy;
0349 };
0350 
0351 struct fb_fillrect {
0352     __u32 dx;   /* screen-relative */
0353     __u32 dy;
0354     __u32 width;
0355     __u32 height;
0356     __u32 color;
0357     __u32 rop;
0358 };
0359 
0360 struct fb_image {
0361     __u32 dx;       /* Where to place image */
0362     __u32 dy;
0363     __u32 width;        /* Size of image */
0364     __u32 height;
0365     __u32 fg_color;     /* Only used when a mono bitmap */
0366     __u32 bg_color;
0367     __u8  depth;        /* Depth of the image */
0368     const char *data;   /* Pointer to image data */
0369     struct fb_cmap cmap;    /* color map info */
0370 };
0371 
0372 /*
0373  * hardware cursor control
0374  */
0375 
0376 #define FB_CUR_SETIMAGE 0x01
0377 #define FB_CUR_SETPOS   0x02
0378 #define FB_CUR_SETHOT   0x04
0379 #define FB_CUR_SETCMAP  0x08
0380 #define FB_CUR_SETSHAPE 0x10
0381 #define FB_CUR_SETSIZE  0x20
0382 #define FB_CUR_SETALL   0xFF
0383 
0384 struct fbcurpos {
0385     __u16 x, y;
0386 };
0387 
0388 struct fb_cursor {
0389     __u16 set;      /* what to set */
0390     __u16 enable;       /* cursor on/off */
0391     __u16 rop;      /* bitop operation */
0392     const char *mask;   /* cursor mask bits */
0393     struct fbcurpos hot;    /* cursor hot spot */
0394     struct fb_image image;  /* Cursor image */
0395 };
0396 
0397 /* Settings for the generic backlight code */
0398 #define FB_BACKLIGHT_LEVELS 128
0399 #define FB_BACKLIGHT_MAX    0xFF
0400 
0401 
0402 #endif /* _UAPI_LINUX_FB_H */