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0001 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
0002 /*
0003  * Framework for buffer objects that can be shared across devices/subsystems.
0004  *
0005  * Copyright(C) 2015 Intel Ltd
0006  *
0007  * This program is free software; you can redistribute it and/or modify it
0008  * under the terms of the GNU General Public License version 2 as published by
0009  * the Free Software Foundation.
0010  *
0011  * This program is distributed in the hope that it will be useful, but WITHOUT
0012  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
0013  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
0014  * more details.
0015  *
0016  * You should have received a copy of the GNU General Public License along with
0017  * this program.  If not, see <http://www.gnu.org/licenses/>.
0018  */
0019 
0020 #ifndef _DMA_BUF_UAPI_H_
0021 #define _DMA_BUF_UAPI_H_
0022 
0023 #include <linux/types.h>
0024 
0025 /**
0026  * struct dma_buf_sync - Synchronize with CPU access.
0027  *
0028  * When a DMA buffer is accessed from the CPU via mmap, it is not always
0029  * possible to guarantee coherency between the CPU-visible map and underlying
0030  * memory.  To manage coherency, DMA_BUF_IOCTL_SYNC must be used to bracket
0031  * any CPU access to give the kernel the chance to shuffle memory around if
0032  * needed.
0033  *
0034  * Prior to accessing the map, the client must call DMA_BUF_IOCTL_SYNC
0035  * with DMA_BUF_SYNC_START and the appropriate read/write flags.  Once the
0036  * access is complete, the client should call DMA_BUF_IOCTL_SYNC with
0037  * DMA_BUF_SYNC_END and the same read/write flags.
0038  *
0039  * The synchronization provided via DMA_BUF_IOCTL_SYNC only provides cache
0040  * coherency.  It does not prevent other processes or devices from
0041  * accessing the memory at the same time.  If synchronization with a GPU or
0042  * other device driver is required, it is the client's responsibility to
0043  * wait for buffer to be ready for reading or writing before calling this
0044  * ioctl with DMA_BUF_SYNC_START.  Likewise, the client must ensure that
0045  * follow-up work is not submitted to GPU or other device driver until
0046  * after this ioctl has been called with DMA_BUF_SYNC_END?
0047  *
0048  * If the driver or API with which the client is interacting uses implicit
0049  * synchronization, waiting for prior work to complete can be done via
0050  * poll() on the DMA buffer file descriptor.  If the driver or API requires
0051  * explicit synchronization, the client may have to wait on a sync_file or
0052  * other synchronization primitive outside the scope of the DMA buffer API.
0053  */
0054 struct dma_buf_sync {
0055     /**
0056      * @flags: Set of access flags
0057      *
0058      * DMA_BUF_SYNC_START:
0059      *     Indicates the start of a map access session.
0060      *
0061      * DMA_BUF_SYNC_END:
0062      *     Indicates the end of a map access session.
0063      *
0064      * DMA_BUF_SYNC_READ:
0065      *     Indicates that the mapped DMA buffer will be read by the
0066      *     client via the CPU map.
0067      *
0068      * DMA_BUF_SYNC_WRITE:
0069      *     Indicates that the mapped DMA buffer will be written by the
0070      *     client via the CPU map.
0071      *
0072      * DMA_BUF_SYNC_RW:
0073      *     An alias for DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE.
0074      */
0075     __u64 flags;
0076 };
0077 
0078 #define DMA_BUF_SYNC_READ      (1 << 0)
0079 #define DMA_BUF_SYNC_WRITE     (2 << 0)
0080 #define DMA_BUF_SYNC_RW        (DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE)
0081 #define DMA_BUF_SYNC_START     (0 << 2)
0082 #define DMA_BUF_SYNC_END       (1 << 2)
0083 #define DMA_BUF_SYNC_VALID_FLAGS_MASK \
0084     (DMA_BUF_SYNC_RW | DMA_BUF_SYNC_END)
0085 
0086 #define DMA_BUF_NAME_LEN    32
0087 
0088 /**
0089  * struct dma_buf_export_sync_file - Get a sync_file from a dma-buf
0090  *
0091  * Userspace can perform a DMA_BUF_IOCTL_EXPORT_SYNC_FILE to retrieve the
0092  * current set of fences on a dma-buf file descriptor as a sync_file.  CPU
0093  * waits via poll() or other driver-specific mechanisms typically wait on
0094  * whatever fences are on the dma-buf at the time the wait begins.  This
0095  * is similar except that it takes a snapshot of the current fences on the
0096  * dma-buf for waiting later instead of waiting immediately.  This is
0097  * useful for modern graphics APIs such as Vulkan which assume an explicit
0098  * synchronization model but still need to inter-operate with dma-buf.
0099  *
0100  * The intended usage pattern is the following:
0101  *
0102  *  1. Export a sync_file with flags corresponding to the expected GPU usage
0103  *     via DMA_BUF_IOCTL_EXPORT_SYNC_FILE.
0104  *
0105  *  2. Submit rendering work which uses the dma-buf.  The work should wait on
0106  *     the exported sync file before rendering and produce another sync_file
0107  *     when complete.
0108  *
0109  *  3. Import the rendering-complete sync_file into the dma-buf with flags
0110  *     corresponding to the GPU usage via DMA_BUF_IOCTL_IMPORT_SYNC_FILE.
0111  *
0112  * Unlike doing implicit synchronization via a GPU kernel driver's exec ioctl,
0113  * the above is not a single atomic operation.  If userspace wants to ensure
0114  * ordering via these fences, it is the respnosibility of userspace to use
0115  * locks or other mechanisms to ensure that no other context adds fences or
0116  * submits work between steps 1 and 3 above.
0117  */
0118 struct dma_buf_export_sync_file {
0119     /**
0120      * @flags: Read/write flags
0121      *
0122      * Must be DMA_BUF_SYNC_READ, DMA_BUF_SYNC_WRITE, or both.
0123      *
0124      * If DMA_BUF_SYNC_READ is set and DMA_BUF_SYNC_WRITE is not set,
0125      * the returned sync file waits on any writers of the dma-buf to
0126      * complete.  Waiting on the returned sync file is equivalent to
0127      * poll() with POLLIN.
0128      *
0129      * If DMA_BUF_SYNC_WRITE is set, the returned sync file waits on
0130      * any users of the dma-buf (read or write) to complete.  Waiting
0131      * on the returned sync file is equivalent to poll() with POLLOUT.
0132      * If both DMA_BUF_SYNC_WRITE and DMA_BUF_SYNC_READ are set, this
0133      * is equivalent to just DMA_BUF_SYNC_WRITE.
0134      */
0135     __u32 flags;
0136     /** @fd: Returned sync file descriptor */
0137     __s32 fd;
0138 };
0139 
0140 /**
0141  * struct dma_buf_import_sync_file - Insert a sync_file into a dma-buf
0142  *
0143  * Userspace can perform a DMA_BUF_IOCTL_IMPORT_SYNC_FILE to insert a
0144  * sync_file into a dma-buf for the purposes of implicit synchronization
0145  * with other dma-buf consumers.  This allows clients using explicitly
0146  * synchronized APIs such as Vulkan to inter-op with dma-buf consumers
0147  * which expect implicit synchronization such as OpenGL or most media
0148  * drivers/video.
0149  */
0150 struct dma_buf_import_sync_file {
0151     /**
0152      * @flags: Read/write flags
0153      *
0154      * Must be DMA_BUF_SYNC_READ, DMA_BUF_SYNC_WRITE, or both.
0155      *
0156      * If DMA_BUF_SYNC_READ is set and DMA_BUF_SYNC_WRITE is not set,
0157      * this inserts the sync_file as a read-only fence.  Any subsequent
0158      * implicitly synchronized writes to this dma-buf will wait on this
0159      * fence but reads will not.
0160      *
0161      * If DMA_BUF_SYNC_WRITE is set, this inserts the sync_file as a
0162      * write fence.  All subsequent implicitly synchronized access to
0163      * this dma-buf will wait on this fence.
0164      */
0165     __u32 flags;
0166     /** @fd: Sync file descriptor */
0167     __s32 fd;
0168 };
0169 
0170 #define DMA_BUF_BASE        'b'
0171 #define DMA_BUF_IOCTL_SYNC  _IOW(DMA_BUF_BASE, 0, struct dma_buf_sync)
0172 
0173 /* 32/64bitness of this uapi was botched in android, there's no difference
0174  * between them in actual uapi, they're just different numbers.
0175  */
0176 #define DMA_BUF_SET_NAME    _IOW(DMA_BUF_BASE, 1, const char *)
0177 #define DMA_BUF_SET_NAME_A  _IOW(DMA_BUF_BASE, 1, __u32)
0178 #define DMA_BUF_SET_NAME_B  _IOW(DMA_BUF_BASE, 1, __u64)
0179 #define DMA_BUF_IOCTL_EXPORT_SYNC_FILE  _IOWR(DMA_BUF_BASE, 2, struct dma_buf_export_sync_file)
0180 #define DMA_BUF_IOCTL_IMPORT_SYNC_FILE  _IOW(DMA_BUF_BASE, 3, struct dma_buf_import_sync_file)
0181 
0182 #endif