uapi/linux/acrn.h

0001 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
0002 /*
0003  * Userspace interface for /dev/acrn_hsm - ACRN Hypervisor Service Module
0004  *
0005  * This file can be used by applications that need to communicate with the HSM
0006  * via the ioctl interface.
0007  *
0008  * Copyright (C) 2021 Intel Corporation. All rights reserved.
0009  */
0010
0011 #ifndef _UAPI_ACRN_H
0012 #define _UAPI_ACRN_H
0013
0014 #include <linux/types.h>
0015 #include <linux/uuid.h>
0016
0017 #define ACRN_IO_REQUEST_MAX     16
0018
0019 #define ACRN_IOREQ_STATE_PENDING    0
0020 #define ACRN_IOREQ_STATE_COMPLETE   1
0021 #define ACRN_IOREQ_STATE_PROCESSING 2
0022 #define ACRN_IOREQ_STATE_FREE       3
0023
0024 #define ACRN_IOREQ_TYPE_PORTIO      0
0025 #define ACRN_IOREQ_TYPE_MMIO        1
0026 #define ACRN_IOREQ_TYPE_PCICFG      2
0027
0028 #define ACRN_IOREQ_DIR_READ     0
0029 #define ACRN_IOREQ_DIR_WRITE        1
0030
0031 /**
0032  * struct acrn_mmio_request - Info of a MMIO I/O request
0033  * @direction:  Access direction of this request (ACRN_IOREQ_DIR_*)
0034  * @reserved:   Reserved for alignment and should be 0
0035  * @address:    Access address of this MMIO I/O request
0036  * @size:   Access size of this MMIO I/O request
0037  * @value:  Read/write value of this MMIO I/O request
0038  */
0039 struct acrn_mmio_request {
0040     __u32   direction;
0041     __u32   reserved;
0042     __u64   address;
0043     __u64   size;
0044     __u64   value;
0045 };
0046
0047 /**
0048  * struct acrn_pio_request - Info of a PIO I/O request
0049  * @direction:  Access direction of this request (ACRN_IOREQ_DIR_*)
0050  * @reserved:   Reserved for alignment and should be 0
0051  * @address:    Access address of this PIO I/O request
0052  * @size:   Access size of this PIO I/O request
0053  * @value:  Read/write value of this PIO I/O request
0054  */
0055 struct acrn_pio_request {
0056     __u32   direction;
0057     __u32   reserved;
0058     __u64   address;
0059     __u64   size;
0060     __u32   value;
0061 };
0062
0063 /**
0064  * struct acrn_pci_request - Info of a PCI I/O request
0065  * @direction:  Access direction of this request (ACRN_IOREQ_DIR_*)
0066  * @reserved:   Reserved for alignment and should be 0
0067  * @size:   Access size of this PCI I/O request
0068  * @value:  Read/write value of this PIO I/O request
0069  * @bus:    PCI bus value of this PCI I/O request
0070  * @dev:    PCI device value of this PCI I/O request
0071  * @func:   PCI function value of this PCI I/O request
0072  * @reg:    PCI config space offset of this PCI I/O request
0073  *
0074  * Need keep same header layout with &struct acrn_pio_request.
0075  */
0076 struct acrn_pci_request {
0077     __u32   direction;
0078     __u32   reserved[3];
0079     __u64   size;
0080     __u32   value;
0081     __u32   bus;
0082     __u32   dev;
0083     __u32   func;
0084     __u32   reg;
0085 };
0086
0087 /**
0088  * struct acrn_io_request - 256-byte ACRN I/O request
0089  * @type:       Type of this request (ACRN_IOREQ_TYPE_*).
0090  * @completion_polling: Polling flag. Hypervisor will poll completion of the
0091  *          I/O request if this flag set.
0092  * @reserved0:      Reserved fields.
0093  * @reqs:       Union of different types of request. Byte offset: 64.
0094  * @reqs.pio_request:   PIO request data of the I/O request.
0095  * @reqs.pci_request:   PCI configuration space request data of the I/O request.
0096  * @reqs.mmio_request:  MMIO request data of the I/O request.
0097  * @reqs.data:      Raw data of the I/O request.
0098  * @reserved1:      Reserved fields.
0099  * @kernel_handled: Flag indicates this request need be handled in kernel.
0100  * @processed:      The status of this request (ACRN_IOREQ_STATE_*).
0101  *
0102  * The state transitions of ACRN I/O request:
0103  *
0104  *    FREE -> PENDING -> PROCESSING -> COMPLETE -> FREE -> ...
0105  *
0106  * An I/O request in COMPLETE or FREE state is owned by the hypervisor. HSM and
0107  * ACRN userspace are in charge of processing the others.
0108  *
0109  * On basis of the states illustrated above, a typical lifecycle of ACRN IO
0110  * request would look like:
0111  *
0112  * Flow                 (assume the initial state is FREE)
0113  * |
0114  * |   Service VM vCPU 0     Service VM vCPU x      User vCPU y
0115  * |
0116  * |                                             hypervisor:
0117  * |                                               fills in type, addr, etc.
0118  * |                                               pauses the User VM vCPU y
0119  * |                                               sets the state to PENDING (a)
0120  * |                                               fires an upcall to Service VM
0121  * |
0122  * | HSM:
0123  * |  scans for PENDING requests
0124  * |  sets the states to PROCESSING (b)
0125  * |  assigns the requests to clients (c)
0126  * V
0127  * |                     client:
0128  * |                       scans for the assigned requests
0129  * |                       handles the requests (d)
0130  * |                     HSM:
0131  * |                       sets states to COMPLETE
0132  * |                       notifies the hypervisor
0133  * |
0134  * |                     hypervisor:
0135  * |                       resumes User VM vCPU y (e)
0136  * |
0137  * |                                             hypervisor:
0138  * |                                               post handling (f)
0139  * V                                               sets states to FREE
0140  *
0141  * Note that the procedures (a) to (f) in the illustration above require to be
0142  * strictly processed in the order.  One vCPU cannot trigger another request of
0143  * I/O emulation before completing the previous one.
0144  *
0145  * Atomic and barriers are required when HSM and hypervisor accessing the state
0146  * of &struct acrn_io_request.
0147  *
0148  */
0149 struct acrn_io_request {
0150     __u32   type;
0151     __u32   completion_polling;
0152     __u32   reserved0[14];
0153     union {
0154         struct acrn_pio_request     pio_request;
0155         struct acrn_pci_request     pci_request;
0156         struct acrn_mmio_request    mmio_request;
0157         __u64               data[8];
0158     } reqs;
0159     __u32   reserved1;
0160     __u32   kernel_handled;
0161     __u32   processed;
0162 } __attribute__((aligned(256)));
0163
0164 struct acrn_io_request_buffer {
0165     union {
0166         struct acrn_io_request  req_slot[ACRN_IO_REQUEST_MAX];
0167         __u8            reserved[4096];
0168     };
0169 };
0170
0171 /**
0172  * struct acrn_ioreq_notify - The structure of ioreq completion notification
0173  * @vmid:   User VM ID
0174  * @reserved:   Reserved and should be 0
0175  * @vcpu:   vCPU ID
0176  */
0177 struct acrn_ioreq_notify {
0178     __u16   vmid;
0179     __u16   reserved;
0180     __u32   vcpu;
0181 };
0182
0183 /**
0184  * struct acrn_vm_creation - Info to create a User VM
0185  * @vmid:       User VM ID returned from the hypervisor
0186  * @reserved0:      Reserved and must be 0
0187  * @vcpu_num:       Number of vCPU in the VM. Return from hypervisor.
0188  * @reserved1:      Reserved and must be 0
0189  * @uuid:       UUID of the VM. Pass to hypervisor directly.
0190  * @vm_flag:        Flag of the VM creating. Pass to hypervisor directly.
0191  * @ioreq_buf:      Service VM GPA of I/O request buffer. Pass to
0192  *          hypervisor directly.
0193  * @cpu_affinity:   CPU affinity of the VM. Pass to hypervisor directly.
0194  *          It's a bitmap which indicates CPUs used by the VM.
0195  */
0196 struct acrn_vm_creation {
0197     __u16   vmid;
0198     __u16   reserved0;
0199     __u16   vcpu_num;
0200     __u16   reserved1;
0201     guid_t  uuid;
0202     __u64   vm_flag;
0203     __u64   ioreq_buf;
0204     __u64   cpu_affinity;
0205 };
0206
0207 /**
0208  * struct acrn_gp_regs - General registers of a User VM
0209  * @rax:    Value of register RAX
0210  * @rcx:    Value of register RCX
0211  * @rdx:    Value of register RDX
0212  * @rbx:    Value of register RBX
0213  * @rsp:    Value of register RSP
0214  * @rbp:    Value of register RBP
0215  * @rsi:    Value of register RSI
0216  * @rdi:    Value of register RDI
0217  * @r8:     Value of register R8
0218  * @r9:     Value of register R9
0219  * @r10:    Value of register R10
0220  * @r11:    Value of register R11
0221  * @r12:    Value of register R12
0222  * @r13:    Value of register R13
0223  * @r14:    Value of register R14
0224  * @r15:    Value of register R15
0225  */
0226 struct acrn_gp_regs {
0227     __le64  rax;
0228     __le64  rcx;
0229     __le64  rdx;
0230     __le64  rbx;
0231     __le64  rsp;
0232     __le64  rbp;
0233     __le64  rsi;
0234     __le64  rdi;
0235     __le64  r8;
0236     __le64  r9;
0237     __le64  r10;
0238     __le64  r11;
0239     __le64  r12;
0240     __le64  r13;
0241     __le64  r14;
0242     __le64  r15;
0243 };
0244
0245 /**
0246  * struct acrn_descriptor_ptr - Segment descriptor table of a User VM.
0247  * @limit:  Limit field.
0248  * @base:   Base field.
0249  * @reserved:   Reserved and must be 0.
0250  */
0251 struct acrn_descriptor_ptr {
0252     __le16  limit;
0253     __le64  base;
0254     __le16  reserved[3];
0255 } __attribute__ ((__packed__));
0256
0257 /**
0258  * struct acrn_regs - Registers structure of a User VM
0259  * @gprs:       General registers
0260  * @gdt:        Global Descriptor Table
0261  * @idt:        Interrupt Descriptor Table
0262  * @rip:        Value of register RIP
0263  * @cs_base:        Base of code segment selector
0264  * @cr0:        Value of register CR0
0265  * @cr4:        Value of register CR4
0266  * @cr3:        Value of register CR3
0267  * @ia32_efer:      Value of IA32_EFER MSR
0268  * @rflags:     Value of regsiter RFLAGS
0269  * @reserved_64:    Reserved and must be 0
0270  * @cs_ar:      Attribute field of code segment selector
0271  * @cs_limit:       Limit field of code segment selector
0272  * @reserved_32:    Reserved and must be 0
0273  * @cs_sel:     Value of code segment selector
0274  * @ss_sel:     Value of stack segment selector
0275  * @ds_sel:     Value of data segment selector
0276  * @es_sel:     Value of extra segment selector
0277  * @fs_sel:     Value of FS selector
0278  * @gs_sel:     Value of GS selector
0279  * @ldt_sel:        Value of LDT descriptor selector
0280  * @tr_sel:     Value of TSS descriptor selector
0281  */
0282 struct acrn_regs {
0283     struct acrn_gp_regs     gprs;
0284     struct acrn_descriptor_ptr  gdt;
0285     struct acrn_descriptor_ptr  idt;
0286
0287     __le64              rip;
0288     __le64              cs_base;
0289     __le64              cr0;
0290     __le64              cr4;
0291     __le64              cr3;
0292     __le64              ia32_efer;
0293     __le64              rflags;
0294     __le64              reserved_64[4];
0295
0296     __le32              cs_ar;
0297     __le32              cs_limit;
0298     __le32              reserved_32[3];
0299
0300     __le16              cs_sel;
0301     __le16              ss_sel;
0302     __le16              ds_sel;
0303     __le16              es_sel;
0304     __le16              fs_sel;
0305     __le16              gs_sel;
0306     __le16              ldt_sel;
0307     __le16              tr_sel;
0308 };
0309
0310 /**
0311  * struct acrn_vcpu_regs - Info of vCPU registers state
0312  * @vcpu_id:    vCPU ID
0313  * @reserved:   Reserved and must be 0
0314  * @vcpu_regs:  vCPU registers state
0315  *
0316  * This structure will be passed to hypervisor directly.
0317  */
0318 struct acrn_vcpu_regs {
0319     __u16           vcpu_id;
0320     __u16           reserved[3];
0321     struct acrn_regs    vcpu_regs;
0322 };
0323
0324 #define ACRN_MEM_ACCESS_RIGHT_MASK  0x00000007U
0325 #define ACRN_MEM_ACCESS_READ        0x00000001U
0326 #define ACRN_MEM_ACCESS_WRITE       0x00000002U
0327 #define ACRN_MEM_ACCESS_EXEC        0x00000004U
0328 #define ACRN_MEM_ACCESS_RWX     (ACRN_MEM_ACCESS_READ  | \
0329                      ACRN_MEM_ACCESS_WRITE | \
0330                      ACRN_MEM_ACCESS_EXEC)
0331
0332 #define ACRN_MEM_TYPE_MASK      0x000007C0U
0333 #define ACRN_MEM_TYPE_WB        0x00000040U
0334 #define ACRN_MEM_TYPE_WT        0x00000080U
0335 #define ACRN_MEM_TYPE_UC        0x00000100U
0336 #define ACRN_MEM_TYPE_WC        0x00000200U
0337 #define ACRN_MEM_TYPE_WP        0x00000400U
0338
0339 /* Memory mapping types */
0340 #define ACRN_MEMMAP_RAM         0
0341 #define ACRN_MEMMAP_MMIO        1
0342
0343 /**
0344  * struct acrn_vm_memmap - A EPT memory mapping info for a User VM.
0345  * @type:       Type of the memory mapping (ACRM_MEMMAP_*).
0346  *          Pass to hypervisor directly.
0347  * @attr:       Attribute of the memory mapping.
0348  *          Pass to hypervisor directly.
0349  * @user_vm_pa:     Physical address of User VM.
0350  *          Pass to hypervisor directly.
0351  * @service_vm_pa:  Physical address of Service VM.
0352  *          Pass to hypervisor directly.
0353  * @vma_base:       VMA address of Service VM. Pass to hypervisor directly.
0354  * @len:        Length of the memory mapping.
0355  *          Pass to hypervisor directly.
0356  */
0357 struct acrn_vm_memmap {
0358     __u32   type;
0359     __u32   attr;
0360     __u64   user_vm_pa;
0361     union {
0362         __u64   service_vm_pa;
0363         __u64   vma_base;
0364     };
0365     __u64   len;
0366 };
0367
0368 /* Type of interrupt of a passthrough device */
0369 #define ACRN_PTDEV_IRQ_INTX 0
0370 #define ACRN_PTDEV_IRQ_MSI  1
0371 #define ACRN_PTDEV_IRQ_MSIX 2
0372 /**
0373  * struct acrn_ptdev_irq - Interrupt data of a passthrough device.
0374  * @type:       Type (ACRN_PTDEV_IRQ_*)
0375  * @virt_bdf:       Virtual Bus/Device/Function
0376  * @phys_bdf:       Physical Bus/Device/Function
0377  * @intx:       Info of interrupt
0378  * @intx.virt_pin:  Virtual IOAPIC pin
0379  * @intx.phys_pin:  Physical IOAPIC pin
0380  * @intx.is_pic_pin:    Is PIC pin or not
0381  *
0382  * This structure will be passed to hypervisor directly.
0383  */
0384 struct acrn_ptdev_irq {
0385     __u32   type;
0386     __u16   virt_bdf;
0387     __u16   phys_bdf;
0388
0389     struct {
0390         __u32   virt_pin;
0391         __u32   phys_pin;
0392         __u32   is_pic_pin;
0393     } intx;
0394 };
0395
0396 /* Type of PCI device assignment */
0397 #define ACRN_PTDEV_QUIRK_ASSIGN (1U << 0)
0398
0399 #define ACRN_MMIODEV_RES_NUM    3
0400 #define ACRN_PCI_NUM_BARS   6
0401 /**
0402  * struct acrn_pcidev - Info for assigning or de-assigning a PCI device
0403  * @type:   Type of the assignment
0404  * @virt_bdf:   Virtual Bus/Device/Function
0405  * @phys_bdf:   Physical Bus/Device/Function
0406  * @intr_line:  PCI interrupt line
0407  * @intr_pin:   PCI interrupt pin
0408  * @bar:    PCI BARs.
0409  *
0410  * This structure will be passed to hypervisor directly.
0411  */
0412 struct acrn_pcidev {
0413     __u32   type;
0414     __u16   virt_bdf;
0415     __u16   phys_bdf;
0416     __u8    intr_line;
0417     __u8    intr_pin;
0418     __u32   bar[ACRN_PCI_NUM_BARS];
0419 };
0420
0421 /**
0422  * struct acrn_mmiodev - Info for assigning or de-assigning a MMIO device
0423  * @name:           Name of the MMIO device.
0424  * @res[].user_vm_pa:       Physical address of User VM of the MMIO region
0425  *              for the MMIO device.
0426  * @res[].service_vm_pa:    Physical address of Service VM of the MMIO
0427  *              region for the MMIO device.
0428  * @res[].size:         Size of the MMIO region for the MMIO device.
0429  * @res[].mem_type:     Memory type of the MMIO region for the MMIO
0430  *              device.
0431  *
0432  * This structure will be passed to hypervisor directly.
0433  */
0434 struct acrn_mmiodev {
0435     __u8    name[8];
0436     struct {
0437         __u64   user_vm_pa;
0438         __u64   service_vm_pa;
0439         __u64   size;
0440         __u64   mem_type;
0441     } res[ACRN_MMIODEV_RES_NUM];
0442 };
0443
0444 /**
0445  * struct acrn_vdev - Info for creating or destroying a virtual device
0446  * @id:             Union of identifier of the virtual device
0447  * @id.value:           Raw data of the identifier
0448  * @id.fields.vendor:       Vendor id of the virtual PCI device
0449  * @id.fields.device:       Device id of the virtual PCI device
0450  * @id.fields.legacy_id:    ID of the virtual device if not a PCI device
0451  * @slot:           Virtual Bus/Device/Function of the virtual
0452  *              device
0453  * @io_base:            IO resource base address of the virtual device
0454  * @io_size:            IO resource size of the virtual device
0455  * @args:           Arguments for the virtual device creation
0456  *
0457  * The created virtual device can be a PCI device or a legacy device (e.g.
0458  * a virtual UART controller) and it is emulated by the hypervisor. This
0459  * structure will be passed to hypervisor directly.
0460  */
0461 struct acrn_vdev {
0462     /*
0463      * the identifier of the device, the low 32 bits represent the vendor
0464      * id and device id of PCI device and the high 32 bits represent the
0465      * device number of the legacy device
0466      */
0467     union {
0468         __u64 value;
0469         struct {
0470             __le16 vendor;
0471             __le16 device;
0472             __le32 legacy_id;
0473         } fields;
0474     } id;
0475
0476     __u64   slot;
0477     __u32   io_addr[ACRN_PCI_NUM_BARS];
0478     __u32   io_size[ACRN_PCI_NUM_BARS];
0479     __u8    args[128];
0480 };
0481
0482 /**
0483  * struct acrn_msi_entry - Info for injecting a MSI interrupt to a VM
0484  * @msi_addr:   MSI addr[19:12] with dest vCPU ID
0485  * @msi_data:   MSI data[7:0] with vector
0486  */
0487 struct acrn_msi_entry {
0488     __u64   msi_addr;
0489     __u64   msi_data;
0490 };
0491
0492 struct acrn_acpi_generic_address {
0493     __u8    space_id;
0494     __u8    bit_width;
0495     __u8    bit_offset;
0496     __u8    access_size;
0497     __u64   address;
0498 } __attribute__ ((__packed__));
0499
0500 /**
0501  * struct acrn_cstate_data - A C state package defined in ACPI
0502  * @cx_reg: Register of the C state object
0503  * @type:   Type of the C state object
0504  * @latency:    The worst-case latency to enter and exit this C state
0505  * @power:  The average power consumption when in this C state
0506  */
0507 struct acrn_cstate_data {
0508     struct acrn_acpi_generic_address    cx_reg;
0509     __u8                    type;
0510     __u32                   latency;
0511     __u64                   power;
0512 };
0513
0514 /**
0515  * struct acrn_pstate_data - A P state package defined in ACPI
0516  * @core_frequency: CPU frequency (in MHz).
0517  * @power:      Power dissipation (in milliwatts).
0518  * @transition_latency: The worst-case latency in microseconds that CPU is
0519  *          unavailable during a transition from any P state to
0520  *          this P state.
0521  * @bus_master_latency: The worst-case latency in microseconds that Bus Masters
0522  *          are prevented from accessing memory during a transition
0523  *          from any P state to this P state.
0524  * @control:        The value to be written to Performance Control Register
0525  * @status:     Transition status.
0526  */
0527 struct acrn_pstate_data {
0528     __u64   core_frequency;
0529     __u64   power;
0530     __u64   transition_latency;
0531     __u64   bus_master_latency;
0532     __u64   control;
0533     __u64   status;
0534 };
0535
0536 #define PMCMD_TYPE_MASK     0x000000ff
0537 enum acrn_pm_cmd_type {
0538     ACRN_PMCMD_GET_PX_CNT,
0539     ACRN_PMCMD_GET_PX_DATA,
0540     ACRN_PMCMD_GET_CX_CNT,
0541     ACRN_PMCMD_GET_CX_DATA,
0542 };
0543
0544 #define ACRN_IOEVENTFD_FLAG_PIO     0x01
0545 #define ACRN_IOEVENTFD_FLAG_DATAMATCH   0x02
0546 #define ACRN_IOEVENTFD_FLAG_DEASSIGN    0x04
0547 /**
0548  * struct acrn_ioeventfd - Data to operate a &struct hsm_ioeventfd
0549  * @fd:     The fd of eventfd associated with a hsm_ioeventfd
0550  * @flags:  Logical-OR of ACRN_IOEVENTFD_FLAG_*
0551  * @addr:   The start address of IO range of ioeventfd
0552  * @len:    The length of IO range of ioeventfd
0553  * @reserved:   Reserved and should be 0
0554  * @data:   Data for data matching
0555  *
0556  * Without flag ACRN_IOEVENTFD_FLAG_DEASSIGN, ioctl ACRN_IOCTL_IOEVENTFD
0557  * creates a &struct hsm_ioeventfd with properties originated from &struct
0558  * acrn_ioeventfd. With flag ACRN_IOEVENTFD_FLAG_DEASSIGN, ioctl
0559  * ACRN_IOCTL_IOEVENTFD destroys the &struct hsm_ioeventfd matching the fd.
0560  */
0561 struct acrn_ioeventfd {
0562     __u32   fd;
0563     __u32   flags;
0564     __u64   addr;
0565     __u32   len;
0566     __u32   reserved;
0567     __u64   data;
0568 };
0569
0570 #define ACRN_IRQFD_FLAG_DEASSIGN    0x01
0571 /**
0572  * struct acrn_irqfd - Data to operate a &struct hsm_irqfd
0573  * @fd:     The fd of eventfd associated with a hsm_irqfd
0574  * @flags:  Logical-OR of ACRN_IRQFD_FLAG_*
0575  * @msi:    Info of MSI associated with the irqfd
0576  */
0577 struct acrn_irqfd {
0578     __s32           fd;
0579     __u32           flags;
0580     struct acrn_msi_entry   msi;
0581 };
0582
0583 /* The ioctl type, documented in ioctl-number.rst */
0584 #define ACRN_IOCTL_TYPE         0xA2
0585
0586 /*
0587  * Common IOCTL IDs definition for ACRN userspace
0588  */
0589 #define ACRN_IOCTL_CREATE_VM        \
0590     _IOWR(ACRN_IOCTL_TYPE, 0x10, struct acrn_vm_creation)
0591 #define ACRN_IOCTL_DESTROY_VM       \
0592     _IO(ACRN_IOCTL_TYPE, 0x11)
0593 #define ACRN_IOCTL_START_VM     \
0594     _IO(ACRN_IOCTL_TYPE, 0x12)
0595 #define ACRN_IOCTL_PAUSE_VM     \
0596     _IO(ACRN_IOCTL_TYPE, 0x13)
0597 #define ACRN_IOCTL_RESET_VM     \
0598     _IO(ACRN_IOCTL_TYPE, 0x15)
0599 #define ACRN_IOCTL_SET_VCPU_REGS    \
0600     _IOW(ACRN_IOCTL_TYPE, 0x16, struct acrn_vcpu_regs)
0601
0602 #define ACRN_IOCTL_INJECT_MSI       \
0603     _IOW(ACRN_IOCTL_TYPE, 0x23, struct acrn_msi_entry)
0604 #define ACRN_IOCTL_VM_INTR_MONITOR  \
0605     _IOW(ACRN_IOCTL_TYPE, 0x24, unsigned long)
0606 #define ACRN_IOCTL_SET_IRQLINE      \
0607     _IOW(ACRN_IOCTL_TYPE, 0x25, __u64)
0608
0609 #define ACRN_IOCTL_NOTIFY_REQUEST_FINISH \
0610     _IOW(ACRN_IOCTL_TYPE, 0x31, struct acrn_ioreq_notify)
0611 #define ACRN_IOCTL_CREATE_IOREQ_CLIENT  \
0612     _IO(ACRN_IOCTL_TYPE, 0x32)
0613 #define ACRN_IOCTL_ATTACH_IOREQ_CLIENT  \
0614     _IO(ACRN_IOCTL_TYPE, 0x33)
0615 #define ACRN_IOCTL_DESTROY_IOREQ_CLIENT \
0616     _IO(ACRN_IOCTL_TYPE, 0x34)
0617 #define ACRN_IOCTL_CLEAR_VM_IOREQ   \
0618     _IO(ACRN_IOCTL_TYPE, 0x35)
0619
0620 #define ACRN_IOCTL_SET_MEMSEG       \
0621     _IOW(ACRN_IOCTL_TYPE, 0x41, struct acrn_vm_memmap)
0622 #define ACRN_IOCTL_UNSET_MEMSEG     \
0623     _IOW(ACRN_IOCTL_TYPE, 0x42, struct acrn_vm_memmap)
0624
0625 #define ACRN_IOCTL_SET_PTDEV_INTR   \
0626     _IOW(ACRN_IOCTL_TYPE, 0x53, struct acrn_ptdev_irq)
0627 #define ACRN_IOCTL_RESET_PTDEV_INTR \
0628     _IOW(ACRN_IOCTL_TYPE, 0x54, struct acrn_ptdev_irq)
0629 #define ACRN_IOCTL_ASSIGN_PCIDEV    \
0630     _IOW(ACRN_IOCTL_TYPE, 0x55, struct acrn_pcidev)
0631 #define ACRN_IOCTL_DEASSIGN_PCIDEV  \
0632     _IOW(ACRN_IOCTL_TYPE, 0x56, struct acrn_pcidev)
0633 #define ACRN_IOCTL_ASSIGN_MMIODEV   \
0634     _IOW(ACRN_IOCTL_TYPE, 0x57, struct acrn_mmiodev)
0635 #define ACRN_IOCTL_DEASSIGN_MMIODEV \
0636     _IOW(ACRN_IOCTL_TYPE, 0x58, struct acrn_mmiodev)
0637 #define ACRN_IOCTL_CREATE_VDEV  \
0638     _IOW(ACRN_IOCTL_TYPE, 0x59, struct acrn_vdev)
0639 #define ACRN_IOCTL_DESTROY_VDEV \
0640     _IOW(ACRN_IOCTL_TYPE, 0x5A, struct acrn_vdev)
0641
0642 #define ACRN_IOCTL_PM_GET_CPU_STATE \
0643     _IOWR(ACRN_IOCTL_TYPE, 0x60, __u64)
0644
0645 #define ACRN_IOCTL_IOEVENTFD        \
0646     _IOW(ACRN_IOCTL_TYPE, 0x70, struct acrn_ioeventfd)
0647 #define ACRN_IOCTL_IRQFD        \
0648     _IOW(ACRN_IOCTL_TYPE, 0x71, struct acrn_irqfd)
0649
0650 #endif /* _UAPI_ACRN_H */