include/sound/wss.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 #ifndef __SOUND_WSS_H
0003 #define __SOUND_WSS_H
0004
0005 /*
0006  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
0007  *  Definitions for CS4231 & InterWave chips & compatible chips
0008  */
0009
0010 #include <sound/control.h>
0011 #include <sound/pcm.h>
0012 #include <sound/timer.h>
0013
0014 #include <sound/cs4231-regs.h>
0015
0016 /* defines for codec.mode */
0017
0018 #define WSS_MODE_NONE   0x0000
0019 #define WSS_MODE_PLAY   0x0001
0020 #define WSS_MODE_RECORD 0x0002
0021 #define WSS_MODE_TIMER  0x0004
0022 #define WSS_MODE_OPEN   (WSS_MODE_PLAY|WSS_MODE_RECORD|WSS_MODE_TIMER)
0023
0024 /* defines for codec.hardware */
0025
0026 #define WSS_HW_DETECT        0x0000 /* let CS4231 driver detect chip */
0027 #define WSS_HW_DETECT3  0x0001  /* allow mode 3 */
0028 #define WSS_HW_TYPE_MASK    0xff00  /* type mask */
0029 #define WSS_HW_CS4231_MASK   0x0100 /* CS4231 serie */
0030 #define WSS_HW_CS4231        0x0100 /* CS4231 chip */
0031 #define WSS_HW_CS4231A       0x0101 /* CS4231A chip */
0032 #define WSS_HW_AD1845   0x0102  /* AD1845 chip */
0033 #define WSS_HW_CS4232_MASK   0x0200 /* CS4232 serie (has control ports) */
0034 #define WSS_HW_CS4232        0x0200 /* CS4232 */
0035 #define WSS_HW_CS4232A       0x0201 /* CS4232A */
0036 #define WSS_HW_CS4236   0x0202  /* CS4236 */
0037 #define WSS_HW_CS4236B_MASK 0x0400  /* CS4236B serie (has extended control regs) */
0038 #define WSS_HW_CS4235   0x0400  /* CS4235 - Crystal Clear (tm) stereo enhancement */
0039 #define WSS_HW_CS4236B       0x0401 /* CS4236B */
0040 #define WSS_HW_CS4237B       0x0402 /* CS4237B - SRS 3D */
0041 #define WSS_HW_CS4238B  0x0403  /* CS4238B - QSOUND 3D */
0042 #define WSS_HW_CS4239   0x0404  /* CS4239 - Crystal Clear (tm) stereo enhancement */
0043 #define WSS_HW_AD1848_MASK  0x0800  /* AD1848 serie (half duplex) */
0044 #define WSS_HW_AD1847       0x0801  /* AD1847 chip */
0045 #define WSS_HW_AD1848       0x0802  /* AD1848 chip */
0046 #define WSS_HW_CS4248       0x0803  /* CS4248 chip */
0047 #define WSS_HW_CMI8330      0x0804  /* CMI8330 chip */
0048 #define WSS_HW_THINKPAD     0x0805  /* Thinkpad 360/750/755 */
0049 /* compatible, but clones */
0050 #define WSS_HW_INTERWAVE     0x1000 /* InterWave chip */
0051 #define WSS_HW_OPL3SA2       0x1101 /* OPL3-SA2 chip, similar to cs4231 */
0052 #define WSS_HW_OPTI93X  0x1102  /* Opti 930/931/933 */
0053
0054 /* defines for codec.hwshare */
0055 #define WSS_HWSHARE_IRQ (1<<0)
0056 #define WSS_HWSHARE_DMA1    (1<<1)
0057 #define WSS_HWSHARE_DMA2    (1<<2)
0058
0059 /* IBM Thinkpad specific stuff */
0060 #define AD1848_THINKPAD_CTL_PORT1       0x15e8
0061 #define AD1848_THINKPAD_CTL_PORT2       0x15e9
0062 #define AD1848_THINKPAD_CS4248_ENABLE_BIT   0x02
0063
0064 struct snd_wss {
0065     unsigned long port;     /* base i/o port */
0066     struct resource *res_port;
0067     unsigned long cport;        /* control base i/o port (CS4236) */
0068     struct resource *res_cport;
0069     int irq;            /* IRQ line */
0070     int dma1;           /* playback DMA */
0071     int dma2;           /* record DMA */
0072     unsigned short version;     /* version of CODEC chip */
0073     unsigned short mode;        /* see to WSS_MODE_XXXX */
0074     unsigned short hardware;    /* see to WSS_HW_XXXX */
0075     unsigned short hwshare;     /* shared resources */
0076     unsigned short single_dma:1,    /* forced single DMA mode (GUS 16-bit */
0077                     /* daughter board) or dma1 == dma2 */
0078                ebus_flag:1, /* SPARC: EBUS present */
0079                thinkpad_flag:1; /* Thinkpad CS4248 needs extra help */
0080
0081     struct snd_card *card;
0082     struct snd_pcm *pcm;
0083     struct snd_pcm_substream *playback_substream;
0084     struct snd_pcm_substream *capture_substream;
0085     struct snd_timer *timer;
0086
0087     unsigned char image[32];    /* registers image */
0088     unsigned char eimage[32];   /* extended registers image */
0089     unsigned char cimage[16];   /* control registers image */
0090     int mce_bit;
0091     int calibrate_mute;
0092     int sw_3d_bit;
0093     unsigned int p_dma_size;
0094     unsigned int c_dma_size;
0095
0096     spinlock_t reg_lock;
0097     struct mutex mce_mutex;
0098     struct mutex open_mutex;
0099
0100     int (*rate_constraint) (struct snd_pcm_runtime *runtime);
0101     void (*set_playback_format) (struct snd_wss *chip,
0102                      struct snd_pcm_hw_params *hw_params,
0103                      unsigned char pdfr);
0104     void (*set_capture_format) (struct snd_wss *chip,
0105                     struct snd_pcm_hw_params *hw_params,
0106                     unsigned char cdfr);
0107     void (*trigger) (struct snd_wss *chip, unsigned int what, int start);
0108 #ifdef CONFIG_PM
0109     void (*suspend) (struct snd_wss *chip);
0110     void (*resume) (struct snd_wss *chip);
0111 #endif
0112     void *dma_private_data;
0113     int (*claim_dma) (struct snd_wss *chip,
0114               void *dma_private_data, int dma);
0115     int (*release_dma) (struct snd_wss *chip,
0116                 void *dma_private_data, int dma);
0117 };
0118
0119 /* exported functions */
0120
0121 void snd_wss_out(struct snd_wss *chip, unsigned char reg, unsigned char val);
0122 unsigned char snd_wss_in(struct snd_wss *chip, unsigned char reg);
0123 void snd_cs4236_ext_out(struct snd_wss *chip,
0124             unsigned char reg, unsigned char val);
0125 unsigned char snd_cs4236_ext_in(struct snd_wss *chip, unsigned char reg);
0126 void snd_wss_mce_up(struct snd_wss *chip);
0127 void snd_wss_mce_down(struct snd_wss *chip);
0128
0129 void snd_wss_overrange(struct snd_wss *chip);
0130
0131 irqreturn_t snd_wss_interrupt(int irq, void *dev_id);
0132
0133 const char *snd_wss_chip_id(struct snd_wss *chip);
0134
0135 int snd_wss_create(struct snd_card *card,
0136               unsigned long port,
0137               unsigned long cport,
0138               int irq, int dma1, int dma2,
0139               unsigned short hardware,
0140               unsigned short hwshare,
0141               struct snd_wss **rchip);
0142 int snd_wss_pcm(struct snd_wss *chip, int device);
0143 int snd_wss_timer(struct snd_wss *chip, int device);
0144 int snd_wss_mixer(struct snd_wss *chip);
0145
0146 const struct snd_pcm_ops *snd_wss_get_pcm_ops(int direction);
0147
0148 int snd_cs4236_create(struct snd_card *card,
0149               unsigned long port,
0150               unsigned long cport,
0151               int irq, int dma1, int dma2,
0152               unsigned short hardware,
0153               unsigned short hwshare,
0154               struct snd_wss **rchip);
0155 int snd_cs4236_pcm(struct snd_wss *chip, int device);
0156 int snd_cs4236_mixer(struct snd_wss *chip);
0157
0158 /*
0159  *  mixer library
0160  */
0161
0162 #define WSS_SINGLE(xname, xindex, reg, shift, mask, invert) \
0163 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
0164   .name = xname, \
0165   .index = xindex, \
0166   .info = snd_wss_info_single, \
0167   .get = snd_wss_get_single, \
0168   .put = snd_wss_put_single, \
0169   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
0170
0171 int snd_wss_info_single(struct snd_kcontrol *kcontrol,
0172             struct snd_ctl_elem_info *uinfo);
0173 int snd_wss_get_single(struct snd_kcontrol *kcontrol,
0174             struct snd_ctl_elem_value *ucontrol);
0175 int snd_wss_put_single(struct snd_kcontrol *kcontrol,
0176             struct snd_ctl_elem_value *ucontrol);
0177
0178 #define WSS_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
0179 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
0180   .name = xname, \
0181   .index = xindex, \
0182   .info = snd_wss_info_double, \
0183   .get = snd_wss_get_double, \
0184   .put = snd_wss_put_double, \
0185   .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | \
0186            (shift_right << 19) | (mask << 24) | (invert << 22) }
0187
0188 #define WSS_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
0189 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
0190   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
0191   .name = xname, \
0192   .index = xindex, \
0193   .info = snd_wss_info_single, \
0194   .get = snd_wss_get_single, \
0195   .put = snd_wss_put_single, \
0196   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
0197   .tlv = { .p = (xtlv) } }
0198
0199 #define WSS_DOUBLE_TLV(xname, xindex, left_reg, right_reg, \
0200             shift_left, shift_right, mask, invert, xtlv) \
0201 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
0202   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
0203   .name = xname, \
0204   .index = xindex, \
0205   .info = snd_wss_info_double, \
0206   .get = snd_wss_get_double, \
0207   .put = snd_wss_put_double, \
0208   .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | \
0209            (shift_right << 19) | (mask << 24) | (invert << 22), \
0210   .tlv = { .p = (xtlv) } }
0211
0212
0213 int snd_wss_info_double(struct snd_kcontrol *kcontrol,
0214             struct snd_ctl_elem_info *uinfo);
0215 int snd_wss_get_double(struct snd_kcontrol *kcontrol,
0216             struct snd_ctl_elem_value *ucontrol);
0217 int snd_wss_put_double(struct snd_kcontrol *kcontrol,
0218             struct snd_ctl_elem_value *ucontrol);
0219
0220 #endif /* __SOUND_WSS_H */