include/sound/wm8904.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Platform data for WM8904
0004  *
0005  * Copyright 2009 Wolfson Microelectronics PLC.
0006  *
0007  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
0008  */
0009
0010 #ifndef __MFD_WM8994_PDATA_H__
0011 #define __MFD_WM8994_PDATA_H__
0012
0013 /* Used to enable configuration of a GPIO to all zeros */
0014 #define WM8904_GPIO_NO_CONFIG 0x8000
0015
0016 /*
0017  * R6 (0x06) - Mic Bias Control 0
0018  */
0019 #define WM8904_MICDET_THR_MASK                  0x0070  /* MICDET_THR - [6:4] */
0020 #define WM8904_MICDET_THR_SHIFT                      4  /* MICDET_THR - [6:4] */
0021 #define WM8904_MICDET_THR_WIDTH                      3  /* MICDET_THR - [6:4] */
0022 #define WM8904_MICSHORT_THR_MASK                0x000C  /* MICSHORT_THR - [3:2] */
0023 #define WM8904_MICSHORT_THR_SHIFT                    2  /* MICSHORT_THR - [3:2] */
0024 #define WM8904_MICSHORT_THR_WIDTH                    2  /* MICSHORT_THR - [3:2] */
0025 #define WM8904_MICDET_ENA                       0x0002  /* MICDET_ENA */
0026 #define WM8904_MICDET_ENA_MASK                  0x0002  /* MICDET_ENA */
0027 #define WM8904_MICDET_ENA_SHIFT                      1  /* MICDET_ENA */
0028 #define WM8904_MICDET_ENA_WIDTH                      1  /* MICDET_ENA */
0029 #define WM8904_MICBIAS_ENA                      0x0001  /* MICBIAS_ENA */
0030 #define WM8904_MICBIAS_ENA_MASK                 0x0001  /* MICBIAS_ENA */
0031 #define WM8904_MICBIAS_ENA_SHIFT                     0  /* MICBIAS_ENA */
0032 #define WM8904_MICBIAS_ENA_WIDTH                     1  /* MICBIAS_ENA */
0033
0034 /*
0035  * R7 (0x07) - Mic Bias Control 1
0036  */
0037 #define WM8904_MIC_DET_FILTER_ENA               0x8000  /* MIC_DET_FILTER_ENA */
0038 #define WM8904_MIC_DET_FILTER_ENA_MASK          0x8000  /* MIC_DET_FILTER_ENA */
0039 #define WM8904_MIC_DET_FILTER_ENA_SHIFT             15  /* MIC_DET_FILTER_ENA */
0040 #define WM8904_MIC_DET_FILTER_ENA_WIDTH              1  /* MIC_DET_FILTER_ENA */
0041 #define WM8904_MIC_SHORT_FILTER_ENA             0x4000  /* MIC_SHORT_FILTER_ENA */
0042 #define WM8904_MIC_SHORT_FILTER_ENA_MASK        0x4000  /* MIC_SHORT_FILTER_ENA */
0043 #define WM8904_MIC_SHORT_FILTER_ENA_SHIFT           14  /* MIC_SHORT_FILTER_ENA */
0044 #define WM8904_MIC_SHORT_FILTER_ENA_WIDTH            1  /* MIC_SHORT_FILTER_ENA */
0045 #define WM8904_MICBIAS_SEL_MASK                 0x0007  /* MICBIAS_SEL - [2:0] */
0046 #define WM8904_MICBIAS_SEL_SHIFT                     0  /* MICBIAS_SEL - [2:0] */
0047 #define WM8904_MICBIAS_SEL_WIDTH                     3  /* MICBIAS_SEL - [2:0] */
0048
0049
0050 /*
0051  * R121 (0x79) - GPIO Control 1
0052  */
0053 #define WM8904_GPIO1_PU                         0x0020  /* GPIO1_PU */
0054 #define WM8904_GPIO1_PU_MASK                    0x0020  /* GPIO1_PU */
0055 #define WM8904_GPIO1_PU_SHIFT                        5  /* GPIO1_PU */
0056 #define WM8904_GPIO1_PU_WIDTH                        1  /* GPIO1_PU */
0057 #define WM8904_GPIO1_PD                         0x0010  /* GPIO1_PD */
0058 #define WM8904_GPIO1_PD_MASK                    0x0010  /* GPIO1_PD */
0059 #define WM8904_GPIO1_PD_SHIFT                        4  /* GPIO1_PD */
0060 #define WM8904_GPIO1_PD_WIDTH                        1  /* GPIO1_PD */
0061 #define WM8904_GPIO1_SEL_MASK                   0x000F  /* GPIO1_SEL - [3:0] */
0062 #define WM8904_GPIO1_SEL_SHIFT                       0  /* GPIO1_SEL - [3:0] */
0063 #define WM8904_GPIO1_SEL_WIDTH                       4  /* GPIO1_SEL - [3:0] */
0064
0065 /*
0066  * R122 (0x7A) - GPIO Control 2
0067  */
0068 #define WM8904_GPIO2_PU                         0x0020  /* GPIO2_PU */
0069 #define WM8904_GPIO2_PU_MASK                    0x0020  /* GPIO2_PU */
0070 #define WM8904_GPIO2_PU_SHIFT                        5  /* GPIO2_PU */
0071 #define WM8904_GPIO2_PU_WIDTH                        1  /* GPIO2_PU */
0072 #define WM8904_GPIO2_PD                         0x0010  /* GPIO2_PD */
0073 #define WM8904_GPIO2_PD_MASK                    0x0010  /* GPIO2_PD */
0074 #define WM8904_GPIO2_PD_SHIFT                        4  /* GPIO2_PD */
0075 #define WM8904_GPIO2_PD_WIDTH                        1  /* GPIO2_PD */
0076 #define WM8904_GPIO2_SEL_MASK                   0x000F  /* GPIO2_SEL - [3:0] */
0077 #define WM8904_GPIO2_SEL_SHIFT                       0  /* GPIO2_SEL - [3:0] */
0078 #define WM8904_GPIO2_SEL_WIDTH                       4  /* GPIO2_SEL - [3:0] */
0079
0080 /*
0081  * R123 (0x7B) - GPIO Control 3
0082  */
0083 #define WM8904_GPIO3_PU                         0x0020  /* GPIO3_PU */
0084 #define WM8904_GPIO3_PU_MASK                    0x0020  /* GPIO3_PU */
0085 #define WM8904_GPIO3_PU_SHIFT                        5  /* GPIO3_PU */
0086 #define WM8904_GPIO3_PU_WIDTH                        1  /* GPIO3_PU */
0087 #define WM8904_GPIO3_PD                         0x0010  /* GPIO3_PD */
0088 #define WM8904_GPIO3_PD_MASK                    0x0010  /* GPIO3_PD */
0089 #define WM8904_GPIO3_PD_SHIFT                        4  /* GPIO3_PD */
0090 #define WM8904_GPIO3_PD_WIDTH                        1  /* GPIO3_PD */
0091 #define WM8904_GPIO3_SEL_MASK                   0x000F  /* GPIO3_SEL - [3:0] */
0092 #define WM8904_GPIO3_SEL_SHIFT                       0  /* GPIO3_SEL - [3:0] */
0093 #define WM8904_GPIO3_SEL_WIDTH                       4  /* GPIO3_SEL - [3:0] */
0094
0095 /*
0096  * R124 (0x7C) - GPIO Control 4
0097  */
0098 #define WM8904_GPI7_ENA                         0x0200  /* GPI7_ENA */
0099 #define WM8904_GPI7_ENA_MASK                    0x0200  /* GPI7_ENA */
0100 #define WM8904_GPI7_ENA_SHIFT                        9  /* GPI7_ENA */
0101 #define WM8904_GPI7_ENA_WIDTH                        1  /* GPI7_ENA */
0102 #define WM8904_GPI8_ENA                         0x0100  /* GPI8_ENA */
0103 #define WM8904_GPI8_ENA_MASK                    0x0100  /* GPI8_ENA */
0104 #define WM8904_GPI8_ENA_SHIFT                        8  /* GPI8_ENA */
0105 #define WM8904_GPI8_ENA_WIDTH                        1  /* GPI8_ENA */
0106 #define WM8904_GPIO_BCLK_MODE_ENA               0x0080  /* GPIO_BCLK_MODE_ENA */
0107 #define WM8904_GPIO_BCLK_MODE_ENA_MASK          0x0080  /* GPIO_BCLK_MODE_ENA */
0108 #define WM8904_GPIO_BCLK_MODE_ENA_SHIFT              7  /* GPIO_BCLK_MODE_ENA */
0109 #define WM8904_GPIO_BCLK_MODE_ENA_WIDTH              1  /* GPIO_BCLK_MODE_ENA */
0110 #define WM8904_GPIO_BCLK_SEL_MASK               0x000F  /* GPIO_BCLK_SEL - [3:0] */
0111 #define WM8904_GPIO_BCLK_SEL_SHIFT                   0  /* GPIO_BCLK_SEL - [3:0] */
0112 #define WM8904_GPIO_BCLK_SEL_WIDTH                   4  /* GPIO_BCLK_SEL - [3:0] */
0113
0114 #define WM8904_MIC_REGS  2
0115 #define WM8904_GPIO_REGS 4
0116 #define WM8904_DRC_REGS  4
0117 #define WM8904_EQ_REGS   24
0118
0119 /**
0120  * DRC configurations are specified with a label and a set of register
0121  * values to write (the enable bits will be ignored).  At runtime an
0122  * enumerated control will be presented for each DRC block allowing
0123  * the user to choose the configuration to use.
0124  *
0125  * Configurations may be generated by hand or by using the DRC control
0126  * panel provided by the WISCE - see  http://www.wolfsonmicro.com/wisce/
0127  * for details.
0128  */
0129 struct wm8904_drc_cfg {
0130     const char *name;
0131     u16 regs[WM8904_DRC_REGS];
0132 };
0133
0134 /**
0135  * ReTune Mobile configurations are specified with a label, sample
0136  * rate and set of values to write (the enable bits will be ignored).
0137  *
0138  * Configurations are expected to be generated using the ReTune Mobile
0139  * control panel in WISCE - see http://www.wolfsonmicro.com/wisce/
0140  */
0141 struct wm8904_retune_mobile_cfg {
0142     const char *name;
0143     unsigned int rate;
0144     u16 regs[WM8904_EQ_REGS];
0145 };
0146
0147 struct wm8904_pdata {
0148     int num_drc_cfgs;
0149     struct wm8904_drc_cfg *drc_cfgs;
0150
0151     int num_retune_mobile_cfgs;
0152     struct wm8904_retune_mobile_cfg *retune_mobile_cfgs;
0153
0154     u32 gpio_cfg[WM8904_GPIO_REGS];
0155     u32 mic_cfg[WM8904_MIC_REGS];
0156 };
0157
0158 #endif