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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
0002 /*
0003  * This file is provided under a dual BSD/GPLv2 license.  When using or
0004  * redistributing this file, you may do so under either license.
0005  *
0006  * Copyright(c) 2018 Intel Corporation. All rights reserved.
0007  */
0008 
0009 #ifndef __INCLUDE_SOUND_SOF_XTENSA_H__
0010 #define __INCLUDE_SOUND_SOF_XTENSA_H__
0011 
0012 #include <sound/sof/header.h>
0013 
0014 /*
0015  * Architecture specific debug
0016  */
0017 
0018 /* Xtensa Firmware Oops data */
0019 struct sof_ipc_dsp_oops_xtensa {
0020     struct sof_ipc_dsp_oops_arch_hdr arch_hdr;
0021     struct sof_ipc_dsp_oops_plat_hdr plat_hdr;
0022     uint32_t exccause;
0023     uint32_t excvaddr;
0024     uint32_t ps;
0025     uint32_t epc1;
0026     uint32_t epc2;
0027     uint32_t epc3;
0028     uint32_t epc4;
0029     uint32_t epc5;
0030     uint32_t epc6;
0031     uint32_t epc7;
0032     uint32_t eps2;
0033     uint32_t eps3;
0034     uint32_t eps4;
0035     uint32_t eps5;
0036     uint32_t eps6;
0037     uint32_t eps7;
0038     uint32_t depc;
0039     uint32_t intenable;
0040     uint32_t interrupt;
0041     uint32_t sar;
0042     uint32_t debugcause;
0043     uint32_t windowbase;
0044     uint32_t windowstart;
0045     uint32_t excsave1;
0046     uint32_t ar[];
0047 }  __packed;
0048 
0049 #endif