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0006 #ifndef __SOUND_DESIGNWARE_I2S_H
0007 #define __SOUND_DESIGNWARE_I2S_H
0008
0009 #include <linux/dmaengine.h>
0010 #include <linux/types.h>
0011
0012
0013
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0017
0018 struct i2s_clk_config_data {
0019 int chan_nr;
0020 u32 data_width;
0021 u32 sample_rate;
0022 };
0023
0024 struct i2s_platform_data {
0025 #define DWC_I2S_PLAY (1 << 0)
0026 #define DWC_I2S_RECORD (1 << 1)
0027 #define DW_I2S_SLAVE (1 << 2)
0028 #define DW_I2S_MASTER (1 << 3)
0029 unsigned int cap;
0030 int channel;
0031 u32 snd_fmts;
0032 u32 snd_rates;
0033
0034 #define DW_I2S_QUIRK_COMP_REG_OFFSET (1 << 0)
0035 #define DW_I2S_QUIRK_COMP_PARAM1 (1 << 1)
0036 #define DW_I2S_QUIRK_16BIT_IDX_OVERRIDE (1 << 2)
0037 unsigned int quirks;
0038 unsigned int i2s_reg_comp1;
0039 unsigned int i2s_reg_comp2;
0040
0041 void *play_dma_data;
0042 void *capture_dma_data;
0043 bool (*filter)(struct dma_chan *chan, void *slave);
0044 int (*i2s_clk_cfg)(struct i2s_clk_config_data *config);
0045 };
0046
0047 struct i2s_dma_data {
0048 void *data;
0049 dma_addr_t addr;
0050 u32 max_burst;
0051 enum dma_slave_buswidth addr_width;
0052 bool (*filter)(struct dma_chan *chan, void *slave);
0053 };
0054
0055
0056 #define I2S_RXDMA 0x01C0
0057 #define I2S_TXDMA 0x01C8
0058
0059 #define TWO_CHANNEL_SUPPORT 2
0060 #define FOUR_CHANNEL_SUPPORT 4
0061 #define SIX_CHANNEL_SUPPORT 6
0062 #define EIGHT_CHANNEL_SUPPORT 8
0063
0064 #endif