include/sound/cs4271.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Definitions for CS4271 ASoC codec driver
0004  *
0005  * Copyright (c) 2010 Alexander Sverdlin <subaparts@yandex.ru>
0006  */
0007
0008 #ifndef __CS4271_H
0009 #define __CS4271_H
0010
0011 struct cs4271_platform_data {
0012     int gpio_nreset;    /* GPIO driving Reset pin, if any */
0013     bool amutec_eq_bmutec;  /* flag to enable AMUTEC=BMUTEC */
0014
0015     /*
0016      * The CS4271 requires its LRCLK and MCLK to be stable before its RESET
0017      * line is de-asserted. That also means that clocks cannot be changed
0018      * without putting the chip back into hardware reset, which also requires
0019      * a complete re-initialization of all registers.
0020      *
0021      * One (undocumented) workaround is to assert and de-assert the PDN bit
0022      * in the MODE2 register. This workaround can be enabled with the
0023      * following flag.
0024      *
0025      * Note that this is not needed in case the clocks are stable
0026      * throughout the entire runtime of the codec.
0027      */
0028     bool enable_soft_reset;
0029 };
0030
0031 #endif /* __CS4271_H */