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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef _ACI_H_
0003 #define _ACI_H_
0004 
0005 #define ACI_REG_COMMAND     0   /* write register offset */
0006 #define ACI_REG_STATUS      1   /* read register offset */
0007 #define ACI_REG_BUSY        2   /* busy register offset */
0008 #define ACI_REG_RDS     2   /* PCM20: RDS register offset */
0009 #define ACI_MINTIME     500 /* ACI time out limit */
0010 
0011 #define ACI_SET_MUTE        0x0d
0012 #define ACI_SET_POWERAMP    0x0f
0013 #define ACI_SET_TUNERMUTE   0xa3
0014 #define ACI_SET_TUNERMONO   0xa4
0015 #define ACI_SET_IDE     0xd0
0016 #define ACI_SET_WSS     0xd1
0017 #define ACI_SET_SOLOMODE    0xd2
0018 #define ACI_SET_PREAMP      0x03
0019 #define ACI_GET_PREAMP      0x21
0020 #define ACI_WRITE_TUNE      0xa7
0021 #define ACI_READ_TUNERSTEREO    0xa8
0022 #define ACI_READ_TUNERSTATION   0xa9
0023 #define ACI_READ_VERSION    0xf1
0024 #define ACI_READ_IDCODE     0xf2
0025 #define ACI_INIT        0xff
0026 #define ACI_STATUS      0xf0
0027 #define ACI_S_GENERAL       0x00
0028 #define ACI_ERROR_OP        0xdf
0029 
0030 /* ACI Mixer */
0031 
0032 /* These are the values for the right channel GET registers.
0033    Add an offset of 0x01 for the left channel register.
0034    (left=right+0x01) */
0035 
0036 #define ACI_GET_MASTER      0x03
0037 #define ACI_GET_MIC     0x05
0038 #define ACI_GET_LINE        0x07
0039 #define ACI_GET_CD      0x09
0040 #define ACI_GET_SYNTH       0x0b
0041 #define ACI_GET_PCM     0x0d
0042 #define ACI_GET_LINE1       0x10    /* Radio on PCM20 */
0043 #define ACI_GET_LINE2       0x12
0044 
0045 #define ACI_GET_EQ1     0x22    /* from Bass ... */
0046 #define ACI_GET_EQ2     0x24
0047 #define ACI_GET_EQ3     0x26
0048 #define ACI_GET_EQ4     0x28
0049 #define ACI_GET_EQ5     0x2a
0050 #define ACI_GET_EQ6     0x2c
0051 #define ACI_GET_EQ7     0x2e    /* ... to Treble */
0052 
0053 /* And these are the values for the right channel SET registers.
0054    For left channel access you have to add an offset of 0x08.
0055    MASTER is an exception, which needs an offset of 0x01 */
0056 
0057 #define ACI_SET_MASTER      0x00
0058 #define ACI_SET_MIC     0x30
0059 #define ACI_SET_LINE        0x31
0060 #define ACI_SET_CD      0x34
0061 #define ACI_SET_SYNTH       0x33
0062 #define ACI_SET_PCM     0x32
0063 #define ACI_SET_LINE1       0x35    /* Radio on PCM20 */
0064 #define ACI_SET_LINE2       0x36
0065 
0066 #define ACI_SET_EQ1     0x40    /* from Bass ... */
0067 #define ACI_SET_EQ2     0x41
0068 #define ACI_SET_EQ3     0x42
0069 #define ACI_SET_EQ4     0x43
0070 #define ACI_SET_EQ5     0x44
0071 #define ACI_SET_EQ6     0x45
0072 #define ACI_SET_EQ7     0x46    /* ... to Treble */
0073 
0074 struct snd_miro_aci {
0075     unsigned long aci_port;
0076     int aci_vendor;
0077     int aci_product;
0078     int aci_version;
0079     int aci_amp;
0080     int aci_preamp;
0081     int aci_solomode;
0082 
0083     struct mutex aci_mutex;
0084 };
0085 
0086 int snd_aci_cmd(struct snd_miro_aci *aci, int write1, int write2, int write3);
0087 
0088 struct snd_miro_aci *snd_aci_get_aci(void);
0089 
0090 #endif  /* _ACI_H_ */
0091