soc/tegra/pm.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (C) 2014 NVIDIA Corporation
0004  */
0005
0006 #ifndef __SOC_TEGRA_PM_H__
0007 #define __SOC_TEGRA_PM_H__
0008
0009 #include <linux/errno.h>
0010
0011 enum tegra_suspend_mode {
0012     TEGRA_SUSPEND_NONE = 0,
0013     TEGRA_SUSPEND_LP2, /* CPU voltage off */
0014     TEGRA_SUSPEND_LP1, /* CPU voltage off, DRAM self-refresh */
0015     TEGRA_SUSPEND_LP0, /* CPU + core voltage off, DRAM self-refresh */
0016     TEGRA_MAX_SUSPEND_MODE,
0017     TEGRA_SUSPEND_NOT_READY,
0018 };
0019
0020 #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_ARM) && defined(CONFIG_ARCH_TEGRA)
0021 enum tegra_suspend_mode
0022 tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode);
0023
0024 /* low-level resume entry point */
0025 void tegra_resume(void);
0026
0027 int tegra30_pm_secondary_cpu_suspend(unsigned long arg);
0028 void tegra_pm_clear_cpu_in_lp2(void);
0029 void tegra_pm_set_cpu_in_lp2(void);
0030 int tegra_pm_enter_lp2(void);
0031 int tegra_pm_park_secondary_cpu(unsigned long cpu);
0032 void tegra_pm_init_suspend(void);
0033 #else
0034 static inline enum tegra_suspend_mode
0035 tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode)
0036 {
0037     return TEGRA_SUSPEND_NONE;
0038 }
0039
0040 static inline void tegra_resume(void)
0041 {
0042 }
0043
0044 static inline int tegra30_pm_secondary_cpu_suspend(unsigned long arg)
0045 {
0046     return -ENOTSUPP;
0047 }
0048
0049 static inline void tegra_pm_clear_cpu_in_lp2(void)
0050 {
0051 }
0052
0053 static inline void tegra_pm_set_cpu_in_lp2(void)
0054 {
0055 }
0056
0057 static inline int tegra_pm_enter_lp2(void)
0058 {
0059     return -ENOTSUPP;
0060 }
0061
0062 static inline int tegra_pm_park_secondary_cpu(unsigned long cpu)
0063 {
0064     return -ENOTSUPP;
0065 }
0066
0067 static inline void tegra_pm_init_suspend(void)
0068 {
0069 }
0070 #endif /* CONFIG_PM_SLEEP */
0071
0072 #endif /* __SOC_TEGRA_PM_H__ */