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0001 /* SPDX-License-Identifier: GPL-2.0 */ 0002 /* 0003 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved. 0004 */ 0005 0006 #ifndef __SOC_QCOM_TCS_H__ 0007 #define __SOC_QCOM_TCS_H__ 0008 0009 #define MAX_RPMH_PAYLOAD 16 0010 0011 /** 0012 * rpmh_state: state for the request 0013 * 0014 * RPMH_SLEEP_STATE: State of the resource when the processor subsystem 0015 * is powered down. There is no client using the 0016 * resource actively. 0017 * RPMH_WAKE_ONLY_STATE: Resume resource state to the value previously 0018 * requested before the processor was powered down. 0019 * RPMH_ACTIVE_ONLY_STATE: Active or AMC mode requests. Resource state 0020 * is aggregated immediately. 0021 */ 0022 enum rpmh_state { 0023 RPMH_SLEEP_STATE, 0024 RPMH_WAKE_ONLY_STATE, 0025 RPMH_ACTIVE_ONLY_STATE, 0026 }; 0027 0028 /** 0029 * struct tcs_cmd: an individual request to RPMH. 0030 * 0031 * @addr: the address of the resource slv_id:18:16 | offset:0:15 0032 * @data: the resource state request 0033 * @wait: ensure that this command is complete before returning. 0034 * Setting "wait" here only makes sense during rpmh_write_batch() for 0035 * active-only transfers, this is because: 0036 * rpmh_write() - Always waits. 0037 * (DEFINE_RPMH_MSG_ONSTACK will set .wait_for_compl) 0038 * rpmh_write_async() - Never waits. 0039 * (There's no request completion callback) 0040 */ 0041 struct tcs_cmd { 0042 u32 addr; 0043 u32 data; 0044 u32 wait; 0045 }; 0046 0047 /** 0048 * struct tcs_request: A set of tcs_cmds sent together in a TCS 0049 * 0050 * @state: state for the request. 0051 * @wait_for_compl: wait until we get a response from the h/w accelerator 0052 * (same as setting cmd->wait for all commands in the request) 0053 * @num_cmds: the number of @cmds in this request 0054 * @cmds: an array of tcs_cmds 0055 */ 0056 struct tcs_request { 0057 enum rpmh_state state; 0058 u32 wait_for_compl; 0059 u32 num_cmds; 0060 struct tcs_cmd *cmds; 0061 }; 0062 0063 #define BCM_TCS_CMD_COMMIT_SHFT 30 0064 #define BCM_TCS_CMD_COMMIT_MASK 0x40000000 0065 #define BCM_TCS_CMD_VALID_SHFT 29 0066 #define BCM_TCS_CMD_VALID_MASK 0x20000000 0067 #define BCM_TCS_CMD_VOTE_X_SHFT 14 0068 #define BCM_TCS_CMD_VOTE_MASK 0x3fff 0069 #define BCM_TCS_CMD_VOTE_Y_SHFT 0 0070 #define BCM_TCS_CMD_VOTE_Y_MASK 0xfffc000 0071 0072 /* Construct a Bus Clock Manager (BCM) specific TCS command */ 0073 #define BCM_TCS_CMD(commit, valid, vote_x, vote_y) \ 0074 (((commit) << BCM_TCS_CMD_COMMIT_SHFT) | \ 0075 ((valid) << BCM_TCS_CMD_VALID_SHFT) | \ 0076 ((cpu_to_le32(vote_x) & \ 0077 BCM_TCS_CMD_VOTE_MASK) << BCM_TCS_CMD_VOTE_X_SHFT) | \ 0078 ((cpu_to_le32(vote_y) & \ 0079 BCM_TCS_CMD_VOTE_MASK) << BCM_TCS_CMD_VOTE_Y_SHFT)) 0080 0081 #endif /* __SOC_QCOM_TCS_H__ */
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