soc/mscc/ocelot_vcap.h

0001 /* SPDX-License-Identifier: (GPL-2.0 OR MIT)
0002  * Microsemi Ocelot Switch driver
0003  * Copyright (c) 2019 Microsemi Corporation
0004  */
0005
0006 #ifndef _OCELOT_VCAP_H_
0007 #define _OCELOT_VCAP_H_
0008
0009 #include <soc/mscc/ocelot.h>
0010
0011 /* Cookie definitions for private VCAP filters installed by the driver.
0012  * Must be unique per VCAP block.
0013  */
0014 #define OCELOT_VCAP_ES0_TAG_8021Q_RXVLAN(ocelot, port, upstream) ((upstream) << 16 | (port))
0015 #define OCELOT_VCAP_IS1_TAG_8021Q_TXVLAN(ocelot, port)      (port)
0016 #define OCELOT_VCAP_IS2_TAG_8021Q_TXVLAN(ocelot, port)      (port)
0017 #define OCELOT_VCAP_IS2_MRP_REDIRECT(ocelot, port)      ((ocelot)->num_phys_ports + (port))
0018 #define OCELOT_VCAP_IS2_MRP_TRAP(ocelot)            ((ocelot)->num_phys_ports * 2)
0019 #define OCELOT_VCAP_IS2_L2_PTP_TRAP(ocelot)         ((ocelot)->num_phys_ports * 2 + 1)
0020 #define OCELOT_VCAP_IS2_IPV4_GEN_PTP_TRAP(ocelot)       ((ocelot)->num_phys_ports * 2 + 2)
0021 #define OCELOT_VCAP_IS2_IPV4_EV_PTP_TRAP(ocelot)        ((ocelot)->num_phys_ports * 2 + 3)
0022 #define OCELOT_VCAP_IS2_IPV6_GEN_PTP_TRAP(ocelot)       ((ocelot)->num_phys_ports * 2 + 4)
0023 #define OCELOT_VCAP_IS2_IPV6_EV_PTP_TRAP(ocelot)        ((ocelot)->num_phys_ports * 2 + 5)
0024
0025 /* =================================================================
0026  *  VCAP Common
0027  * =================================================================
0028  */
0029
0030 enum {
0031     VCAP_ES0,
0032     VCAP_IS1,
0033     VCAP_IS2,
0034     __VCAP_COUNT,
0035 };
0036
0037 #define OCELOT_NUM_VCAP_BLOCKS      __VCAP_COUNT
0038
0039 struct vcap_props {
0040     u16 tg_width; /* Type-group width (in bits) */
0041     u16 sw_count; /* Sub word count */
0042     u16 entry_count; /* Entry count */
0043     u16 entry_words; /* Number of entry words */
0044     u16 entry_width; /* Entry width (in bits) */
0045     u16 action_count; /* Action count */
0046     u16 action_words; /* Number of action words */
0047     u16 action_width; /* Action width (in bits) */
0048     u16 action_type_width; /* Action type width (in bits) */
0049     struct {
0050         u16 width; /* Action type width (in bits) */
0051         u16 count; /* Action type sub word count */
0052     } action_table[2];
0053     u16 counter_words; /* Number of counter words */
0054     u16 counter_width; /* Counter width (in bits) */
0055
0056     enum ocelot_target      target;
0057
0058     const struct vcap_field     *keys;
0059     const struct vcap_field     *actions;
0060 };
0061
0062 /* VCAP Type-Group values */
0063 #define VCAP_TG_NONE 0 /* Entry is invalid */
0064 #define VCAP_TG_FULL 1 /* Full entry */
0065 #define VCAP_TG_HALF 2 /* Half entry */
0066 #define VCAP_TG_QUARTER 3 /* Quarter entry */
0067
0068 #define VCAP_CORE_UPDATE_CTRL_UPDATE_CMD(x)      (((x) << 22) & GENMASK(24, 22))
0069 #define VCAP_CORE_UPDATE_CTRL_UPDATE_CMD_M       GENMASK(24, 22)
0070 #define VCAP_CORE_UPDATE_CTRL_UPDATE_CMD_X(x)    (((x) & GENMASK(24, 22)) >> 22)
0071 #define VCAP_CORE_UPDATE_CTRL_UPDATE_ENTRY_DIS   BIT(21)
0072 #define VCAP_CORE_UPDATE_CTRL_UPDATE_ACTION_DIS  BIT(20)
0073 #define VCAP_CORE_UPDATE_CTRL_UPDATE_CNT_DIS     BIT(19)
0074 #define VCAP_CORE_UPDATE_CTRL_UPDATE_ADDR(x)     (((x) << 3) & GENMASK(18, 3))
0075 #define VCAP_CORE_UPDATE_CTRL_UPDATE_ADDR_M      GENMASK(18, 3)
0076 #define VCAP_CORE_UPDATE_CTRL_UPDATE_ADDR_X(x)   (((x) & GENMASK(18, 3)) >> 3)
0077 #define VCAP_CORE_UPDATE_CTRL_UPDATE_SHOT        BIT(2)
0078 #define VCAP_CORE_UPDATE_CTRL_CLEAR_CACHE        BIT(1)
0079 #define VCAP_CORE_UPDATE_CTRL_MV_TRAFFIC_IGN     BIT(0)
0080
0081 #define VCAP_CORE_MV_CFG_MV_NUM_POS(x)           (((x) << 16) & GENMASK(31, 16))
0082 #define VCAP_CORE_MV_CFG_MV_NUM_POS_M            GENMASK(31, 16)
0083 #define VCAP_CORE_MV_CFG_MV_NUM_POS_X(x)         (((x) & GENMASK(31, 16)) >> 16)
0084 #define VCAP_CORE_MV_CFG_MV_SIZE(x)              ((x) & GENMASK(15, 0))
0085 #define VCAP_CORE_MV_CFG_MV_SIZE_M               GENMASK(15, 0)
0086
0087 #define VCAP_CACHE_ENTRY_DAT_RSZ                 0x4
0088
0089 #define VCAP_CACHE_MASK_DAT_RSZ                  0x4
0090
0091 #define VCAP_CACHE_ACTION_DAT_RSZ                0x4
0092
0093 #define VCAP_CACHE_CNT_DAT_RSZ                   0x4
0094
0095 #define VCAP_STICKY_VCAP_ROW_DELETED_STICKY      BIT(0)
0096
0097 #define TCAM_BIST_CTRL_TCAM_BIST                 BIT(1)
0098 #define TCAM_BIST_CTRL_TCAM_INIT                 BIT(0)
0099
0100 #define TCAM_BIST_CFG_TCAM_BIST_SOE_ENA          BIT(8)
0101 #define TCAM_BIST_CFG_TCAM_HCG_DIS               BIT(7)
0102 #define TCAM_BIST_CFG_TCAM_CG_DIS                BIT(6)
0103 #define TCAM_BIST_CFG_TCAM_BIAS(x)               ((x) & GENMASK(5, 0))
0104 #define TCAM_BIST_CFG_TCAM_BIAS_M                GENMASK(5, 0)
0105
0106 #define TCAM_BIST_STAT_BIST_RT_ERR               BIT(15)
0107 #define TCAM_BIST_STAT_BIST_PENC_ERR             BIT(14)
0108 #define TCAM_BIST_STAT_BIST_COMP_ERR             BIT(13)
0109 #define TCAM_BIST_STAT_BIST_ADDR_ERR             BIT(12)
0110 #define TCAM_BIST_STAT_BIST_BL1E_ERR             BIT(11)
0111 #define TCAM_BIST_STAT_BIST_BL1_ERR              BIT(10)
0112 #define TCAM_BIST_STAT_BIST_BL0E_ERR             BIT(9)
0113 #define TCAM_BIST_STAT_BIST_BL0_ERR              BIT(8)
0114 #define TCAM_BIST_STAT_BIST_PH1_ERR              BIT(7)
0115 #define TCAM_BIST_STAT_BIST_PH0_ERR              BIT(6)
0116 #define TCAM_BIST_STAT_BIST_PV1_ERR              BIT(5)
0117 #define TCAM_BIST_STAT_BIST_PV0_ERR              BIT(4)
0118 #define TCAM_BIST_STAT_BIST_RUN                  BIT(3)
0119 #define TCAM_BIST_STAT_BIST_ERR                  BIT(2)
0120 #define TCAM_BIST_STAT_BIST_BUSY                 BIT(1)
0121 #define TCAM_BIST_STAT_TCAM_RDY                  BIT(0)
0122
0123 /* =================================================================
0124  *  VCAP IS2
0125  * =================================================================
0126  */
0127
0128 /* IS2 half key types */
0129 #define IS2_TYPE_ETYPE 0
0130 #define IS2_TYPE_LLC 1
0131 #define IS2_TYPE_SNAP 2
0132 #define IS2_TYPE_ARP 3
0133 #define IS2_TYPE_IP_UDP_TCP 4
0134 #define IS2_TYPE_IP_OTHER 5
0135 #define IS2_TYPE_IPV6 6
0136 #define IS2_TYPE_OAM 7
0137 #define IS2_TYPE_SMAC_SIP6 8
0138 #define IS2_TYPE_ANY 100 /* Pseudo type */
0139
0140 /* IS2 half key type mask for matching any IP */
0141 #define IS2_TYPE_MASK_IP_ANY 0xe
0142
0143 enum {
0144     IS2_ACTION_TYPE_NORMAL,
0145     IS2_ACTION_TYPE_SMAC_SIP,
0146     IS2_ACTION_TYPE_MAX,
0147 };
0148
0149 /* IS2 MASK_MODE values */
0150 #define IS2_ACT_MASK_MODE_NONE 0
0151 #define IS2_ACT_MASK_MODE_FILTER 1
0152 #define IS2_ACT_MASK_MODE_POLICY 2
0153 #define IS2_ACT_MASK_MODE_REDIR 3
0154
0155 /* IS2 REW_OP values */
0156 #define IS2_ACT_REW_OP_NONE 0
0157 #define IS2_ACT_REW_OP_PTP_ONE 2
0158 #define IS2_ACT_REW_OP_PTP_TWO 3
0159 #define IS2_ACT_REW_OP_SPECIAL 8
0160 #define IS2_ACT_REW_OP_PTP_ORG 9
0161 #define IS2_ACT_REW_OP_PTP_ONE_SUB_DELAY_1 (IS2_ACT_REW_OP_PTP_ONE | (1 << 3))
0162 #define IS2_ACT_REW_OP_PTP_ONE_SUB_DELAY_2 (IS2_ACT_REW_OP_PTP_ONE | (2 << 3))
0163 #define IS2_ACT_REW_OP_PTP_ONE_ADD_DELAY (IS2_ACT_REW_OP_PTP_ONE | (1 << 5))
0164 #define IS2_ACT_REW_OP_PTP_ONE_ADD_SUB BIT(7)
0165
0166 #define VCAP_PORT_WIDTH 4
0167
0168 /* IS2 quarter key - SMAC_SIP4 */
0169 #define IS2_QKO_IGR_PORT 0
0170 #define IS2_QKL_IGR_PORT VCAP_PORT_WIDTH
0171 #define IS2_QKO_L2_SMAC (IS2_QKO_IGR_PORT + IS2_QKL_IGR_PORT)
0172 #define IS2_QKL_L2_SMAC 48
0173 #define IS2_QKO_L3_IP4_SIP (IS2_QKO_L2_SMAC + IS2_QKL_L2_SMAC)
0174 #define IS2_QKL_L3_IP4_SIP 32
0175
0176 enum vcap_is2_half_key_field {
0177     /* Common */
0178     VCAP_IS2_TYPE,
0179     VCAP_IS2_HK_FIRST,
0180     VCAP_IS2_HK_PAG,
0181     VCAP_IS2_HK_RSV1,
0182     VCAP_IS2_HK_IGR_PORT_MASK,
0183     VCAP_IS2_HK_RSV2,
0184     VCAP_IS2_HK_HOST_MATCH,
0185     VCAP_IS2_HK_L2_MC,
0186     VCAP_IS2_HK_L2_BC,
0187     VCAP_IS2_HK_VLAN_TAGGED,
0188     VCAP_IS2_HK_VID,
0189     VCAP_IS2_HK_DEI,
0190     VCAP_IS2_HK_PCP,
0191     /* MAC_ETYPE / MAC_LLC / MAC_SNAP / OAM common */
0192     VCAP_IS2_HK_L2_DMAC,
0193     VCAP_IS2_HK_L2_SMAC,
0194     /* MAC_ETYPE (TYPE=000) */
0195     VCAP_IS2_HK_MAC_ETYPE_ETYPE,
0196     VCAP_IS2_HK_MAC_ETYPE_L2_PAYLOAD0,
0197     VCAP_IS2_HK_MAC_ETYPE_L2_PAYLOAD1,
0198     VCAP_IS2_HK_MAC_ETYPE_L2_PAYLOAD2,
0199     /* MAC_LLC (TYPE=001) */
0200     VCAP_IS2_HK_MAC_LLC_DMAC,
0201     VCAP_IS2_HK_MAC_LLC_SMAC,
0202     VCAP_IS2_HK_MAC_LLC_L2_LLC,
0203     /* MAC_SNAP (TYPE=010) */
0204     VCAP_IS2_HK_MAC_SNAP_SMAC,
0205     VCAP_IS2_HK_MAC_SNAP_DMAC,
0206     VCAP_IS2_HK_MAC_SNAP_L2_SNAP,
0207     /* MAC_ARP (TYPE=011) */
0208     VCAP_IS2_HK_MAC_ARP_SMAC,
0209     VCAP_IS2_HK_MAC_ARP_ADDR_SPACE_OK,
0210     VCAP_IS2_HK_MAC_ARP_PROTO_SPACE_OK,
0211     VCAP_IS2_HK_MAC_ARP_LEN_OK,
0212     VCAP_IS2_HK_MAC_ARP_TARGET_MATCH,
0213     VCAP_IS2_HK_MAC_ARP_SENDER_MATCH,
0214     VCAP_IS2_HK_MAC_ARP_OPCODE_UNKNOWN,
0215     VCAP_IS2_HK_MAC_ARP_OPCODE,
0216     VCAP_IS2_HK_MAC_ARP_L3_IP4_DIP,
0217     VCAP_IS2_HK_MAC_ARP_L3_IP4_SIP,
0218     VCAP_IS2_HK_MAC_ARP_DIP_EQ_SIP,
0219     /* IP4_TCP_UDP / IP4_OTHER common */
0220     VCAP_IS2_HK_IP4,
0221     VCAP_IS2_HK_L3_FRAGMENT,
0222     VCAP_IS2_HK_L3_FRAG_OFS_GT0,
0223     VCAP_IS2_HK_L3_OPTIONS,
0224     VCAP_IS2_HK_IP4_L3_TTL_GT0,
0225     VCAP_IS2_HK_L3_TOS,
0226     VCAP_IS2_HK_L3_IP4_DIP,
0227     VCAP_IS2_HK_L3_IP4_SIP,
0228     VCAP_IS2_HK_DIP_EQ_SIP,
0229     /* IP4_TCP_UDP (TYPE=100) */
0230     VCAP_IS2_HK_TCP,
0231     VCAP_IS2_HK_L4_SPORT,
0232     VCAP_IS2_HK_L4_DPORT,
0233     VCAP_IS2_HK_L4_RNG,
0234     VCAP_IS2_HK_L4_SPORT_EQ_DPORT,
0235     VCAP_IS2_HK_L4_SEQUENCE_EQ0,
0236     VCAP_IS2_HK_L4_URG,
0237     VCAP_IS2_HK_L4_ACK,
0238     VCAP_IS2_HK_L4_PSH,
0239     VCAP_IS2_HK_L4_RST,
0240     VCAP_IS2_HK_L4_SYN,
0241     VCAP_IS2_HK_L4_FIN,
0242     VCAP_IS2_HK_L4_1588_DOM,
0243     VCAP_IS2_HK_L4_1588_VER,
0244     /* IP4_OTHER (TYPE=101) */
0245     VCAP_IS2_HK_IP4_L3_PROTO,
0246     VCAP_IS2_HK_L3_PAYLOAD,
0247     /* IP6_STD (TYPE=110) */
0248     VCAP_IS2_HK_IP6_L3_TTL_GT0,
0249     VCAP_IS2_HK_IP6_L3_PROTO,
0250     VCAP_IS2_HK_L3_IP6_SIP,
0251     /* OAM (TYPE=111) */
0252     VCAP_IS2_HK_OAM_MEL_FLAGS,
0253     VCAP_IS2_HK_OAM_VER,
0254     VCAP_IS2_HK_OAM_OPCODE,
0255     VCAP_IS2_HK_OAM_FLAGS,
0256     VCAP_IS2_HK_OAM_MEPID,
0257     VCAP_IS2_HK_OAM_CCM_CNTS_EQ0,
0258     VCAP_IS2_HK_OAM_IS_Y1731,
0259 };
0260
0261 struct vcap_field {
0262     int offset;
0263     int length;
0264 };
0265
0266 enum vcap_is2_action_field {
0267     VCAP_IS2_ACT_HIT_ME_ONCE,
0268     VCAP_IS2_ACT_CPU_COPY_ENA,
0269     VCAP_IS2_ACT_CPU_QU_NUM,
0270     VCAP_IS2_ACT_MASK_MODE,
0271     VCAP_IS2_ACT_MIRROR_ENA,
0272     VCAP_IS2_ACT_LRN_DIS,
0273     VCAP_IS2_ACT_POLICE_ENA,
0274     VCAP_IS2_ACT_POLICE_IDX,
0275     VCAP_IS2_ACT_POLICE_VCAP_ONLY,
0276     VCAP_IS2_ACT_PORT_MASK,
0277     VCAP_IS2_ACT_REW_OP,
0278     VCAP_IS2_ACT_SMAC_REPLACE_ENA,
0279     VCAP_IS2_ACT_RSV,
0280     VCAP_IS2_ACT_ACL_ID,
0281     VCAP_IS2_ACT_HIT_CNT,
0282 };
0283
0284 /* =================================================================
0285  *  VCAP IS1
0286  * =================================================================
0287  */
0288
0289 /* IS1 half key types */
0290 #define IS1_TYPE_S1_NORMAL 0
0291 #define IS1_TYPE_S1_5TUPLE_IP4 1
0292
0293 /* IS1 full key types */
0294 #define IS1_TYPE_S1_NORMAL_IP6 0
0295 #define IS1_TYPE_S1_7TUPLE 1
0296 #define IS2_TYPE_S1_5TUPLE_IP6 2
0297
0298 enum {
0299     IS1_ACTION_TYPE_NORMAL,
0300     IS1_ACTION_TYPE_MAX,
0301 };
0302
0303 enum vcap_is1_half_key_field {
0304     VCAP_IS1_HK_TYPE,
0305     VCAP_IS1_HK_LOOKUP,
0306     VCAP_IS1_HK_IGR_PORT_MASK,
0307     VCAP_IS1_HK_RSV,
0308     VCAP_IS1_HK_OAM_Y1731,
0309     VCAP_IS1_HK_L2_MC,
0310     VCAP_IS1_HK_L2_BC,
0311     VCAP_IS1_HK_IP_MC,
0312     VCAP_IS1_HK_VLAN_TAGGED,
0313     VCAP_IS1_HK_VLAN_DBL_TAGGED,
0314     VCAP_IS1_HK_TPID,
0315     VCAP_IS1_HK_VID,
0316     VCAP_IS1_HK_DEI,
0317     VCAP_IS1_HK_PCP,
0318     /* Specific Fields for IS1 Half Key S1_NORMAL */
0319     VCAP_IS1_HK_L2_SMAC,
0320     VCAP_IS1_HK_ETYPE_LEN,
0321     VCAP_IS1_HK_ETYPE,
0322     VCAP_IS1_HK_IP_SNAP,
0323     VCAP_IS1_HK_IP4,
0324     VCAP_IS1_HK_L3_FRAGMENT,
0325     VCAP_IS1_HK_L3_FRAG_OFS_GT0,
0326     VCAP_IS1_HK_L3_OPTIONS,
0327     VCAP_IS1_HK_L3_DSCP,
0328     VCAP_IS1_HK_L3_IP4_SIP,
0329     VCAP_IS1_HK_TCP_UDP,
0330     VCAP_IS1_HK_TCP,
0331     VCAP_IS1_HK_L4_SPORT,
0332     VCAP_IS1_HK_L4_RNG,
0333     /* Specific Fields for IS1 Half Key S1_5TUPLE_IP4 */
0334     VCAP_IS1_HK_IP4_INNER_TPID,
0335     VCAP_IS1_HK_IP4_INNER_VID,
0336     VCAP_IS1_HK_IP4_INNER_DEI,
0337     VCAP_IS1_HK_IP4_INNER_PCP,
0338     VCAP_IS1_HK_IP4_IP4,
0339     VCAP_IS1_HK_IP4_L3_FRAGMENT,
0340     VCAP_IS1_HK_IP4_L3_FRAG_OFS_GT0,
0341     VCAP_IS1_HK_IP4_L3_OPTIONS,
0342     VCAP_IS1_HK_IP4_L3_DSCP,
0343     VCAP_IS1_HK_IP4_L3_IP4_DIP,
0344     VCAP_IS1_HK_IP4_L3_IP4_SIP,
0345     VCAP_IS1_HK_IP4_L3_PROTO,
0346     VCAP_IS1_HK_IP4_TCP_UDP,
0347     VCAP_IS1_HK_IP4_TCP,
0348     VCAP_IS1_HK_IP4_L4_RNG,
0349     VCAP_IS1_HK_IP4_IP_PAYLOAD_S1_5TUPLE,
0350 };
0351
0352 enum vcap_is1_action_field {
0353     VCAP_IS1_ACT_DSCP_ENA,
0354     VCAP_IS1_ACT_DSCP_VAL,
0355     VCAP_IS1_ACT_QOS_ENA,
0356     VCAP_IS1_ACT_QOS_VAL,
0357     VCAP_IS1_ACT_DP_ENA,
0358     VCAP_IS1_ACT_DP_VAL,
0359     VCAP_IS1_ACT_PAG_OVERRIDE_MASK,
0360     VCAP_IS1_ACT_PAG_VAL,
0361     VCAP_IS1_ACT_RSV,
0362     VCAP_IS1_ACT_VID_REPLACE_ENA,
0363     VCAP_IS1_ACT_VID_ADD_VAL,
0364     VCAP_IS1_ACT_FID_SEL,
0365     VCAP_IS1_ACT_FID_VAL,
0366     VCAP_IS1_ACT_PCP_DEI_ENA,
0367     VCAP_IS1_ACT_PCP_VAL,
0368     VCAP_IS1_ACT_DEI_VAL,
0369     VCAP_IS1_ACT_VLAN_POP_CNT_ENA,
0370     VCAP_IS1_ACT_VLAN_POP_CNT,
0371     VCAP_IS1_ACT_CUSTOM_ACE_TYPE_ENA,
0372     VCAP_IS1_ACT_HIT_STICKY,
0373 };
0374
0375 /* =================================================================
0376  *  VCAP ES0
0377  * =================================================================
0378  */
0379
0380 enum {
0381     ES0_ACTION_TYPE_NORMAL,
0382     ES0_ACTION_TYPE_MAX,
0383 };
0384
0385 enum vcap_es0_key_field {
0386     VCAP_ES0_EGR_PORT,
0387     VCAP_ES0_IGR_PORT,
0388     VCAP_ES0_RSV,
0389     VCAP_ES0_L2_MC,
0390     VCAP_ES0_L2_BC,
0391     VCAP_ES0_VID,
0392     VCAP_ES0_DP,
0393     VCAP_ES0_PCP,
0394 };
0395
0396 enum vcap_es0_action_field {
0397     VCAP_ES0_ACT_PUSH_OUTER_TAG,
0398     VCAP_ES0_ACT_PUSH_INNER_TAG,
0399     VCAP_ES0_ACT_TAG_A_TPID_SEL,
0400     VCAP_ES0_ACT_TAG_A_VID_SEL,
0401     VCAP_ES0_ACT_TAG_A_PCP_SEL,
0402     VCAP_ES0_ACT_TAG_A_DEI_SEL,
0403     VCAP_ES0_ACT_TAG_B_TPID_SEL,
0404     VCAP_ES0_ACT_TAG_B_VID_SEL,
0405     VCAP_ES0_ACT_TAG_B_PCP_SEL,
0406     VCAP_ES0_ACT_TAG_B_DEI_SEL,
0407     VCAP_ES0_ACT_VID_A_VAL,
0408     VCAP_ES0_ACT_PCP_A_VAL,
0409     VCAP_ES0_ACT_DEI_A_VAL,
0410     VCAP_ES0_ACT_VID_B_VAL,
0411     VCAP_ES0_ACT_PCP_B_VAL,
0412     VCAP_ES0_ACT_DEI_B_VAL,
0413     VCAP_ES0_ACT_RSV,
0414     VCAP_ES0_ACT_HIT_STICKY,
0415 };
0416
0417 struct ocelot_ipv4 {
0418     u8 addr[4];
0419 };
0420
0421 enum ocelot_vcap_bit {
0422     OCELOT_VCAP_BIT_ANY,
0423     OCELOT_VCAP_BIT_0,
0424     OCELOT_VCAP_BIT_1
0425 };
0426
0427 struct ocelot_vcap_u8 {
0428     u8 value[1];
0429     u8 mask[1];
0430 };
0431
0432 struct ocelot_vcap_u16 {
0433     u8 value[2];
0434     u8 mask[2];
0435 };
0436
0437 struct ocelot_vcap_u24 {
0438     u8 value[3];
0439     u8 mask[3];
0440 };
0441
0442 struct ocelot_vcap_u32 {
0443     u8 value[4];
0444     u8 mask[4];
0445 };
0446
0447 struct ocelot_vcap_u40 {
0448     u8 value[5];
0449     u8 mask[5];
0450 };
0451
0452 struct ocelot_vcap_u48 {
0453     u8 value[6];
0454     u8 mask[6];
0455 };
0456
0457 struct ocelot_vcap_u64 {
0458     u8 value[8];
0459     u8 mask[8];
0460 };
0461
0462 struct ocelot_vcap_u128 {
0463     u8 value[16];
0464     u8 mask[16];
0465 };
0466
0467 struct ocelot_vcap_vid {
0468     u16 value;
0469     u16 mask;
0470 };
0471
0472 struct ocelot_vcap_ipv4 {
0473     struct ocelot_ipv4 value;
0474     struct ocelot_ipv4 mask;
0475 };
0476
0477 struct ocelot_vcap_udp_tcp {
0478     u16 value;
0479     u16 mask;
0480 };
0481
0482 struct ocelot_vcap_port {
0483     u8 value;
0484     u8 mask;
0485 };
0486
0487 enum ocelot_vcap_key_type {
0488     OCELOT_VCAP_KEY_ANY,
0489     OCELOT_VCAP_KEY_ETYPE,
0490     OCELOT_VCAP_KEY_LLC,
0491     OCELOT_VCAP_KEY_SNAP,
0492     OCELOT_VCAP_KEY_ARP,
0493     OCELOT_VCAP_KEY_IPV4,
0494     OCELOT_VCAP_KEY_IPV6
0495 };
0496
0497 struct ocelot_vcap_key_vlan {
0498     struct ocelot_vcap_vid vid;    /* VLAN ID (12 bit) */
0499     struct ocelot_vcap_u8  pcp;    /* PCP (3 bit) */
0500     enum ocelot_vcap_bit dei;    /* DEI */
0501     enum ocelot_vcap_bit tagged; /* Tagged/untagged frame */
0502 };
0503
0504 struct ocelot_vcap_key_etype {
0505     struct ocelot_vcap_u48 dmac;
0506     struct ocelot_vcap_u48 smac;
0507     struct ocelot_vcap_u16 etype;
0508     struct ocelot_vcap_u16 data; /* MAC data */
0509 };
0510
0511 struct ocelot_vcap_key_llc {
0512     struct ocelot_vcap_u48 dmac;
0513     struct ocelot_vcap_u48 smac;
0514
0515     /* LLC header: DSAP at byte 0, SSAP at byte 1, Control at byte 2 */
0516     struct ocelot_vcap_u32 llc;
0517 };
0518
0519 struct ocelot_vcap_key_snap {
0520     struct ocelot_vcap_u48 dmac;
0521     struct ocelot_vcap_u48 smac;
0522
0523     /* SNAP header: Organization Code at byte 0, Type at byte 3 */
0524     struct ocelot_vcap_u40 snap;
0525 };
0526
0527 struct ocelot_vcap_key_arp {
0528     struct ocelot_vcap_u48 smac;
0529     enum ocelot_vcap_bit arp;   /* Opcode ARP/RARP */
0530     enum ocelot_vcap_bit req;   /* Opcode request/reply */
0531     enum ocelot_vcap_bit unknown;    /* Opcode unknown */
0532     enum ocelot_vcap_bit smac_match; /* Sender MAC matches SMAC */
0533     enum ocelot_vcap_bit dmac_match; /* Target MAC matches DMAC */
0534
0535     /**< Protocol addr. length 4, hardware length 6 */
0536     enum ocelot_vcap_bit length;
0537
0538     enum ocelot_vcap_bit ip;       /* Protocol address type IP */
0539     enum  ocelot_vcap_bit ethernet; /* Hardware address type Ethernet */
0540     struct ocelot_vcap_ipv4 sip;     /* Sender IP address */
0541     struct ocelot_vcap_ipv4 dip;     /* Target IP address */
0542 };
0543
0544 struct ocelot_vcap_key_ipv4 {
0545     enum ocelot_vcap_bit ttl;      /* TTL zero */
0546     enum ocelot_vcap_bit fragment; /* Fragment */
0547     enum ocelot_vcap_bit options;  /* Header options */
0548     struct ocelot_vcap_u8 ds;
0549     struct ocelot_vcap_u8 proto;      /* Protocol */
0550     struct ocelot_vcap_ipv4 sip;      /* Source IP address */
0551     struct ocelot_vcap_ipv4 dip;      /* Destination IP address */
0552     struct ocelot_vcap_u48 data;      /* Not UDP/TCP: IP data */
0553     struct ocelot_vcap_udp_tcp sport; /* UDP/TCP: Source port */
0554     struct ocelot_vcap_udp_tcp dport; /* UDP/TCP: Destination port */
0555     enum ocelot_vcap_bit tcp_fin;
0556     enum ocelot_vcap_bit tcp_syn;
0557     enum ocelot_vcap_bit tcp_rst;
0558     enum ocelot_vcap_bit tcp_psh;
0559     enum ocelot_vcap_bit tcp_ack;
0560     enum ocelot_vcap_bit tcp_urg;
0561     enum ocelot_vcap_bit sip_eq_dip;     /* SIP equals DIP  */
0562     enum ocelot_vcap_bit sport_eq_dport; /* SPORT equals DPORT  */
0563     enum ocelot_vcap_bit seq_zero;       /* TCP sequence number is zero */
0564 };
0565
0566 struct ocelot_vcap_key_ipv6 {
0567     struct ocelot_vcap_u8 proto; /* IPv6 protocol */
0568     struct ocelot_vcap_u128 sip; /* IPv6 source (byte 0-7 ignored) */
0569     struct ocelot_vcap_u128 dip; /* IPv6 destination (byte 0-7 ignored) */
0570     enum ocelot_vcap_bit ttl;  /* TTL zero */
0571     struct ocelot_vcap_u8 ds;
0572     struct ocelot_vcap_u48 data; /* Not UDP/TCP: IP data */
0573     struct ocelot_vcap_udp_tcp sport;
0574     struct ocelot_vcap_udp_tcp dport;
0575     enum ocelot_vcap_bit tcp_fin;
0576     enum ocelot_vcap_bit tcp_syn;
0577     enum ocelot_vcap_bit tcp_rst;
0578     enum ocelot_vcap_bit tcp_psh;
0579     enum ocelot_vcap_bit tcp_ack;
0580     enum ocelot_vcap_bit tcp_urg;
0581     enum ocelot_vcap_bit sip_eq_dip;     /* SIP equals DIP  */
0582     enum ocelot_vcap_bit sport_eq_dport; /* SPORT equals DPORT  */
0583     enum ocelot_vcap_bit seq_zero;       /* TCP sequence number is zero */
0584 };
0585
0586 enum ocelot_mask_mode {
0587     OCELOT_MASK_MODE_NONE,
0588     OCELOT_MASK_MODE_PERMIT_DENY,
0589     OCELOT_MASK_MODE_POLICY,
0590     OCELOT_MASK_MODE_REDIRECT,
0591 };
0592
0593 enum ocelot_es0_vid_sel {
0594     OCELOT_ES0_VID_PLUS_CLASSIFIED_VID = 0,
0595     OCELOT_ES0_VID = 1,
0596 };
0597
0598 enum ocelot_es0_pcp_sel {
0599     OCELOT_CLASSIFIED_PCP = 0,
0600     OCELOT_ES0_PCP = 1,
0601 };
0602
0603 enum ocelot_es0_tag {
0604     OCELOT_NO_ES0_TAG,
0605     OCELOT_ES0_TAG,
0606     OCELOT_FORCE_PORT_TAG,
0607     OCELOT_FORCE_UNTAG,
0608 };
0609
0610 enum ocelot_tag_tpid_sel {
0611     OCELOT_TAG_TPID_SEL_8021Q,
0612     OCELOT_TAG_TPID_SEL_8021AD,
0613 };
0614
0615 struct ocelot_vcap_action {
0616     union {
0617         /* VCAP ES0 */
0618         struct {
0619             enum ocelot_es0_tag push_outer_tag;
0620             enum ocelot_es0_tag push_inner_tag;
0621             enum ocelot_tag_tpid_sel tag_a_tpid_sel;
0622             int tag_a_vid_sel;
0623             int tag_a_pcp_sel;
0624             u16 vid_a_val;
0625             u8 pcp_a_val;
0626             u8 dei_a_val;
0627             enum ocelot_tag_tpid_sel tag_b_tpid_sel;
0628             int tag_b_vid_sel;
0629             int tag_b_pcp_sel;
0630             u16 vid_b_val;
0631             u8 pcp_b_val;
0632             u8 dei_b_val;
0633         };
0634
0635         /* VCAP IS1 */
0636         struct {
0637             bool vid_replace_ena;
0638             u16 vid;
0639             bool vlan_pop_cnt_ena;
0640             int vlan_pop_cnt;
0641             bool pcp_dei_ena;
0642             u8 pcp;
0643             u8 dei;
0644             bool qos_ena;
0645             u8 qos_val;
0646             u8 pag_override_mask;
0647             u8 pag_val;
0648         };
0649
0650         /* VCAP IS2 */
0651         struct {
0652             bool cpu_copy_ena;
0653             u8 cpu_qu_num;
0654             enum ocelot_mask_mode mask_mode;
0655             unsigned long port_mask;
0656             bool police_ena;
0657             bool mirror_ena;
0658             struct ocelot_policer pol;
0659             u32 pol_ix;
0660         };
0661     };
0662 };
0663
0664 struct ocelot_vcap_stats {
0665     u64 bytes;
0666     u64 pkts;
0667     u64 used;
0668 };
0669
0670 enum ocelot_vcap_filter_type {
0671     OCELOT_VCAP_FILTER_DUMMY,
0672     OCELOT_VCAP_FILTER_PAG,
0673     OCELOT_VCAP_FILTER_OFFLOAD,
0674     OCELOT_PSFP_FILTER_OFFLOAD,
0675 };
0676
0677 struct ocelot_vcap_id {
0678     unsigned long cookie;
0679     bool tc_offload;
0680 };
0681
0682 struct ocelot_vcap_filter {
0683     struct list_head list;
0684
0685     enum ocelot_vcap_filter_type type;
0686     int block_id;
0687     int goto_target;
0688     int lookup;
0689     u8 pag;
0690     u16 prio;
0691     struct ocelot_vcap_id id;
0692
0693     struct ocelot_vcap_action action;
0694     struct ocelot_vcap_stats stats;
0695     /* For VCAP IS1 and IS2 */
0696     bool take_ts;
0697     bool is_trap;
0698     unsigned long ingress_port_mask;
0699     /* For VCAP ES0 */
0700     struct ocelot_vcap_port ingress_port;
0701     /* For VCAP IS2 mirrors and ES0 */
0702     struct ocelot_vcap_port egress_port;
0703
0704     enum ocelot_vcap_bit dmac_mc;
0705     enum ocelot_vcap_bit dmac_bc;
0706     struct ocelot_vcap_key_vlan vlan;
0707
0708     enum ocelot_vcap_key_type key_type;
0709     union {
0710         /* OCELOT_VCAP_KEY_ANY: No specific fields */
0711         struct ocelot_vcap_key_etype etype;
0712         struct ocelot_vcap_key_llc llc;
0713         struct ocelot_vcap_key_snap snap;
0714         struct ocelot_vcap_key_arp arp;
0715         struct ocelot_vcap_key_ipv4 ipv4;
0716         struct ocelot_vcap_key_ipv6 ipv6;
0717     } key;
0718 };
0719
0720 int ocelot_vcap_filter_add(struct ocelot *ocelot,
0721                struct ocelot_vcap_filter *rule,
0722                struct netlink_ext_ack *extack);
0723 int ocelot_vcap_filter_del(struct ocelot *ocelot,
0724                struct ocelot_vcap_filter *rule);
0725 int ocelot_vcap_filter_replace(struct ocelot *ocelot,
0726                    struct ocelot_vcap_filter *filter);
0727 struct ocelot_vcap_filter *
0728 ocelot_vcap_block_find_filter_by_id(struct ocelot_vcap_block *block,
0729                     unsigned long cookie, bool tc_offload);
0730
0731 #endif /* _OCELOT_VCAP_H_ */